ARM: dts: imx6: phytec: Add gpio pinctrl for i2c bus recovery
Make use of the i2c bus recovery feature and enable it on PHYTEC phyCORE-based modules and boards. Signed-off-by: Yunus Bas <y.bas@phytec.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -145,8 +145,11 @@
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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clock-frequency = <400000>;
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status = "disabled";
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@ -185,8 +188,11 @@
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-1 = <&pinctrl_i2c2_gpio>;
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scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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@ -300,6 +306,20 @@
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c1_gpio: i2c1gpiogrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1
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MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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@ -307,10 +327,10 @@
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>;
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};
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pinctrl_i2c1: i2c1grp {
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pinctrl_i2c2_gpio: i2c2gpiogrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
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MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
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>;
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};
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@ -78,8 +78,11 @@
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c3>;
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pinctrl-1 = <&pinctrl_i2c3_gpio>;
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scl-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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clock-frequency = <400000>;
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status = "okay";
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@ -259,6 +262,13 @@
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>;
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};
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pinctrl_i2c3_gpio: i2c3gpiogrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
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MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x4001b8b1
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
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@ -68,8 +68,11 @@
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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clock-frequency = <100000>;
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status = "okay";
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@ -147,6 +150,13 @@
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>;
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};
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pinctrl_i2c1_gpio: i2cgpiogrp {
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fsl,pins = <
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MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x4001b8b0
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MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x4001b8b0
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
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