dmaengine: split out virtual channel DMA support from sa11x0 driver
Split the virtual slave channel DMA support from the sa11x0 driver so this code can be shared with other slave DMA engine drivers. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
Родитель
6887a4131d
Коммит
50437bff7f
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@ -255,6 +255,7 @@ config DMA_SA11X0
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tristate "SA-11x0 DMA support"
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depends on ARCH_SA1100
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support the DMA engine found on Intel StrongARM SA-1100 and
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SA-1110 SoCs. This DMA engine can only be used with on-chip
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@ -263,6 +264,9 @@ config DMA_SA11X0
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config DMA_ENGINE
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bool
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config DMA_VIRTUAL_CHANNELS
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tristate
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comment "DMA Clients"
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depends on DMA_ENGINE
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@ -2,6 +2,7 @@ ccflags-$(CONFIG_DMADEVICES_DEBUG) := -DDEBUG
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ccflags-$(CONFIG_DMADEVICES_VDEBUG) += -DVERBOSE_DEBUG
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obj-$(CONFIG_DMA_ENGINE) += dmaengine.o
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obj-$(CONFIG_DMA_VIRTUAL_CHANNELS) += virt-dma.o
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obj-$(CONFIG_NET_DMA) += iovlock.o
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obj-$(CONFIG_INTEL_MID_DMAC) += intel_mid_dma.o
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obj-$(CONFIG_DMATEST) += dmatest.o
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@ -21,6 +21,8 @@
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include "virt-dma.h"
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#define NR_PHY_CHAN 6
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#define DMA_ALIGN 3
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#define DMA_MAX_SIZE 0x1fff
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@ -72,12 +74,11 @@ struct sa11x0_dma_sg {
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};
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struct sa11x0_dma_desc {
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struct dma_async_tx_descriptor tx;
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struct virt_dma_desc vd;
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u32 ddar;
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size_t size;
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/* maybe protected by c->lock */
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struct list_head node;
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unsigned sglen;
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struct sa11x0_dma_sg sg[0];
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};
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@ -85,15 +86,11 @@ struct sa11x0_dma_desc {
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struct sa11x0_dma_phy;
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struct sa11x0_dma_chan {
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struct dma_chan chan;
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spinlock_t lock;
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dma_cookie_t lc;
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struct virt_dma_chan vc;
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/* protected by c->lock */
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/* protected by c->vc.lock */
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struct sa11x0_dma_phy *phy;
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enum dma_status status;
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struct list_head desc_submitted;
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struct list_head desc_issued;
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/* protected by d->lock */
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struct list_head node;
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@ -109,7 +106,7 @@ struct sa11x0_dma_phy {
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struct sa11x0_dma_chan *vchan;
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/* Protected by c->lock */
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/* Protected by c->vc.lock */
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unsigned sg_load;
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struct sa11x0_dma_desc *txd_load;
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unsigned sg_done;
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@ -127,13 +124,12 @@ struct sa11x0_dma_dev {
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spinlock_t lock;
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struct tasklet_struct task;
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struct list_head chan_pending;
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struct list_head desc_complete;
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struct sa11x0_dma_phy phy[NR_PHY_CHAN];
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};
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static struct sa11x0_dma_chan *to_sa11x0_dma_chan(struct dma_chan *chan)
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{
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return container_of(chan, struct sa11x0_dma_chan, chan);
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return container_of(chan, struct sa11x0_dma_chan, vc.chan);
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}
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static struct sa11x0_dma_dev *to_sa11x0_dma(struct dma_device *dmadev)
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@ -141,27 +137,26 @@ static struct sa11x0_dma_dev *to_sa11x0_dma(struct dma_device *dmadev)
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return container_of(dmadev, struct sa11x0_dma_dev, slave);
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}
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static struct sa11x0_dma_desc *to_sa11x0_dma_tx(struct dma_async_tx_descriptor *tx)
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{
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return container_of(tx, struct sa11x0_dma_desc, tx);
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}
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static struct sa11x0_dma_desc *sa11x0_dma_next_desc(struct sa11x0_dma_chan *c)
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{
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if (list_empty(&c->desc_issued))
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return NULL;
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struct virt_dma_desc *vd = vchan_next_desc(&c->vc);
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return list_first_entry(&c->desc_issued, struct sa11x0_dma_desc, node);
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return vd ? container_of(vd, struct sa11x0_dma_desc, vd) : NULL;
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}
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static void sa11x0_dma_free_desc(struct virt_dma_desc *vd)
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{
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kfree(container_of(vd, struct sa11x0_dma_desc, vd));
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}
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static void sa11x0_dma_start_desc(struct sa11x0_dma_phy *p, struct sa11x0_dma_desc *txd)
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{
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list_del(&txd->node);
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list_del(&txd->vd.node);
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p->txd_load = txd;
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p->sg_load = 0;
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dev_vdbg(p->dev->slave.dev, "pchan %u: txd %p[%x]: starting: DDAR:%x\n",
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p->num, txd, txd->tx.cookie, txd->ddar);
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p->num, &txd->vd, txd->vd.tx.cookie, txd->ddar);
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}
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static void noinline sa11x0_dma_start_sg(struct sa11x0_dma_phy *p,
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@ -229,21 +224,13 @@ static void noinline sa11x0_dma_complete(struct sa11x0_dma_phy *p,
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struct sa11x0_dma_desc *txd = p->txd_done;
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if (++p->sg_done == txd->sglen) {
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struct sa11x0_dma_dev *d = p->dev;
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dev_vdbg(d->slave.dev, "pchan %u: txd %p[%x]: completed\n",
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p->num, p->txd_done, p->txd_done->tx.cookie);
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c->lc = txd->tx.cookie;
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spin_lock(&d->lock);
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list_add_tail(&txd->node, &d->desc_complete);
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spin_unlock(&d->lock);
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vchan_cookie_complete(&txd->vd);
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p->sg_done = 0;
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p->txd_done = p->txd_load;
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tasklet_schedule(&d->task);
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if (!p->txd_done)
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tasklet_schedule(&p->dev->task);
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}
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sa11x0_dma_start_sg(p, c);
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@ -280,7 +267,7 @@ static irqreturn_t sa11x0_dma_irq(int irq, void *dev_id)
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if (c) {
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unsigned long flags;
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spin_lock_irqsave(&c->lock, flags);
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spin_lock_irqsave(&c->vc.lock, flags);
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/*
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* Now that we're holding the lock, check that the vchan
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* really is associated with this pchan before touching the
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@ -294,7 +281,7 @@ static irqreturn_t sa11x0_dma_irq(int irq, void *dev_id)
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if (dcsr & DCSR_DONEB)
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sa11x0_dma_complete(p, c);
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}
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spin_unlock_irqrestore(&c->lock, flags);
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spin_unlock_irqrestore(&c->vc.lock, flags);
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}
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return IRQ_HANDLED;
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@ -332,28 +319,15 @@ static void sa11x0_dma_tasklet(unsigned long arg)
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struct sa11x0_dma_dev *d = (struct sa11x0_dma_dev *)arg;
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struct sa11x0_dma_phy *p;
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struct sa11x0_dma_chan *c;
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struct sa11x0_dma_desc *txd, *txn;
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LIST_HEAD(head);
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unsigned pch, pch_alloc = 0;
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dev_dbg(d->slave.dev, "tasklet enter\n");
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/* Get the completed tx descriptors */
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spin_lock_irq(&d->lock);
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list_splice_init(&d->desc_complete, &head);
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spin_unlock_irq(&d->lock);
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list_for_each_entry(txd, &head, node) {
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c = to_sa11x0_dma_chan(txd->tx.chan);
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dev_dbg(d->slave.dev, "vchan %p: txd %p[%x] completed\n",
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c, txd, txd->tx.cookie);
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spin_lock_irq(&c->lock);
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list_for_each_entry(c, &d->slave.channels, vc.chan.device_node) {
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spin_lock_irq(&c->vc.lock);
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p = c->phy;
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if (p) {
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if (!p->txd_done)
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sa11x0_dma_start_txd(c);
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if (p && !p->txd_done) {
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sa11x0_dma_start_txd(c);
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if (!p->txd_done) {
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/* No current txd associated with this channel */
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dev_dbg(d->slave.dev, "pchan %u: free\n", p->num);
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@ -363,7 +337,7 @@ static void sa11x0_dma_tasklet(unsigned long arg)
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p->vchan = NULL;
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}
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}
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spin_unlock_irq(&c->lock);
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spin_unlock_irq(&c->vc.lock);
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}
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spin_lock_irq(&d->lock);
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@ -380,7 +354,7 @@ static void sa11x0_dma_tasklet(unsigned long arg)
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/* Mark this channel allocated */
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p->vchan = c;
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dev_dbg(d->slave.dev, "pchan %u: alloc vchan %p\n", pch, c);
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dev_dbg(d->slave.dev, "pchan %u: alloc vchan %p\n", pch, &c->vc);
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}
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}
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spin_unlock_irq(&d->lock);
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@ -390,42 +364,18 @@ static void sa11x0_dma_tasklet(unsigned long arg)
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p = &d->phy[pch];
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c = p->vchan;
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spin_lock_irq(&c->lock);
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spin_lock_irq(&c->vc.lock);
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c->phy = p;
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sa11x0_dma_start_txd(c);
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spin_unlock_irq(&c->lock);
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spin_unlock_irq(&c->vc.lock);
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}
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}
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/* Now free the completed tx descriptor, and call their callbacks */
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list_for_each_entry_safe(txd, txn, &head, node) {
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dma_async_tx_callback callback = txd->tx.callback;
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void *callback_param = txd->tx.callback_param;
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dev_dbg(d->slave.dev, "txd %p[%x]: callback and free\n",
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txd, txd->tx.cookie);
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kfree(txd);
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if (callback)
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callback(callback_param);
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}
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dev_dbg(d->slave.dev, "tasklet exit\n");
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}
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static void sa11x0_dma_desc_free(struct sa11x0_dma_dev *d, struct list_head *head)
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{
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struct sa11x0_dma_desc *txd, *txn;
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list_for_each_entry_safe(txd, txn, head, node) {
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dev_dbg(d->slave.dev, "txd %p: freeing\n", txd);
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kfree(txd);
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}
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}
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static int sa11x0_dma_alloc_chan_resources(struct dma_chan *chan)
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{
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return 0;
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@ -436,18 +386,12 @@ static void sa11x0_dma_free_chan_resources(struct dma_chan *chan)
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struct sa11x0_dma_chan *c = to_sa11x0_dma_chan(chan);
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struct sa11x0_dma_dev *d = to_sa11x0_dma(chan->device);
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unsigned long flags;
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LIST_HEAD(head);
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spin_lock_irqsave(&c->lock, flags);
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spin_lock(&d->lock);
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spin_lock_irqsave(&d->lock, flags);
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list_del_init(&c->node);
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spin_unlock(&d->lock);
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spin_unlock_irqrestore(&d->lock, flags);
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list_splice_tail_init(&c->desc_submitted, &head);
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list_splice_tail_init(&c->desc_issued, &head);
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spin_unlock_irqrestore(&c->lock, flags);
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sa11x0_dma_desc_free(d, &head);
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vchan_free_chan_resources(&c->vc);
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}
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static dma_addr_t sa11x0_dma_pos(struct sa11x0_dma_phy *p)
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@ -473,21 +417,15 @@ static enum dma_status sa11x0_dma_tx_status(struct dma_chan *chan,
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struct sa11x0_dma_dev *d = to_sa11x0_dma(chan->device);
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struct sa11x0_dma_phy *p;
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struct sa11x0_dma_desc *txd;
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dma_cookie_t last_used, last_complete;
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unsigned long flags;
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enum dma_status ret;
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size_t bytes = 0;
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last_used = c->chan.cookie;
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last_complete = c->lc;
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ret = dma_async_is_complete(cookie, last_complete, last_used);
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if (ret == DMA_SUCCESS) {
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dma_set_tx_state(state, last_complete, last_used, 0);
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ret = dma_cookie_status(&c->vc.chan, cookie, state);
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if (ret == DMA_SUCCESS)
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return ret;
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}
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spin_lock_irqsave(&c->lock, flags);
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spin_lock_irqsave(&c->vc.lock, flags);
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p = c->phy;
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ret = c->status;
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if (p) {
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@ -524,12 +462,13 @@ static enum dma_status sa11x0_dma_tx_status(struct dma_chan *chan,
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if (txd != p->txd_load && p->txd_load)
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bytes += p->txd_load->size;
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}
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list_for_each_entry(txd, &c->desc_issued, node) {
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list_for_each_entry(txd, &c->vc.desc_issued, vd.node) {
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bytes += txd->size;
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}
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spin_unlock_irqrestore(&c->lock, flags);
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spin_unlock_irqrestore(&c->vc.lock, flags);
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dma_set_tx_state(state, last_complete, last_used, bytes);
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if (state)
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state->residue = bytes;
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dev_vdbg(d->slave.dev, "tx_status: bytes 0x%zx\n", bytes);
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@ -547,40 +486,20 @@ static void sa11x0_dma_issue_pending(struct dma_chan *chan)
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struct sa11x0_dma_dev *d = to_sa11x0_dma(chan->device);
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unsigned long flags;
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spin_lock_irqsave(&c->lock, flags);
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list_splice_tail_init(&c->desc_submitted, &c->desc_issued);
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if (!list_empty(&c->desc_issued)) {
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spin_lock(&d->lock);
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if (!c->phy && list_empty(&c->node)) {
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list_add_tail(&c->node, &d->chan_pending);
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tasklet_schedule(&d->task);
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dev_dbg(d->slave.dev, "vchan %p: issued\n", c);
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spin_lock_irqsave(&c->vc.lock, flags);
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if (vchan_issue_pending(&c->vc)) {
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if (!c->phy) {
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spin_lock(&d->lock);
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if (list_empty(&c->node)) {
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list_add_tail(&c->node, &d->chan_pending);
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tasklet_schedule(&d->task);
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dev_dbg(d->slave.dev, "vchan %p: issued\n", &c->vc);
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}
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spin_unlock(&d->lock);
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}
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spin_unlock(&d->lock);
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} else
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dev_dbg(d->slave.dev, "vchan %p: nothing to issue\n", c);
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spin_unlock_irqrestore(&c->lock, flags);
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}
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static dma_cookie_t sa11x0_dma_tx_submit(struct dma_async_tx_descriptor *tx)
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{
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struct sa11x0_dma_chan *c = to_sa11x0_dma_chan(tx->chan);
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struct sa11x0_dma_desc *txd = to_sa11x0_dma_tx(tx);
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unsigned long flags;
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spin_lock_irqsave(&c->lock, flags);
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c->chan.cookie += 1;
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if (c->chan.cookie < 0)
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c->chan.cookie = 1;
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txd->tx.cookie = c->chan.cookie;
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list_add_tail(&txd->node, &c->desc_submitted);
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spin_unlock_irqrestore(&c->lock, flags);
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dev_dbg(tx->chan->device->dev, "vchan %p: txd %p[%x]: submitted\n",
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c, txd, txd->tx.cookie);
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return txd->tx.cookie;
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dev_dbg(d->slave.dev, "vchan %p: nothing to issue\n", &c->vc);
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spin_unlock_irqrestore(&c->vc.lock, flags);
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}
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static struct dma_async_tx_descriptor *sa11x0_dma_prep_slave_sg(
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@ -596,7 +515,7 @@ static struct dma_async_tx_descriptor *sa11x0_dma_prep_slave_sg(
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/* SA11x0 channels can only operate in their native direction */
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if (dir != (c->ddar & DDAR_RW ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV)) {
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dev_err(chan->device->dev, "vchan %p: bad DMA direction: DDAR:%08x dir:%u\n",
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c, c->ddar, dir);
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&c->vc, c->ddar, dir);
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return NULL;
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}
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@ -612,14 +531,14 @@ static struct dma_async_tx_descriptor *sa11x0_dma_prep_slave_sg(
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j += DIV_ROUND_UP(len, DMA_MAX_SIZE & ~DMA_ALIGN) - 1;
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if (addr & DMA_ALIGN) {
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dev_dbg(chan->device->dev, "vchan %p: bad buffer alignment: %08x\n",
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c, addr);
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&c->vc, addr);
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return NULL;
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}
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}
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txd = kzalloc(sizeof(*txd) + j * sizeof(txd->sg[0]), GFP_ATOMIC);
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if (!txd) {
|
||||
dev_dbg(chan->device->dev, "vchan %p: kzalloc failed\n", c);
|
||||
dev_dbg(chan->device->dev, "vchan %p: kzalloc failed\n", &c->vc);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
@ -655,17 +574,14 @@ static struct dma_async_tx_descriptor *sa11x0_dma_prep_slave_sg(
|
|||
} while (len);
|
||||
}
|
||||
|
||||
dma_async_tx_descriptor_init(&txd->tx, &c->chan);
|
||||
txd->tx.flags = flags;
|
||||
txd->tx.tx_submit = sa11x0_dma_tx_submit;
|
||||
txd->ddar = c->ddar;
|
||||
txd->size = size;
|
||||
txd->sglen = j;
|
||||
|
||||
dev_dbg(chan->device->dev, "vchan %p: txd %p: size %u nr %u\n",
|
||||
c, txd, txd->size, txd->sglen);
|
||||
&c->vc, &txd->vd, txd->size, txd->sglen);
|
||||
|
||||
return &txd->tx;
|
||||
return vchan_tx_prep(&c->vc, &txd->vd, flags);
|
||||
}
|
||||
|
||||
static int sa11x0_dma_slave_config(struct sa11x0_dma_chan *c, struct dma_slave_config *cfg)
|
||||
|
|
@ -695,8 +611,8 @@ static int sa11x0_dma_slave_config(struct sa11x0_dma_chan *c, struct dma_slave_c
|
|||
if (maxburst == 8)
|
||||
ddar |= DDAR_BS;
|
||||
|
||||
dev_dbg(c->chan.device->dev, "vchan %p: dma_slave_config addr %x width %u burst %u\n",
|
||||
c, addr, width, maxburst);
|
||||
dev_dbg(c->vc.chan.device->dev, "vchan %p: dma_slave_config addr %x width %u burst %u\n",
|
||||
&c->vc, addr, width, maxburst);
|
||||
|
||||
c->ddar = ddar | (addr & 0xf0000000) | (addr & 0x003ffffc) << 6;
|
||||
|
||||
|
|
@ -718,16 +634,13 @@ static int sa11x0_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
|
|||
return sa11x0_dma_slave_config(c, (struct dma_slave_config *)arg);
|
||||
|
||||
case DMA_TERMINATE_ALL:
|
||||
dev_dbg(d->slave.dev, "vchan %p: terminate all\n", c);
|
||||
dev_dbg(d->slave.dev, "vchan %p: terminate all\n", &c->vc);
|
||||
/* Clear the tx descriptor lists */
|
||||
spin_lock_irqsave(&c->lock, flags);
|
||||
list_splice_tail_init(&c->desc_submitted, &head);
|
||||
list_splice_tail_init(&c->desc_issued, &head);
|
||||
spin_lock_irqsave(&c->vc.lock, flags);
|
||||
vchan_get_all_descriptors(&c->vc, &head);
|
||||
|
||||
p = c->phy;
|
||||
if (p) {
|
||||
struct sa11x0_dma_desc *txd, *txn;
|
||||
|
||||
dev_dbg(d->slave.dev, "pchan %u: terminating\n", p->num);
|
||||
/* vchan is assigned to a pchan - stop the channel */
|
||||
writel(DCSR_RUN | DCSR_IE |
|
||||
|
|
@ -735,17 +648,13 @@ static int sa11x0_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
|
|||
DCSR_STRTB | DCSR_DONEB,
|
||||
p->base + DMA_DCSR_C);
|
||||
|
||||
list_for_each_entry_safe(txd, txn, &d->desc_complete, node)
|
||||
if (txd->tx.chan == &c->chan)
|
||||
list_move(&txd->node, &head);
|
||||
|
||||
if (p->txd_load) {
|
||||
if (p->txd_load != p->txd_done)
|
||||
list_add_tail(&p->txd_load->node, &head);
|
||||
list_add_tail(&p->txd_load->vd.node, &head);
|
||||
p->txd_load = NULL;
|
||||
}
|
||||
if (p->txd_done) {
|
||||
list_add_tail(&p->txd_done->node, &head);
|
||||
list_add_tail(&p->txd_done->vd.node, &head);
|
||||
p->txd_done = NULL;
|
||||
}
|
||||
c->phy = NULL;
|
||||
|
|
@ -754,14 +663,14 @@ static int sa11x0_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
|
|||
spin_unlock(&d->lock);
|
||||
tasklet_schedule(&d->task);
|
||||
}
|
||||
spin_unlock_irqrestore(&c->lock, flags);
|
||||
sa11x0_dma_desc_free(d, &head);
|
||||
spin_unlock_irqrestore(&c->vc.lock, flags);
|
||||
vchan_dma_desc_free_list(&c->vc, &head);
|
||||
ret = 0;
|
||||
break;
|
||||
|
||||
case DMA_PAUSE:
|
||||
dev_dbg(d->slave.dev, "vchan %p: pause\n", c);
|
||||
spin_lock_irqsave(&c->lock, flags);
|
||||
dev_dbg(d->slave.dev, "vchan %p: pause\n", &c->vc);
|
||||
spin_lock_irqsave(&c->vc.lock, flags);
|
||||
if (c->status == DMA_IN_PROGRESS) {
|
||||
c->status = DMA_PAUSED;
|
||||
|
||||
|
|
@ -774,26 +683,26 @@ static int sa11x0_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
|
|||
spin_unlock(&d->lock);
|
||||
}
|
||||
}
|
||||
spin_unlock_irqrestore(&c->lock, flags);
|
||||
spin_unlock_irqrestore(&c->vc.lock, flags);
|
||||
ret = 0;
|
||||
break;
|
||||
|
||||
case DMA_RESUME:
|
||||
dev_dbg(d->slave.dev, "vchan %p: resume\n", c);
|
||||
spin_lock_irqsave(&c->lock, flags);
|
||||
dev_dbg(d->slave.dev, "vchan %p: resume\n", &c->vc);
|
||||
spin_lock_irqsave(&c->vc.lock, flags);
|
||||
if (c->status == DMA_PAUSED) {
|
||||
c->status = DMA_IN_PROGRESS;
|
||||
|
||||
p = c->phy;
|
||||
if (p) {
|
||||
writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_S);
|
||||
} else if (!list_empty(&c->desc_issued)) {
|
||||
} else if (!list_empty(&c->vc.desc_issued)) {
|
||||
spin_lock(&d->lock);
|
||||
list_add_tail(&c->node, &d->chan_pending);
|
||||
spin_unlock(&d->lock);
|
||||
}
|
||||
}
|
||||
spin_unlock_irqrestore(&c->lock, flags);
|
||||
spin_unlock_irqrestore(&c->vc.lock, flags);
|
||||
ret = 0;
|
||||
break;
|
||||
|
||||
|
|
@ -853,15 +762,13 @@ static int __devinit sa11x0_dma_init_dmadev(struct dma_device *dmadev,
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
c->chan.device = dmadev;
|
||||
c->status = DMA_IN_PROGRESS;
|
||||
c->ddar = chan_desc[i].ddar;
|
||||
c->name = chan_desc[i].name;
|
||||
spin_lock_init(&c->lock);
|
||||
INIT_LIST_HEAD(&c->desc_submitted);
|
||||
INIT_LIST_HEAD(&c->desc_issued);
|
||||
INIT_LIST_HEAD(&c->node);
|
||||
list_add_tail(&c->chan.device_node, &dmadev->channels);
|
||||
|
||||
c->vc.desc_free = sa11x0_dma_free_desc;
|
||||
vchan_init(&c->vc, dmadev);
|
||||
}
|
||||
|
||||
return dma_async_device_register(dmadev);
|
||||
|
|
@ -890,8 +797,9 @@ static void sa11x0_dma_free_channels(struct dma_device *dmadev)
|
|||
{
|
||||
struct sa11x0_dma_chan *c, *cn;
|
||||
|
||||
list_for_each_entry_safe(c, cn, &dmadev->channels, chan.device_node) {
|
||||
list_del(&c->chan.device_node);
|
||||
list_for_each_entry_safe(c, cn, &dmadev->channels, vc.chan.device_node) {
|
||||
list_del(&c->vc.chan.device_node);
|
||||
tasklet_kill(&c->vc.task);
|
||||
kfree(c);
|
||||
}
|
||||
}
|
||||
|
|
@ -915,7 +823,6 @@ static int __devinit sa11x0_dma_probe(struct platform_device *pdev)
|
|||
|
||||
spin_lock_init(&d->lock);
|
||||
INIT_LIST_HEAD(&d->chan_pending);
|
||||
INIT_LIST_HEAD(&d->desc_complete);
|
||||
|
||||
d->base = ioremap(res->start, resource_size(res));
|
||||
if (!d->base) {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,99 @@
|
|||
/*
|
||||
* Virtual DMA channel support for DMAengine
|
||||
*
|
||||
* Copyright (C) 2012 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/device.h>
|
||||
#include <linux/dmaengine.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include "virt-dma.h"
|
||||
|
||||
static struct virt_dma_desc *to_virt_desc(struct dma_async_tx_descriptor *tx)
|
||||
{
|
||||
return container_of(tx, struct virt_dma_desc, tx);
|
||||
}
|
||||
|
||||
dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *tx)
|
||||
{
|
||||
struct virt_dma_chan *vc = to_virt_chan(tx->chan);
|
||||
struct virt_dma_desc *vd = to_virt_desc(tx);
|
||||
unsigned long flags;
|
||||
dma_cookie_t cookie;
|
||||
|
||||
spin_lock_irqsave(&vc->lock, flags);
|
||||
cookie = dma_cookie_assign(tx);
|
||||
|
||||
list_add_tail(&vd->node, &vc->desc_submitted);
|
||||
spin_unlock_irqrestore(&vc->lock, flags);
|
||||
|
||||
dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: submitted\n",
|
||||
vc, vd, cookie);
|
||||
|
||||
return cookie;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(vchan_tx_submit);
|
||||
|
||||
/*
|
||||
* This tasklet handles the completion of a DMA descriptor by
|
||||
* calling its callback and freeing it.
|
||||
*/
|
||||
static void vchan_complete(unsigned long arg)
|
||||
{
|
||||
struct virt_dma_chan *vc = (struct virt_dma_chan *)arg;
|
||||
LIST_HEAD(head);
|
||||
|
||||
spin_lock_irq(&vc->lock);
|
||||
list_splice_tail_init(&vc->desc_completed, &head);
|
||||
spin_unlock_irq(&vc->lock);
|
||||
|
||||
while (!list_empty(&head)) {
|
||||
struct virt_dma_desc *vd = list_first_entry(&head,
|
||||
struct virt_dma_desc, node);
|
||||
dma_async_tx_callback cb = vd->tx.callback;
|
||||
void *cb_data = vd->tx.callback_param;
|
||||
|
||||
list_del(&vd->node);
|
||||
|
||||
vc->desc_free(vd);
|
||||
|
||||
if (cb)
|
||||
cb(cb_data);
|
||||
}
|
||||
}
|
||||
|
||||
void vchan_dma_desc_free_list(struct virt_dma_chan *vc, struct list_head *head)
|
||||
{
|
||||
while (!list_empty(head)) {
|
||||
struct virt_dma_desc *vd = list_first_entry(head,
|
||||
struct virt_dma_desc, node);
|
||||
list_del(&vd->node);
|
||||
dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd);
|
||||
vc->desc_free(vd);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(vchan_dma_desc_free_list);
|
||||
|
||||
void vchan_init(struct virt_dma_chan *vc, struct dma_device *dmadev)
|
||||
{
|
||||
dma_cookie_init(&vc->chan);
|
||||
|
||||
spin_lock_init(&vc->lock);
|
||||
INIT_LIST_HEAD(&vc->desc_submitted);
|
||||
INIT_LIST_HEAD(&vc->desc_issued);
|
||||
INIT_LIST_HEAD(&vc->desc_completed);
|
||||
|
||||
tasklet_init(&vc->task, vchan_complete, (unsigned long)vc);
|
||||
|
||||
vc->chan.device = dmadev;
|
||||
list_add_tail(&vc->chan.device_node, &dmadev->channels);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(vchan_init);
|
||||
|
||||
MODULE_AUTHOR("Russell King");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -0,0 +1,138 @@
|
|||
/*
|
||||
* Virtual DMA channel support for DMAengine
|
||||
*
|
||||
* Copyright (C) 2012 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef VIRT_DMA_H
|
||||
#define VIRT_DMA_H
|
||||
|
||||
#include <linux/dmaengine.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include "dmaengine.h"
|
||||
|
||||
struct virt_dma_desc {
|
||||
struct dma_async_tx_descriptor tx;
|
||||
/* protected by vc.lock */
|
||||
struct list_head node;
|
||||
};
|
||||
|
||||
struct virt_dma_chan {
|
||||
struct dma_chan chan;
|
||||
struct tasklet_struct task;
|
||||
void (*desc_free)(struct virt_dma_desc *);
|
||||
|
||||
spinlock_t lock;
|
||||
|
||||
/* protected by vc.lock */
|
||||
struct list_head desc_submitted;
|
||||
struct list_head desc_issued;
|
||||
struct list_head desc_completed;
|
||||
};
|
||||
|
||||
static inline struct virt_dma_chan *to_virt_chan(struct dma_chan *chan)
|
||||
{
|
||||
return container_of(chan, struct virt_dma_chan, chan);
|
||||
}
|
||||
|
||||
void vchan_dma_desc_free_list(struct virt_dma_chan *vc, struct list_head *head);
|
||||
|
||||
void vchan_init(struct virt_dma_chan *vc, struct dma_device *dmadev);
|
||||
|
||||
/**
|
||||
* vchan_tx_prep - prepare a descriptor
|
||||
* vc: virtual channel allocating this descriptor
|
||||
* vd: virtual descriptor to prepare
|
||||
* tx_flags: flags argument passed in to prepare function
|
||||
*/
|
||||
static inline struct dma_async_tx_descriptor *vchan_tx_prep(struct virt_dma_chan *vc,
|
||||
struct virt_dma_desc *vd, unsigned long tx_flags)
|
||||
{
|
||||
extern dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *);
|
||||
|
||||
dma_async_tx_descriptor_init(&vd->tx, &vc->chan);
|
||||
vd->tx.flags = tx_flags;
|
||||
vd->tx.tx_submit = vchan_tx_submit;
|
||||
|
||||
return &vd->tx;
|
||||
}
|
||||
|
||||
/**
|
||||
* vchan_issue_pending - move submitted descriptors to issued list
|
||||
* vc: virtual channel to update
|
||||
*
|
||||
* vc.lock must be held by caller
|
||||
*/
|
||||
static inline bool vchan_issue_pending(struct virt_dma_chan *vc)
|
||||
{
|
||||
list_splice_tail_init(&vc->desc_submitted, &vc->desc_issued);
|
||||
return !list_empty(&vc->desc_issued);
|
||||
}
|
||||
|
||||
/**
|
||||
* vchan_cookie_complete - report completion of a descriptor
|
||||
* vd: virtual descriptor to update
|
||||
*
|
||||
* vc.lock must be held by caller
|
||||
*/
|
||||
static inline void vchan_cookie_complete(struct virt_dma_desc *vd)
|
||||
{
|
||||
struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan);
|
||||
|
||||
dma_cookie_complete(&vd->tx);
|
||||
dev_vdbg(vc->chan.device->dev, "txd %p[%x]: marked complete\n",
|
||||
vd, vd->tx.cookie);
|
||||
list_add_tail(&vd->node, &vc->desc_completed);
|
||||
|
||||
tasklet_schedule(&vc->task);
|
||||
}
|
||||
|
||||
/**
|
||||
* vchan_next_desc - peek at the next descriptor to be processed
|
||||
* vc: virtual channel to obtain descriptor from
|
||||
*
|
||||
* vc.lock must be held by caller
|
||||
*/
|
||||
static inline struct virt_dma_desc *vchan_next_desc(struct virt_dma_chan *vc)
|
||||
{
|
||||
if (list_empty(&vc->desc_issued))
|
||||
return NULL;
|
||||
|
||||
return list_first_entry(&vc->desc_issued, struct virt_dma_desc, node);
|
||||
}
|
||||
|
||||
/**
|
||||
* vchan_get_all_descriptors - obtain all submitted and issued descriptors
|
||||
* vc: virtual channel to get descriptors from
|
||||
* head: list of descriptors found
|
||||
*
|
||||
* vc.lock must be held by caller
|
||||
*
|
||||
* Removes all submitted and issued descriptors from internal lists, and
|
||||
* provides a list of all descriptors found
|
||||
*/
|
||||
static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc,
|
||||
struct list_head *head)
|
||||
{
|
||||
list_splice_tail_init(&vc->desc_submitted, head);
|
||||
list_splice_tail_init(&vc->desc_issued, head);
|
||||
list_splice_tail_init(&vc->desc_completed, head);
|
||||
}
|
||||
|
||||
static inline void vchan_free_chan_resources(struct virt_dma_chan *vc)
|
||||
{
|
||||
unsigned long flags;
|
||||
LIST_HEAD(head);
|
||||
|
||||
spin_lock_irqsave(&vc->lock, flags);
|
||||
vchan_get_all_descriptors(vc, &head);
|
||||
spin_unlock_irqrestore(&vc->lock, flags);
|
||||
|
||||
vchan_dma_desc_free_list(vc, &head);
|
||||
}
|
||||
|
||||
#endif
|
||||
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