RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740
SiFive FU740 has 4 ECC interrupt sources as compared to 3 in FU540. Update the L2 cache controller driver to support this additional interrupt in case of FU740-C000 chip. Signed-off-by: Yash Shah <yash.shah@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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af951c3a11
Коммит
507308b8cc
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@ -17,6 +17,10 @@
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#define SIFIVE_L2_DIRECCFIX_HIGH 0x104
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#define SIFIVE_L2_DIRECCFIX_COUNT 0x108
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#define SIFIVE_L2_DIRECCFAIL_LOW 0x120
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#define SIFIVE_L2_DIRECCFAIL_HIGH 0x124
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#define SIFIVE_L2_DIRECCFAIL_COUNT 0x128
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#define SIFIVE_L2_DATECCFIX_LOW 0x140
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#define SIFIVE_L2_DATECCFIX_HIGH 0x144
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#define SIFIVE_L2_DATECCFIX_COUNT 0x148
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@ -29,7 +33,7 @@
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#define SIFIVE_L2_WAYENABLE 0x08
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#define SIFIVE_L2_ECCINJECTERR 0x40
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#define SIFIVE_L2_MAX_ECCINTR 3
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#define SIFIVE_L2_MAX_ECCINTR 4
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static void __iomem *l2_base;
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static int g_irq[SIFIVE_L2_MAX_ECCINTR];
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@ -39,6 +43,7 @@ enum {
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DIR_CORR = 0,
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DATA_CORR,
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DATA_UNCORR,
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DIR_UNCORR,
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};
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#ifdef CONFIG_DEBUG_FS
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@ -93,6 +98,7 @@ static void l2_config_read(void)
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static const struct of_device_id sifive_l2_ids[] = {
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{ .compatible = "sifive,fu540-c000-ccache" },
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{ .compatible = "sifive,fu740-c000-ccache" },
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{ /* end of table */ },
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};
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@ -155,6 +161,15 @@ static irqreturn_t l2_int_handler(int irq, void *device)
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atomic_notifier_call_chain(&l2_err_chain, SIFIVE_L2_ERR_TYPE_CE,
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"DirECCFix");
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}
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if (irq == g_irq[DIR_UNCORR]) {
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add_h = readl(l2_base + SIFIVE_L2_DIRECCFAIL_HIGH);
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add_l = readl(l2_base + SIFIVE_L2_DIRECCFAIL_LOW);
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/* Reading this register clears the DirFail interrupt sig */
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readl(l2_base + SIFIVE_L2_DIRECCFAIL_COUNT);
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atomic_notifier_call_chain(&l2_err_chain, SIFIVE_L2_ERR_TYPE_UE,
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"DirECCFail");
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panic("L2CACHE: DirFail @ 0x%08X.%08X\n", add_h, add_l);
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}
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if (irq == g_irq[DATA_CORR]) {
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add_h = readl(l2_base + SIFIVE_L2_DATECCFIX_HIGH);
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add_l = readl(l2_base + SIFIVE_L2_DATECCFIX_LOW);
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@ -181,7 +196,7 @@ static int __init sifive_l2_init(void)
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{
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struct device_node *np;
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struct resource res;
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int i, rc;
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int i, rc, intr_num;
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np = of_find_matching_node(NULL, sifive_l2_ids);
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if (!np)
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@ -194,7 +209,13 @@ static int __init sifive_l2_init(void)
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if (!l2_base)
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return -ENOMEM;
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for (i = 0; i < SIFIVE_L2_MAX_ECCINTR; i++) {
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intr_num = of_property_count_u32_elems(np, "interrupts");
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if (!intr_num) {
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pr_err("L2CACHE: no interrupts property\n");
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return -ENODEV;
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}
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for (i = 0; i < intr_num; i++) {
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g_irq[i] = irq_of_parse_and_map(np, i);
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rc = request_irq(g_irq[i], l2_int_handler, 0, "l2_ecc", NULL);
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if (rc) {
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