xHCI: fix cycle bit set in giveback_first_trb()
giveback_first_trb() controls the cycle bit set of the start_trb, to ensure that the start_trb is written last and the host controller will receive a whole td at a time. However, if the ring is wrapped and cycle bit is toggled to zero, then giveback_first_trb() will be of no effect. In this case, set the cycle bit of start_trb to 1 at the beginning and clear it in giveback_first_trb(). Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
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e1eab2e000
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50f7b52a83
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@ -2421,7 +2421,10 @@ static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id,
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* isn't reordered.
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*/
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wmb();
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if (start_cycle)
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start_trb->field[3] |= start_cycle;
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else
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start_trb->field[3] &= ~0x1;
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xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id);
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}
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@ -2551,9 +2554,11 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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u32 remainder = 0;
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/* Don't change the cycle bit of the first TRB until later */
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if (first_trb)
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if (first_trb) {
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first_trb = false;
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else
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if (start_cycle == 0)
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field |= 0x1;
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} else
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field |= ep_ring->cycle_state;
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/* Chain all the TRBs together; clear the chain bit in the last
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@ -2711,9 +2716,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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field = 0;
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/* Don't change the cycle bit of the first TRB until later */
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if (first_trb)
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if (first_trb) {
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first_trb = false;
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else
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if (start_cycle == 0)
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field |= 0x1;
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} else
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field |= ep_ring->cycle_state;
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/* Chain all the TRBs together; clear the chain bit in the last
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@ -2818,13 +2825,17 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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/* Queue setup TRB - see section 6.4.1.2.1 */
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/* FIXME better way to translate setup_packet into two u32 fields? */
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setup = (struct usb_ctrlrequest *) urb->setup_packet;
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field = 0;
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field |= TRB_IDT | TRB_TYPE(TRB_SETUP);
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if (start_cycle == 0)
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field |= 0x1;
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queue_trb(xhci, ep_ring, false, true,
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/* FIXME endianness is probably going to bite my ass here. */
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setup->bRequestType | setup->bRequest << 8 | setup->wValue << 16,
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setup->wIndex | setup->wLength << 16,
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TRB_LEN(8) | TRB_INTR_TARGET(0),
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/* Immediate data in pointer */
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TRB_IDT | TRB_TYPE(TRB_SETUP));
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field);
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/* If there's data, queue data TRBs */
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field = 0;
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@ -2951,7 +2962,10 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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field |= TRB_TYPE(TRB_ISOC);
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/* Assume URB_ISO_ASAP is set */
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field |= TRB_SIA;
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if (i > 0)
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if (i == 0) {
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if (start_cycle == 0)
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field |= 0x1;
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} else
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field |= ep_ring->cycle_state;
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first_trb = false;
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} else {
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