drm/i915/dp: correct eDP lane count and bpp
With the old check we'd never set lane_count or bpp to different values on PCH attached eDP panels. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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4d9264615b
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51190667b3
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@ -672,8 +672,10 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
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intel_dp = enc_to_intel_dp(encoder);
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if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT) {
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lane_count = intel_dp->lane_count;
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if (is_pch_edp(intel_dp))
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bpp = dev_priv->edp.bpp;
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break;
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} else if (is_edp(intel_dp)) {
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lane_count = dev_priv->edp.lanes;
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bpp = dev_priv->edp.bpp;
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break;
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}
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}
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