Blackfin: optimize startup code
Take advantage of more Blackfin-specific insns, and only initialize registers required by the ABI. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger
Родитель
c6345ab1a3
Коммит
511cdcc500
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@ -31,6 +31,7 @@ ENDPROC(__init_clear_bss)
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ENTRY(__start)
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/* R0: argument of command line string, passed from uboot, save it */
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R7 = R0;
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/* Enable Cycle Counter and Nesting Of Interrupts */
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#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
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R0 = SYSCFG_SNEN;
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@ -38,76 +39,49 @@ ENTRY(__start)
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R0 = SYSCFG_SNEN | SYSCFG_CCEN;
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#endif
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SYSCFG = R0;
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R0 = 0;
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/* Clear Out All the data and pointer Registers */
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R1 = R0;
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R2 = R0;
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R3 = R0;
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R4 = R0;
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R5 = R0;
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R6 = R0;
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/* Optimization register tricks: keep a base value in the
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* reserved P registers so we use the load/store with an
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* offset syntax. R0 = [P5 + <constant>];
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* P5 - core MMR base
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* R6 - 0
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*/
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r6 = 0;
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p5.l = 0;
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p5.h = hi(COREMMR_BASE);
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P0 = R0;
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P1 = R0;
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P2 = R0;
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P3 = R0;
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P4 = R0;
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P5 = R0;
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/* Zero out registers required by Blackfin ABI */
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LC0 = r0;
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LC1 = r0;
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L0 = r0;
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L1 = r0;
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L2 = r0;
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L3 = r0;
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/* Disable circular buffers */
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L0 = r6;
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L1 = r6;
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L2 = r6;
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L3 = r6;
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/* Clear Out All the DAG Registers */
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B0 = r0;
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B1 = r0;
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B2 = r0;
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B3 = r0;
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I0 = r0;
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I1 = r0;
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I2 = r0;
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I3 = r0;
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M0 = r0;
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M1 = r0;
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M2 = r0;
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M3 = r0;
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/* Disable hardware loops in case we were started by 'go' */
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LC0 = r6;
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LC1 = r6;
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/*
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* Clear ITEST_COMMAND and DTEST_COMMAND registers,
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* Leaving these as non-zero can confuse the emulator
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*/
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p0.L = LO(DTEST_COMMAND);
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p0.H = HI(DTEST_COMMAND);
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[p0] = R0;
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[p0 + (ITEST_COMMAND - DTEST_COMMAND)] = R0;
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[p5 + (DTEST_COMMAND - COREMMR_BASE)] = r6;
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[p5 + (ITEST_COMMAND - COREMMR_BASE)] = r6;
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CSYNC;
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trace_buffer_init(p0,r0);
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P0 = R1;
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R0 = R1;
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/* Turn off the icache */
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p0.l = LO(IMEM_CONTROL);
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p0.h = HI(IMEM_CONTROL);
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R1 = [p0];
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R0 = ~ENICPLB;
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R0 = R0 & R1;
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[p0] = R0;
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r1 = [p5 + (IMEM_CONTROL - COREMMR_BASE)];
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BITCLR (r1, ENICPLB_P);
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[p5 + (IMEM_CONTROL - COREMMR_BASE)] = r1;
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SSYNC;
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/* Turn off the dcache */
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p0.l = LO(DMEM_CONTROL);
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p0.h = HI(DMEM_CONTROL);
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R1 = [p0];
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R0 = ~ENDCPLB;
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R0 = R0 & R1;
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[p0] = R0;
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r1 = [p5 + (DMEM_CONTROL - COREMMR_BASE)];
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BITCLR (r1, ENDCPLB_P);
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[p5 + (DMEM_CONTROL - COREMMR_BASE)] = r1;
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SSYNC;
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/* in case of double faults, save a few things */
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@ -122,25 +96,25 @@ ENTRY(__start)
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* below
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*/
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GET_PDA(p0, r0);
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r6 = [p0 + PDA_DF_RETX];
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r5 = [p0 + PDA_DF_RETX];
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p1.l = _init_saved_retx;
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p1.h = _init_saved_retx;
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[p1] = r6;
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[p1] = r5;
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r6 = [p0 + PDA_DF_DCPLB];
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r5 = [p0 + PDA_DF_DCPLB];
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p1.l = _init_saved_dcplb_fault_addr;
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p1.h = _init_saved_dcplb_fault_addr;
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[p1] = r6;
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[p1] = r5;
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r6 = [p0 + PDA_DF_ICPLB];
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r5 = [p0 + PDA_DF_ICPLB];
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p1.l = _init_saved_icplb_fault_addr;
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p1.h = _init_saved_icplb_fault_addr;
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[p1] = r6;
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[p1] = r5;
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r6 = [p0 + PDA_DF_SEQSTAT];
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r5 = [p0 + PDA_DF_SEQSTAT];
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p1.l = _init_saved_seqstat;
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p1.h = _init_saved_seqstat;
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[p1] = r6;
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[p1] = r5;
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#endif
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/* Initialize stack pointer */
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@ -155,7 +129,7 @@ ENTRY(__start)
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sti r0;
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#endif
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r0 = 0 (x);
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r0 = r6;
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/* Zero out all of the fun bss regions */
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#if L1_DATA_A_LENGTH > 0
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r1.l = __sbss_l1;
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@ -210,11 +184,9 @@ ENTRY(__start)
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/* EVT15 = _real_start */
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p0.l = lo(EVT15);
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p0.h = hi(EVT15);
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p1.l = _real_start;
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p1.h = _real_start;
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[p0] = p1;
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[p5 + (EVT15 - COREMMR_BASE)] = p1;
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csync;
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#ifdef CONFIG_EARLY_PRINTK
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