[POWERPC] cell: Add symbol exports for oprofile
Add symbol-exports for the new routines in arch/powerpc/platforms/cell/pmu.c. They are needed for Oprofile, which can be built as a module. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -85,6 +85,7 @@ u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr)
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return val;
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return val;
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}
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}
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EXPORT_SYMBOL_GPL(cbe_read_phys_ctr);
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void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val)
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void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val)
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{
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{
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@ -111,6 +112,7 @@ void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val)
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}
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}
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}
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}
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}
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}
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EXPORT_SYMBOL_GPL(cbe_write_phys_ctr);
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/*
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/*
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* "Logical" counter registers.
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* "Logical" counter registers.
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@ -130,6 +132,7 @@ u32 cbe_read_ctr(u32 cpu, u32 ctr)
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return val;
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return val;
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}
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}
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EXPORT_SYMBOL_GPL(cbe_read_ctr);
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void cbe_write_ctr(u32 cpu, u32 ctr, u32 val)
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void cbe_write_ctr(u32 cpu, u32 ctr, u32 val)
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{
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{
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@ -149,6 +152,7 @@ void cbe_write_ctr(u32 cpu, u32 ctr, u32 val)
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cbe_write_phys_ctr(cpu, phys_ctr, val);
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cbe_write_phys_ctr(cpu, phys_ctr, val);
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}
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}
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EXPORT_SYMBOL_GPL(cbe_write_ctr);
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/*
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/*
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* Counter-control registers.
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* Counter-control registers.
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@ -164,12 +168,14 @@ u32 cbe_read_pm07_control(u32 cpu, u32 ctr)
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return pm07_control;
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return pm07_control;
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}
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}
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EXPORT_SYMBOL_GPL(cbe_read_pm07_control);
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void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val)
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void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val)
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{
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{
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if (ctr < NR_CTRS)
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if (ctr < NR_CTRS)
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WRITE_WO_MMIO(pm07_control[ctr], val);
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WRITE_WO_MMIO(pm07_control[ctr], val);
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}
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}
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EXPORT_SYMBOL_GPL(cbe_write_pm07_control);
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/*
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/*
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* Other PMU control registers. Most of these are write-only.
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* Other PMU control registers. Most of these are write-only.
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@ -215,6 +221,7 @@ u32 cbe_read_pm(u32 cpu, enum pm_reg_name reg)
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return val;
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return val;
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}
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}
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EXPORT_SYMBOL_GPL(cbe_read_pm);
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void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val)
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void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val)
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{
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{
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@ -252,6 +259,7 @@ void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val)
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break;
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break;
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}
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}
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}
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}
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EXPORT_SYMBOL_GPL(cbe_write_pm);
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/*
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/*
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* Get/set the size of a physical counter to either 16 or 32 bits.
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* Get/set the size of a physical counter to either 16 or 32 bits.
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@ -268,6 +276,7 @@ u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr)
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return size;
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return size;
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}
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}
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EXPORT_SYMBOL_GPL(cbe_get_ctr_size);
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void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size)
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void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size)
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{
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{
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@ -287,6 +296,7 @@ void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size)
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cbe_write_pm(cpu, pm_control, pm_ctrl);
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cbe_write_pm(cpu, pm_control, pm_ctrl);
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}
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}
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}
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}
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EXPORT_SYMBOL_GPL(cbe_set_ctr_size);
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/*
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/*
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* Enable/disable the entire performance monitoring unit.
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* Enable/disable the entire performance monitoring unit.
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@ -304,6 +314,7 @@ void cbe_enable_pm(u32 cpu)
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pm_ctrl = cbe_read_pm(cpu, pm_control) | CBE_PM_ENABLE_PERF_MON;
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pm_ctrl = cbe_read_pm(cpu, pm_control) | CBE_PM_ENABLE_PERF_MON;
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cbe_write_pm(cpu, pm_control, pm_ctrl);
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cbe_write_pm(cpu, pm_control, pm_ctrl);
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}
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}
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EXPORT_SYMBOL_GPL(cbe_enable_pm);
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void cbe_disable_pm(u32 cpu)
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void cbe_disable_pm(u32 cpu)
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{
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{
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@ -311,6 +322,7 @@ void cbe_disable_pm(u32 cpu)
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pm_ctrl = cbe_read_pm(cpu, pm_control) & ~CBE_PM_ENABLE_PERF_MON;
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pm_ctrl = cbe_read_pm(cpu, pm_control) & ~CBE_PM_ENABLE_PERF_MON;
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cbe_write_pm(cpu, pm_control, pm_ctrl);
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cbe_write_pm(cpu, pm_control, pm_ctrl);
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}
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}
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EXPORT_SYMBOL_GPL(cbe_disable_pm);
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/*
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/*
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* Reading from the trace_buffer.
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* Reading from the trace_buffer.
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@ -325,4 +337,5 @@ void cbe_read_trace_buffer(u32 cpu, u64 *buf)
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*buf++ = in_be64(&pmd_regs->trace_buffer_0_63);
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*buf++ = in_be64(&pmd_regs->trace_buffer_0_63);
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*buf++ = in_be64(&pmd_regs->trace_buffer_64_127);
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*buf++ = in_be64(&pmd_regs->trace_buffer_64_127);
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}
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}
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EXPORT_SYMBOL_GPL(cbe_read_trace_buffer);
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