KVM: PPC: Book3S HV P9: Use Linux SPR save/restore to manage some host SPRs
Linux implements SPR save/restore including storage space for registers in the task struct for process context switching. Make use of this similarly to the way we make use of the context switching fp/vec save restore. This improves code reuse, allows some stack space to be saved, and helps with avoiding VRSAVE updates if they are not required. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211123095231.1036501-39-npiggin@gmail.com
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Родитель
022ecb960c
Коммит
5236756d04
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@ -113,6 +113,7 @@ static inline void clear_task_ebb(struct task_struct *t)
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}
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void kvmppc_save_user_regs(void);
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void kvmppc_save_current_sprs(void);
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extern int set_thread_tidr(struct task_struct *t);
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@ -1182,6 +1182,12 @@ void kvmppc_save_user_regs(void)
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#endif
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}
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EXPORT_SYMBOL_GPL(kvmppc_save_user_regs);
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void kvmppc_save_current_sprs(void)
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{
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save_sprs(¤t->thread);
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}
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EXPORT_SYMBOL_GPL(kvmppc_save_current_sprs);
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#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
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static inline void restore_sprs(struct thread_struct *old_thread,
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@ -4566,9 +4566,6 @@ static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu)
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struct kvm_run *run = vcpu->run;
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int r;
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int srcu_idx;
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unsigned long ebb_regs[3] = {}; /* shut up GCC */
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unsigned long user_tar = 0;
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unsigned int user_vrsave;
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struct kvm *kvm;
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unsigned long msr;
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@ -4629,14 +4626,7 @@ static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu)
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kvmppc_save_user_regs();
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/* Save userspace EBB and other register values */
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if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
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ebb_regs[0] = mfspr(SPRN_EBBHR);
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ebb_regs[1] = mfspr(SPRN_EBBRR);
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ebb_regs[2] = mfspr(SPRN_BESCR);
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user_tar = mfspr(SPRN_TAR);
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}
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user_vrsave = mfspr(SPRN_VRSAVE);
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kvmppc_save_current_sprs();
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vcpu->arch.waitp = &vcpu->arch.vcore->wait;
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vcpu->arch.pgdir = kvm->mm->pgd;
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@ -4677,15 +4667,6 @@ static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu)
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}
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} while (is_kvmppc_resume_guest(r));
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/* Restore userspace EBB and other register values */
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if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
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mtspr(SPRN_EBBHR, ebb_regs[0]);
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mtspr(SPRN_EBBRR, ebb_regs[1]);
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mtspr(SPRN_BESCR, ebb_regs[2]);
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mtspr(SPRN_TAR, user_tar);
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}
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mtspr(SPRN_VRSAVE, user_vrsave);
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vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
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atomic_dec(&kvm->arch.vcpus_running);
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@ -4,11 +4,8 @@
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* Privileged (non-hypervisor) host registers to save.
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*/
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struct p9_host_os_sprs {
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unsigned long dscr;
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unsigned long tidr;
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unsigned long iamr;
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unsigned long amr;
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unsigned long fscr;
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unsigned int pmc1;
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unsigned int pmc2;
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@ -231,15 +231,26 @@ EXPORT_SYMBOL_GPL(switch_pmu_to_host);
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static void load_spr_state(struct kvm_vcpu *vcpu,
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struct p9_host_os_sprs *host_os_sprs)
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{
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/* TAR is very fast */
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mtspr(SPRN_TAR, vcpu->arch.tar);
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#ifdef CONFIG_ALTIVEC
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if (cpu_has_feature(CPU_FTR_ALTIVEC) &&
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current->thread.vrsave != vcpu->arch.vrsave)
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mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
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#endif
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if (vcpu->arch.hfscr & HFSCR_EBB) {
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mtspr(SPRN_EBBHR, vcpu->arch.ebbhr);
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mtspr(SPRN_EBBRR, vcpu->arch.ebbrr);
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mtspr(SPRN_BESCR, vcpu->arch.bescr);
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if (current->thread.ebbhr != vcpu->arch.ebbhr)
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mtspr(SPRN_EBBHR, vcpu->arch.ebbhr);
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if (current->thread.ebbrr != vcpu->arch.ebbrr)
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mtspr(SPRN_EBBRR, vcpu->arch.ebbrr);
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if (current->thread.bescr != vcpu->arch.bescr)
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mtspr(SPRN_BESCR, vcpu->arch.bescr);
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}
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if (cpu_has_feature(CPU_FTR_P9_TIDR))
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if (cpu_has_feature(CPU_FTR_P9_TIDR) &&
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current->thread.tidr != vcpu->arch.tid)
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mtspr(SPRN_TIDR, vcpu->arch.tid);
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if (host_os_sprs->iamr != vcpu->arch.iamr)
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mtspr(SPRN_IAMR, vcpu->arch.iamr);
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@ -247,9 +258,9 @@ static void load_spr_state(struct kvm_vcpu *vcpu,
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mtspr(SPRN_AMR, vcpu->arch.amr);
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if (vcpu->arch.uamor != 0)
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mtspr(SPRN_UAMOR, vcpu->arch.uamor);
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if (host_os_sprs->fscr != vcpu->arch.fscr)
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if (current->thread.fscr != vcpu->arch.fscr)
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mtspr(SPRN_FSCR, vcpu->arch.fscr);
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if (host_os_sprs->dscr != vcpu->arch.dscr)
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if (current->thread.dscr != vcpu->arch.dscr)
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mtspr(SPRN_DSCR, vcpu->arch.dscr);
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if (vcpu->arch.pspb != 0)
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mtspr(SPRN_PSPB, vcpu->arch.pspb);
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@ -269,20 +280,15 @@ static void store_spr_state(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.tar = mfspr(SPRN_TAR);
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#ifdef CONFIG_ALTIVEC
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
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#endif
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if (vcpu->arch.hfscr & HFSCR_EBB) {
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vcpu->arch.ebbhr = mfspr(SPRN_EBBHR);
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vcpu->arch.ebbrr = mfspr(SPRN_EBBRR);
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vcpu->arch.bescr = mfspr(SPRN_BESCR);
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/*
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* This is like load_fp in context switching, turn off the
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* facility after it wraps the u8 to try avoiding saving
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* and restoring the registers each partition switch.
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*/
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if (!vcpu->arch.nested) {
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vcpu->arch.load_ebb++;
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if (!vcpu->arch.load_ebb)
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vcpu->arch.hfscr &= ~HFSCR_EBB;
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}
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}
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if (cpu_has_feature(CPU_FTR_P9_TIDR))
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@ -324,7 +330,6 @@ bool load_vcpu_state(struct kvm_vcpu *vcpu,
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#ifdef CONFIG_ALTIVEC
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load_vr_state(&vcpu->arch.vr);
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#endif
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mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
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return ret;
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}
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@ -338,7 +343,6 @@ void store_vcpu_state(struct kvm_vcpu *vcpu)
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#ifdef CONFIG_ALTIVEC
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store_vr_state(&vcpu->arch.vr);
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#endif
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vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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if (cpu_has_feature(CPU_FTR_TM) ||
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@ -364,12 +368,8 @@ EXPORT_SYMBOL_GPL(store_vcpu_state);
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void save_p9_host_os_sprs(struct p9_host_os_sprs *host_os_sprs)
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{
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if (cpu_has_feature(CPU_FTR_P9_TIDR))
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host_os_sprs->tidr = mfspr(SPRN_TIDR);
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host_os_sprs->iamr = mfspr(SPRN_IAMR);
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host_os_sprs->amr = mfspr(SPRN_AMR);
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host_os_sprs->fscr = mfspr(SPRN_FSCR);
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host_os_sprs->dscr = mfspr(SPRN_DSCR);
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}
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EXPORT_SYMBOL_GPL(save_p9_host_os_sprs);
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@ -377,26 +377,63 @@ EXPORT_SYMBOL_GPL(save_p9_host_os_sprs);
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void restore_p9_host_os_sprs(struct kvm_vcpu *vcpu,
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struct p9_host_os_sprs *host_os_sprs)
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{
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/*
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* current->thread.xxx registers must all be restored to host
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* values before a potential context switch, othrewise the context
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* switch itself will overwrite current->thread.xxx with the values
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* from the guest SPRs.
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*/
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mtspr(SPRN_SPRG_VDSO_WRITE, local_paca->sprg_vdso);
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if (cpu_has_feature(CPU_FTR_P9_TIDR))
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mtspr(SPRN_TIDR, host_os_sprs->tidr);
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if (cpu_has_feature(CPU_FTR_P9_TIDR) &&
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current->thread.tidr != vcpu->arch.tid)
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mtspr(SPRN_TIDR, current->thread.tidr);
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if (host_os_sprs->iamr != vcpu->arch.iamr)
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mtspr(SPRN_IAMR, host_os_sprs->iamr);
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if (vcpu->arch.uamor != 0)
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mtspr(SPRN_UAMOR, 0);
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if (host_os_sprs->amr != vcpu->arch.amr)
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mtspr(SPRN_AMR, host_os_sprs->amr);
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if (host_os_sprs->fscr != vcpu->arch.fscr)
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mtspr(SPRN_FSCR, host_os_sprs->fscr);
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if (host_os_sprs->dscr != vcpu->arch.dscr)
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mtspr(SPRN_DSCR, host_os_sprs->dscr);
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if (current->thread.fscr != vcpu->arch.fscr)
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mtspr(SPRN_FSCR, current->thread.fscr);
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if (current->thread.dscr != vcpu->arch.dscr)
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mtspr(SPRN_DSCR, current->thread.dscr);
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if (vcpu->arch.pspb != 0)
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mtspr(SPRN_PSPB, 0);
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/* Save guest CTRL register, set runlatch to 1 */
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if (!(vcpu->arch.ctrl & 1))
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mtspr(SPRN_CTRLT, 1);
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#ifdef CONFIG_ALTIVEC
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if (cpu_has_feature(CPU_FTR_ALTIVEC) &&
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vcpu->arch.vrsave != current->thread.vrsave)
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mtspr(SPRN_VRSAVE, current->thread.vrsave);
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#endif
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if (vcpu->arch.hfscr & HFSCR_EBB) {
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if (vcpu->arch.bescr != current->thread.bescr)
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mtspr(SPRN_BESCR, current->thread.bescr);
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if (vcpu->arch.ebbhr != current->thread.ebbhr)
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mtspr(SPRN_EBBHR, current->thread.ebbhr);
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if (vcpu->arch.ebbrr != current->thread.ebbrr)
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mtspr(SPRN_EBBRR, current->thread.ebbrr);
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if (!vcpu->arch.nested) {
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/*
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* This is like load_fp in context switching, turn off
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* the facility after it wraps the u8 to try avoiding
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* saving and restoring the registers each partition
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* switch.
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*/
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vcpu->arch.load_ebb++;
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if (!vcpu->arch.load_ebb)
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vcpu->arch.hfscr &= ~HFSCR_EBB;
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}
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}
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if (vcpu->arch.tar != current->thread.tar)
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mtspr(SPRN_TAR, current->thread.tar);
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}
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EXPORT_SYMBOL_GPL(restore_p9_host_os_sprs);
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