Merge branch 'sched/urgent'; commit 'v2.6.29-rc5' into sched/core
This commit is contained in:
Коммит
5274f8354d
|
@ -137,7 +137,7 @@ static void cn_test_timer_func(unsigned long __data)
|
|||
|
||||
memcpy(m + 1, data, m->len);
|
||||
|
||||
cn_netlink_send(m, 0, gfp_any());
|
||||
cn_netlink_send(m, 0, GFP_ATOMIC);
|
||||
kfree(m);
|
||||
}
|
||||
|
||||
|
@ -160,10 +160,8 @@ static int cn_test_init(void)
|
|||
goto err_out;
|
||||
}
|
||||
|
||||
init_timer(&cn_test_timer);
|
||||
cn_test_timer.function = cn_test_timer_func;
|
||||
setup_timer(&cn_test_timer, cn_test_timer_func, 0);
|
||||
cn_test_timer.expires = jiffies + HZ;
|
||||
cn_test_timer.data = 0;
|
||||
add_timer(&cn_test_timer);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -43,7 +43,8 @@ Only comments so marked will be considered by the kernel-doc scripts,
|
|||
and any comment so marked must be in kernel-doc format. Do not use
|
||||
"/**" to be begin a comment block unless the comment block contains
|
||||
kernel-doc formatted comments. The closing comment marker for
|
||||
kernel-doc comments can be either "*/" or "**/".
|
||||
kernel-doc comments can be either "*/" or "**/", but "*/" is
|
||||
preferred in the Linux kernel tree.
|
||||
|
||||
Kernel-doc comments should be placed just before the function
|
||||
or data structure being described.
|
||||
|
@ -63,7 +64,7 @@ Example kernel-doc function comment:
|
|||
* comment lines.
|
||||
*
|
||||
* The longer description can have multiple paragraphs.
|
||||
**/
|
||||
*/
|
||||
|
||||
The first line, with the short description, must be on a single line.
|
||||
|
||||
|
@ -85,7 +86,7 @@ Example kernel-doc data structure comment.
|
|||
* perhaps with more lines and words.
|
||||
*
|
||||
* Longer description of this structure.
|
||||
**/
|
||||
*/
|
||||
|
||||
The kernel-doc function comments describe each parameter to the
|
||||
function, in order, with the @name lines.
|
||||
|
|
|
@ -937,6 +937,8 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
|
||||
|
||||
intel_iommu= [DMAR] Intel IOMMU driver (DMAR) option
|
||||
on
|
||||
Enable intel iommu driver.
|
||||
off
|
||||
Disable intel iommu driver.
|
||||
igfx_off [Default Off]
|
||||
|
|
12
MAINTAINERS
12
MAINTAINERS
|
@ -1202,6 +1202,8 @@ S: Supported
|
|||
CONTROL GROUPS (CGROUPS)
|
||||
P: Paul Menage
|
||||
M: menage@google.com
|
||||
P: Li Zefan
|
||||
M: lizf@cn.fujitsu.com
|
||||
L: containers@lists.linux-foundation.org
|
||||
S: Maintained
|
||||
|
||||
|
@ -3537,6 +3539,12 @@ S: Maintained
|
|||
PXA MMCI DRIVER
|
||||
S: Orphan
|
||||
|
||||
PXA RTC DRIVER
|
||||
P: Robert Jarzmik
|
||||
M: robert.jarzmik@free.fr
|
||||
L: rtc-linux@googlegroups.com
|
||||
S: Maintained
|
||||
|
||||
QLOGIC QLA2XXX FC-SCSI DRIVER
|
||||
P: Andrew Vasquez
|
||||
M: linux-driver@qlogic.com
|
||||
|
@ -4285,8 +4293,8 @@ P: Rajiv Andrade
|
|||
M: srajiv@linux.vnet.ibm.com
|
||||
W: http://tpmdd.sourceforge.net
|
||||
P: Marcel Selhorst
|
||||
M: tpm@selhorst.net
|
||||
W: http://www.prosec.rub.de/tpm/
|
||||
M: m.selhorst@sirrix.com
|
||||
W: http://www.sirrix.com
|
||||
L: tpmdd-devel@lists.sourceforge.net (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 29
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Erotic Pickled Herring
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -13,8 +13,8 @@
|
|||
#include <asm/cacheflush.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
const extern unsigned char relocate_new_kernel[];
|
||||
const extern unsigned int relocate_new_kernel_size;
|
||||
extern const unsigned char relocate_new_kernel[];
|
||||
extern const unsigned int relocate_new_kernel_size;
|
||||
|
||||
extern void setup_mm_for_reboot(char mode);
|
||||
|
||||
|
|
|
@ -121,6 +121,16 @@ int __init pxa_init_dma(int num_ch)
|
|||
if (dma_channels == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
/* dma channel priorities on pxa2xx processors:
|
||||
* ch 0 - 3, 16 - 19 <--> (0) DMA_PRIO_HIGH
|
||||
* ch 4 - 7, 20 - 23 <--> (1) DMA_PRIO_MEDIUM
|
||||
* ch 8 - 15, 24 - 31 <--> (2) DMA_PRIO_LOW
|
||||
*/
|
||||
for (i = 0; i < num_ch; i++) {
|
||||
DCSR(i) = 0;
|
||||
dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW);
|
||||
}
|
||||
|
||||
ret = request_irq(IRQ_DMA, dma_irq_handler, IRQF_DISABLED, "DMA", NULL);
|
||||
if (ret) {
|
||||
printk (KERN_CRIT "Wow! Can't register IRQ for DMA\n");
|
||||
|
@ -128,14 +138,6 @@ int __init pxa_init_dma(int num_ch)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/* dma channel priorities on pxa2xx processors:
|
||||
* ch 0 - 3, 16 - 19 <--> (0) DMA_PRIO_HIGH
|
||||
* ch 4 - 7, 20 - 23 <--> (1) DMA_PRIO_MEDIUM
|
||||
* ch 8 - 15, 24 - 31 <--> (2) DMA_PRIO_LOW
|
||||
*/
|
||||
for (i = 0; i < num_ch; i++)
|
||||
dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW);
|
||||
|
||||
num_dma_channels = num_ch;
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -1,6 +1,8 @@
|
|||
#ifndef __ASM_ARCH_REGS_AC97_H
|
||||
#define __ASM_ARCH_REGS_AC97_H
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
/*
|
||||
* AC97 Controller registers
|
||||
*/
|
||||
|
|
|
@ -41,6 +41,9 @@
|
|||
#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
|
||||
#define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */
|
||||
#define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
|
||||
#define SSCR0_EDSS (1 << 20) /* Extended data size select */
|
||||
#define SSCR0_NCS (1 << 21) /* Network clock select */
|
||||
#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */
|
||||
|
|
|
@ -88,13 +88,13 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
|
|||
static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);
|
||||
|
||||
static struct clk_lookup common_clkregs[] = {
|
||||
INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", "NANDCLK"),
|
||||
INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
|
||||
};
|
||||
|
||||
static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
|
||||
|
||||
static struct clk_lookup pxa310_clkregs[] = {
|
||||
INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", "MMCCLK"),
|
||||
INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", NULL),
|
||||
};
|
||||
|
||||
static int __init pxa300_init(void)
|
||||
|
|
|
@ -83,7 +83,7 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
|
|||
static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
|
||||
|
||||
static struct clk_lookup pxa320_clkregs[] = {
|
||||
INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", "NANDCLK"),
|
||||
INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
|
||||
};
|
||||
|
||||
static int __init pxa320_init(void)
|
||||
|
|
|
@ -36,10 +36,10 @@
|
|||
#include <linux/vmalloc.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/hardirq.h>
|
||||
|
||||
#include <asm/pgalloc.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/hardirq.h>
|
||||
#include <asm/mmu_context.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/mmu.h>
|
||||
|
|
|
@ -51,6 +51,7 @@ static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
|
|||
|
||||
return (((counters >> 14) - counters) & 0x1fff) > 1;
|
||||
}
|
||||
#define __raw_spin_is_contended __raw_spin_is_contended
|
||||
|
||||
static inline void __raw_spin_lock(raw_spinlock_t *lock)
|
||||
{
|
||||
|
|
|
@ -191,7 +191,8 @@
|
|||
interrupts = <37 0x8 36 0x8 35 0x8>;
|
||||
interrupt-parent = <&ipic>;
|
||||
tbi-handle = < &tbi0 >;
|
||||
phy-handle = < &phy1 >;
|
||||
/* Vitesse 7385 isn't on the MDIO bus */
|
||||
fixed-link = <1 1 1000 0 0>;
|
||||
fsl,magic-packet;
|
||||
|
||||
mdio@24520 {
|
||||
|
@ -199,12 +200,6 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x24520 0x20>;
|
||||
phy1: ethernet-phy@1 {
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <19 0x8>;
|
||||
reg = <0x1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy4: ethernet-phy@4 {
|
||||
interrupt-parent = <&ipic>;
|
||||
interrupts = <20 0x8>;
|
||||
|
@ -219,6 +214,8 @@
|
|||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
|
|
|
@ -651,7 +651,7 @@ CONFIG_CICADA_PHY=y
|
|||
# CONFIG_NATIONAL_PHY is not set
|
||||
# CONFIG_STE10XP is not set
|
||||
# CONFIG_LSI_ET1011C_PHY is not set
|
||||
# CONFIG_FIXED_PHY is not set
|
||||
CONFIG_FIXED_PHY=y
|
||||
# CONFIG_MDIO_BITBANG is not set
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
|
|
|
@ -195,8 +195,9 @@ __ftrace_make_nop(struct module *mod,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
offset = (unsigned)((unsigned short)jmp[0]) << 16 |
|
||||
(unsigned)((unsigned short)jmp[1]);
|
||||
/* The bottom half is signed extended */
|
||||
offset = ((unsigned)((unsigned short)jmp[0]) << 16) +
|
||||
(int)((short)jmp[1]);
|
||||
|
||||
DEBUGP(" %x ", offset);
|
||||
|
||||
|
|
|
@ -561,8 +561,21 @@ int pci_mmap_legacy_page_range(struct pci_bus *bus,
|
|||
(unsigned long long)(offset + size - 1));
|
||||
|
||||
if (mmap_state == pci_mmap_mem) {
|
||||
if ((offset + size) > hose->isa_mem_size)
|
||||
return -ENXIO;
|
||||
/* Hack alert !
|
||||
*
|
||||
* Because X is lame and can fail starting if it gets an error trying
|
||||
* to mmap legacy_mem (instead of just moving on without legacy memory
|
||||
* access) we fake it here by giving it anonymous memory, effectively
|
||||
* behaving just like /dev/zero
|
||||
*/
|
||||
if ((offset + size) > hose->isa_mem_size) {
|
||||
printk(KERN_DEBUG
|
||||
"Process %s (pid:%d) mapped non-existing PCI legacy memory for 0%04x:%02x\n",
|
||||
current->comm, current->pid, pci_domain_nr(bus), bus->number);
|
||||
if (vma->vm_flags & VM_SHARED)
|
||||
return shmem_zero_setup(vma);
|
||||
return 0;
|
||||
}
|
||||
offset += hose->isa_mem_phys;
|
||||
} else {
|
||||
unsigned long io_offset = (unsigned long)hose->io_base_virt - _IO_BASE;
|
||||
|
|
|
@ -172,6 +172,8 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
|
|||
}
|
||||
break;
|
||||
case 0x378: /* orx */
|
||||
if (instr & 1)
|
||||
break;
|
||||
rs = (instr >> 21) & 0x1f;
|
||||
rb = (instr >> 11) & 0x1f;
|
||||
if (rs == rb) { /* mr */
|
||||
|
|
|
@ -73,7 +73,7 @@ extern unsigned int tlbcam_index;
|
|||
/*
|
||||
* Return PA for this VA if it is mapped by a CAM, or 0
|
||||
*/
|
||||
unsigned long v_mapped_by_tlbcam(unsigned long va)
|
||||
phys_addr_t v_mapped_by_tlbcam(unsigned long va)
|
||||
{
|
||||
int b;
|
||||
for (b = 0; b < tlbcam_index; ++b)
|
||||
|
@ -85,7 +85,7 @@ unsigned long v_mapped_by_tlbcam(unsigned long va)
|
|||
/*
|
||||
* Return VA for a given PA or 0 if not mapped
|
||||
*/
|
||||
unsigned long p_mapped_by_tlbcam(unsigned long pa)
|
||||
unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
|
||||
{
|
||||
int b;
|
||||
for (b = 0; b < tlbcam_index; ++b)
|
||||
|
|
|
@ -320,7 +320,7 @@ _GLOBAL(create_hpte)
|
|||
and r8,r8,r0 /* writable if _RW & _DIRTY */
|
||||
rlwimi r5,r5,32-1,30,30 /* _PAGE_USER -> PP msb */
|
||||
rlwimi r5,r5,32-2,31,31 /* _PAGE_USER -> PP lsb */
|
||||
ori r8,r8,0xe14 /* clear out reserved bits and M */
|
||||
ori r8,r8,0xe04 /* clear out reserved bits */
|
||||
andc r8,r5,r8 /* PP = user? (rw&dirty? 2: 3): 0 */
|
||||
BEGIN_FTR_SECTION
|
||||
rlwinm r8,r8,0,~_PAGE_COHERENT /* clear M (coherence not required) */
|
||||
|
|
|
@ -61,8 +61,8 @@ void setbat(int index, unsigned long virt, phys_addr_t phys,
|
|||
|
||||
#ifdef HAVE_TLBCAM
|
||||
extern unsigned int tlbcam_index;
|
||||
extern unsigned long v_mapped_by_tlbcam(unsigned long va);
|
||||
extern unsigned long p_mapped_by_tlbcam(unsigned long pa);
|
||||
extern phys_addr_t v_mapped_by_tlbcam(unsigned long va);
|
||||
extern unsigned long p_mapped_by_tlbcam(phys_addr_t pa);
|
||||
#else /* !HAVE_TLBCAM */
|
||||
#define v_mapped_by_tlbcam(x) (0UL)
|
||||
#define p_mapped_by_tlbcam(x) (0UL)
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/smp.h>
|
||||
#include <linux/slab.h>
|
||||
#include <asm/cell-pmu.h>
|
||||
#include <asm/time.h>
|
||||
#include "pr_util.h"
|
||||
|
||||
#define SCALE_SHIFT 14
|
||||
|
|
|
@ -186,7 +186,7 @@ out_unmap_regs:
|
|||
iounmap(priv->regs);
|
||||
out_free_bootmem:
|
||||
free_bootmem((unsigned long)priv,
|
||||
sizeof(sizeof(struct pq2ads_pci_pic)));
|
||||
sizeof(struct pq2ads_pci_pic));
|
||||
of_node_put(np);
|
||||
out_unmap_irq:
|
||||
irq_dispose_mapping(irq);
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <asm/firmware.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pSeries_reconfig.h>
|
||||
#include <asm/sparsemem.h>
|
||||
|
||||
static int pseries_remove_lmb(unsigned long base, unsigned int lmb_size)
|
||||
{
|
||||
|
|
|
@ -165,7 +165,7 @@ static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
|
|||
edibit = (14 - (src - CPM2_IRQ_EXT1));
|
||||
else
|
||||
if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0)
|
||||
edibit = (31 - (src - CPM2_IRQ_PORTC15));
|
||||
edibit = (31 - (CPM2_IRQ_PORTC0 - src));
|
||||
else
|
||||
return (flow_type & IRQ_TYPE_LEVEL_LOW) ? 0 : -EINVAL;
|
||||
|
||||
|
|
|
@ -890,7 +890,7 @@ unsigned int ipic_get_irq(void)
|
|||
return irq_linear_revmap(primary_ipic->irqhost, irq);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
#ifdef CONFIG_SUSPEND
|
||||
static struct {
|
||||
u32 sicfr;
|
||||
u32 siprr[2];
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.28-rc6
|
||||
# Thu Nov 27 11:00:49 2008
|
||||
# Linux kernel version: 2.6.29-rc4
|
||||
# Wed Feb 11 10:07:16 2009
|
||||
#
|
||||
CONFIG_SCHED_MC=y
|
||||
CONFIG_MMU=y
|
||||
|
@ -14,12 +14,14 @@ CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
|||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_NO_IOMEM=y
|
||||
CONFIG_NO_DMA=y
|
||||
CONFIG_GENERIC_LOCKBREAK=y
|
||||
CONFIG_PGSTE=y
|
||||
CONFIG_VIRT_CPU_ACCOUNTING=y
|
||||
CONFIG_S390=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
|
@ -39,20 +41,29 @@ CONFIG_POSIX_MQUEUE=y
|
|||
# CONFIG_TASKSTATS is not set
|
||||
CONFIG_AUDIT=y
|
||||
# CONFIG_AUDITSYSCALL is not set
|
||||
|
||||
#
|
||||
# RCU Subsystem
|
||||
#
|
||||
CONFIG_CLASSIC_RCU=y
|
||||
# CONFIG_TREE_RCU is not set
|
||||
# CONFIG_PREEMPT_RCU is not set
|
||||
# CONFIG_TREE_RCU_TRACE is not set
|
||||
# CONFIG_PREEMPT_RCU_TRACE is not set
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=17
|
||||
CONFIG_GROUP_SCHED=y
|
||||
CONFIG_FAIR_GROUP_SCHED=y
|
||||
# CONFIG_RT_GROUP_SCHED is not set
|
||||
CONFIG_USER_SCHED=y
|
||||
# CONFIG_CGROUP_SCHED is not set
|
||||
CONFIG_CGROUPS=y
|
||||
# CONFIG_CGROUP_DEBUG is not set
|
||||
CONFIG_CGROUP_NS=y
|
||||
# CONFIG_CGROUP_FREEZER is not set
|
||||
# CONFIG_CGROUP_DEVICE is not set
|
||||
# CONFIG_CPUSETS is not set
|
||||
CONFIG_GROUP_SCHED=y
|
||||
CONFIG_FAIR_GROUP_SCHED=y
|
||||
# CONFIG_RT_GROUP_SCHED is not set
|
||||
CONFIG_USER_SCHED=y
|
||||
# CONFIG_CGROUP_SCHED is not set
|
||||
# CONFIG_CGROUP_CPUACCT is not set
|
||||
# CONFIG_RESOURCE_COUNTERS is not set
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
|
@ -63,6 +74,7 @@ CONFIG_UTS_NS=y
|
|||
CONFIG_IPC_NS=y
|
||||
# CONFIG_USER_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
# CONFIG_NET_NS is not set
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
|
@ -91,17 +103,17 @@ CONFIG_SLAB=y
|
|||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
# CONFIG_PROFILING is not set
|
||||
# CONFIG_MARKERS is not set
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_HAVE_SYSCALL_WRAPPERS=y
|
||||
CONFIG_KRETPROBES=y
|
||||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_USE_GENERIC_SMP_HELPERS=y
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_MODULE_FORCE_LOAD is not set
|
||||
|
@ -109,7 +121,7 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
CONFIG_MODVERSIONS=y
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
CONFIG_INIT_ALL_POSSIBLE=y
|
||||
CONFIG_STOP_MACHINE=y
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
|
@ -130,7 +142,6 @@ CONFIG_DEFAULT_DEADLINE=y
|
|||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="deadline"
|
||||
CONFIG_PREEMPT_NOTIFIERS=y
|
||||
CONFIG_CLASSIC_RCU=y
|
||||
# CONFIG_FREEZER is not set
|
||||
|
||||
#
|
||||
|
@ -161,6 +172,7 @@ CONFIG_S390_EXEC_PROTECT=y
|
|||
CONFIG_MARCH_Z900=y
|
||||
# CONFIG_MARCH_Z990 is not set
|
||||
# CONFIG_MARCH_Z9_109 is not set
|
||||
# CONFIG_MARCH_Z10 is not set
|
||||
CONFIG_PACK_STACK=y
|
||||
# CONFIG_SMALL_STACK is not set
|
||||
CONFIG_CHECK_STACK=y
|
||||
|
@ -174,7 +186,6 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
|
|||
# CONFIG_PREEMPT_NONE is not set
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_PREEMPT_RCU is not set
|
||||
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
||||
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
|
||||
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
|
||||
|
@ -195,7 +206,6 @@ CONFIG_MEMORY_HOTREMOVE=y
|
|||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_RESOURCES_64BIT=y
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
|
@ -207,7 +217,6 @@ CONFIG_UNEVICTABLE_LRU=y
|
|||
#
|
||||
CONFIG_MACHCHK_WARNING=y
|
||||
CONFIG_QDIO=y
|
||||
# CONFIG_QDIO_DEBUG is not set
|
||||
CONFIG_CHSC_SCH=m
|
||||
|
||||
#
|
||||
|
@ -227,15 +236,13 @@ CONFIG_PFAULT=y
|
|||
# CONFIG_SHARED_KERNEL is not set
|
||||
# CONFIG_CMM is not set
|
||||
# CONFIG_PAGE_STATES is not set
|
||||
CONFIG_VIRT_TIMER=y
|
||||
CONFIG_VIRT_CPU_ACCOUNTING=y
|
||||
# CONFIG_APPLDATA_BASE is not set
|
||||
CONFIG_HZ_100=y
|
||||
# CONFIG_HZ_250 is not set
|
||||
# CONFIG_HZ_300 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
CONFIG_HZ=100
|
||||
# CONFIG_SCHED_HRTICK is not set
|
||||
CONFIG_SCHED_HRTICK=y
|
||||
CONFIG_S390_HYPFS_FS=y
|
||||
CONFIG_KEXEC=y
|
||||
# CONFIG_ZFCPDUMP is not set
|
||||
|
@ -245,6 +252,7 @@ CONFIG_NET=y
|
|||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
CONFIG_PACKET=y
|
||||
# CONFIG_PACKET_MMAP is not set
|
||||
CONFIG_UNIX=y
|
||||
|
@ -383,6 +391,7 @@ CONFIG_NET_SCH_TBF=m
|
|||
CONFIG_NET_SCH_GRED=m
|
||||
CONFIG_NET_SCH_DSMARK=m
|
||||
# CONFIG_NET_SCH_NETEM is not set
|
||||
# CONFIG_NET_SCH_DRR is not set
|
||||
# CONFIG_NET_SCH_INGRESS is not set
|
||||
|
||||
#
|
||||
|
@ -400,6 +409,7 @@ CONFIG_CLS_U32_MARK=y
|
|||
CONFIG_NET_CLS_RSVP=m
|
||||
CONFIG_NET_CLS_RSVP6=m
|
||||
CONFIG_NET_CLS_FLOW=m
|
||||
# CONFIG_NET_CLS_CGROUP is not set
|
||||
# CONFIG_NET_EMATCH is not set
|
||||
CONFIG_NET_CLS_ACT=y
|
||||
CONFIG_NET_ACT_POLICE=y
|
||||
|
@ -411,6 +421,7 @@ CONFIG_NET_ACT_NAT=m
|
|||
# CONFIG_NET_ACT_SKBEDIT is not set
|
||||
# CONFIG_NET_CLS_IND is not set
|
||||
CONFIG_NET_SCH_FIFO=y
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
|
@ -428,6 +439,7 @@ CONFIG_CAN_VCAN=m
|
|||
# CONFIG_CAN_DEBUG_DEVICES is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_WIMAX is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
# CONFIG_NET_9P is not set
|
||||
# CONFIG_PCMCIA is not set
|
||||
|
@ -475,10 +487,14 @@ CONFIG_DASD_DIAG=y
|
|||
CONFIG_DASD_EER=y
|
||||
CONFIG_VIRTIO_BLK=m
|
||||
CONFIG_MISC_DEVICES=y
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
# CONFIG_ENCLOSURE_SERVICES is not set
|
||||
# CONFIG_C2PORT is not set
|
||||
|
||||
#
|
||||
# EEPROM support
|
||||
#
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
|
@ -520,6 +536,7 @@ CONFIG_SCSI_FC_ATTRS=y
|
|||
# CONFIG_SCSI_SRP_ATTRS is not set
|
||||
CONFIG_SCSI_LOWLEVEL=y
|
||||
# CONFIG_ISCSI_TCP is not set
|
||||
# CONFIG_LIBFC is not set
|
||||
# CONFIG_SCSI_DEBUG is not set
|
||||
CONFIG_ZFCP=y
|
||||
CONFIG_SCSI_DH=m
|
||||
|
@ -566,6 +583,10 @@ CONFIG_NET_ETHERNET=y
|
|||
CONFIG_NETDEV_1000=y
|
||||
CONFIG_NETDEV_10000=y
|
||||
# CONFIG_TR is not set
|
||||
|
||||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
#
|
||||
# CONFIG_WAN is not set
|
||||
|
||||
#
|
||||
|
@ -593,9 +614,11 @@ CONFIG_VIRTIO_NET=m
|
|||
#
|
||||
CONFIG_DEVKMEM=y
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
CONFIG_HVC_DRIVER=y
|
||||
CONFIG_HVC_IUCV=y
|
||||
CONFIG_VIRTIO_CONSOLE=y
|
||||
CONFIG_HW_RANDOM=m
|
||||
CONFIG_HW_RANDOM_VIRTIO=m
|
||||
|
@ -645,7 +668,6 @@ CONFIG_S390_VMUR=m
|
|||
# CONFIG_NEW_LEDS is not set
|
||||
CONFIG_ACCESSIBILITY=y
|
||||
# CONFIG_STAGING is not set
|
||||
CONFIG_STAGING_EXCLUDE_BUILD=y
|
||||
|
||||
#
|
||||
# File systems
|
||||
|
@ -668,6 +690,7 @@ CONFIG_FILE_LOCKING=y
|
|||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_BTRFS_FS is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
|
@ -703,10 +726,7 @@ CONFIG_TMPFS_POSIX_ACL=y
|
|||
# CONFIG_HUGETLBFS is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_CONFIGFS_FS=m
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
CONFIG_MISC_FILESYSTEMS=y
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
|
@ -715,6 +735,7 @@ CONFIG_CONFIGFS_FS=m
|
|||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_SQUASHFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_OMFS_FS is not set
|
||||
|
@ -808,6 +829,7 @@ CONFIG_DEBUG_BUGVERBOSE=y
|
|||
CONFIG_DEBUG_MEMORY_INIT=y
|
||||
# CONFIG_DEBUG_LIST is not set
|
||||
# CONFIG_DEBUG_SG is not set
|
||||
# CONFIG_DEBUG_NOTIFIERS is not set
|
||||
# CONFIG_FRAME_POINTER is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
|
@ -818,15 +840,19 @@ CONFIG_DEBUG_MEMORY_INIT=y
|
|||
# CONFIG_FAULT_INJECTION is not set
|
||||
# CONFIG_LATENCYTOP is not set
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
|
||||
#
|
||||
# Tracers
|
||||
#
|
||||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_PREEMPT_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
# CONFIG_TRACE_BRANCH_PROFILING is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
|
||||
CONFIG_SAMPLES=y
|
||||
# CONFIG_SAMPLE_KOBJECT is not set
|
||||
|
@ -847,11 +873,17 @@ CONFIG_CRYPTO=y
|
|||
#
|
||||
CONFIG_CRYPTO_FIPS=y
|
||||
CONFIG_CRYPTO_ALGAPI=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_ALGAPI2=y
|
||||
CONFIG_CRYPTO_AEAD=m
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_BLKCIPHER=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_RNG=y
|
||||
CONFIG_CRYPTO_BLKCIPHER2=y
|
||||
CONFIG_CRYPTO_HASH=m
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_RNG=m
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_GF128MUL=m
|
||||
# CONFIG_CRYPTO_NULL is not set
|
||||
# CONFIG_CRYPTO_CRYPTD is not set
|
||||
|
@ -885,7 +917,7 @@ CONFIG_CRYPTO_HMAC=m
|
|||
#
|
||||
# Digest
|
||||
#
|
||||
# CONFIG_CRYPTO_CRC32C is not set
|
||||
CONFIG_CRYPTO_CRC32C=m
|
||||
# CONFIG_CRYPTO_MD4 is not set
|
||||
CONFIG_CRYPTO_MD5=m
|
||||
# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
||||
|
@ -942,6 +974,7 @@ CONFIG_S390_PRNG=m
|
|||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=m
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
CONFIG_CRC_T10DIF=y
|
||||
|
|
|
@ -384,8 +384,8 @@ struct _lowcore
|
|||
__u32 panic_magic; /* 0xe00 */
|
||||
|
||||
/* Per cpu primary space access list */
|
||||
__u8 pad_0xe04[0xe3c-0xe04]; /* 0xe04 */
|
||||
__u32 vdso_per_cpu_data; /* 0xe3c */
|
||||
__u8 pad_0xe04[0xe38-0xe04]; /* 0xe04 */
|
||||
__u64 vdso_per_cpu_data; /* 0xe38 */
|
||||
__u32 paste[16]; /* 0xe40 */
|
||||
|
||||
__u8 pad13[0x11b8-0xe80]; /* 0xe80 */
|
||||
|
|
|
@ -95,6 +95,7 @@ asmlinkage void do_softirq(void)
|
|||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PROC_FS
|
||||
void init_irq_proc(void)
|
||||
{
|
||||
struct proc_dir_entry *root_irq_dir;
|
||||
|
@ -102,3 +103,4 @@ void init_irq_proc(void)
|
|||
root_irq_dir = proc_mkdir("irq", NULL);
|
||||
create_prof_cpu_mask(root_irq_dir);
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -891,10 +891,35 @@ prom_tba: .xword 0
|
|||
tlb_type: .word 0 /* Must NOT end up in BSS */
|
||||
.section ".fixup",#alloc,#execinstr
|
||||
|
||||
.globl __ret_efault, __retl_efault
|
||||
__ret_efault:
|
||||
.globl __ret_efault, __retl_efault, __ret_one, __retl_one
|
||||
ENTRY(__ret_efault)
|
||||
ret
|
||||
restore %g0, -EFAULT, %o0
|
||||
__retl_efault:
|
||||
ENDPROC(__ret_efault)
|
||||
|
||||
ENTRY(__retl_efault)
|
||||
retl
|
||||
mov -EFAULT, %o0
|
||||
ENDPROC(__retl_efault)
|
||||
|
||||
ENTRY(__retl_one)
|
||||
retl
|
||||
mov 1, %o0
|
||||
ENDPROC(__retl_one)
|
||||
|
||||
ENTRY(__ret_one_asi)
|
||||
wr %g0, ASI_AIUS, %asi
|
||||
ret
|
||||
restore %g0, 1, %o0
|
||||
ENDPROC(__ret_one_asi)
|
||||
|
||||
ENTRY(__retl_one_asi)
|
||||
wr %g0, ASI_AIUS, %asi
|
||||
retl
|
||||
mov 1, %o0
|
||||
ENDPROC(__retl_one_asi)
|
||||
|
||||
ENTRY(__retl_o1)
|
||||
retl
|
||||
mov %o1, %o0
|
||||
ENDPROC(__retl_o1)
|
||||
|
|
|
@ -70,6 +70,7 @@ static void die_nmi(const char *str, struct pt_regs *regs, int do_panic)
|
|||
printk(" on CPU%d, ip %08lx, registers:\n",
|
||||
smp_processor_id(), regs->tpc);
|
||||
show_regs(regs);
|
||||
dump_stack();
|
||||
|
||||
bust_spinlocks(0);
|
||||
|
||||
|
|
|
@ -133,11 +133,16 @@ int __init pcr_arch_init(void)
|
|||
|
||||
case cheetah:
|
||||
case cheetah_plus:
|
||||
case spitfire:
|
||||
pcr_ops = &direct_pcr_ops;
|
||||
pcr_enable = PCR_SUN4U_ENABLE;
|
||||
break;
|
||||
|
||||
case spitfire:
|
||||
/* UltraSPARC-I/II and derivatives lack a profile
|
||||
* counter overflow interrupt so we can't make use of
|
||||
* their hardware currently.
|
||||
*/
|
||||
/* fallthrough */
|
||||
default:
|
||||
err = -ENODEV;
|
||||
goto out_unregister;
|
||||
|
|
|
@ -6,13 +6,9 @@
|
|||
|
||||
#define EX_ST(x,y) \
|
||||
98: x,y; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: retl; \
|
||||
mov %o1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_o1; \
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
|
|
@ -5,13 +5,9 @@
|
|||
|
||||
#define EX_LD(x) \
|
||||
98: x; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: retl; \
|
||||
mov 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_one; \
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
@ -27,7 +23,7 @@
|
|||
#define PREAMBLE \
|
||||
rd %asi, %g1; \
|
||||
cmp %g1, ASI_AIUS; \
|
||||
bne,pn %icc, memcpy_user_stub; \
|
||||
bne,pn %icc, ___copy_in_user; \
|
||||
nop
|
||||
#endif
|
||||
|
||||
|
|
|
@ -5,13 +5,9 @@
|
|||
|
||||
#define EX_ST(x) \
|
||||
98: x; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: retl; \
|
||||
mov 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_one; \
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
@ -31,7 +27,7 @@
|
|||
#define PREAMBLE \
|
||||
rd %asi, %g1; \
|
||||
cmp %g1, ASI_AIUS; \
|
||||
bne,pn %icc, memcpy_user_stub; \
|
||||
bne,pn %icc, ___copy_in_user; \
|
||||
nop
|
||||
#endif
|
||||
|
||||
|
|
|
@ -5,14 +5,9 @@
|
|||
|
||||
#define EX_LD(x) \
|
||||
98: x; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: wr %g0, ASI_AIUS, %asi;\
|
||||
retl; \
|
||||
mov 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_one_asi;\
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
@ -33,7 +28,7 @@
|
|||
#define PREAMBLE \
|
||||
rd %asi, %g1; \
|
||||
cmp %g1, ASI_AIUS; \
|
||||
bne,pn %icc, memcpy_user_stub; \
|
||||
bne,pn %icc, ___copy_in_user; \
|
||||
nop
|
||||
#endif
|
||||
|
||||
|
|
|
@ -5,14 +5,9 @@
|
|||
|
||||
#define EX_ST(x) \
|
||||
98: x; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: wr %g0, ASI_AIUS, %asi;\
|
||||
retl; \
|
||||
mov 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_one_asi;\
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
@ -42,7 +37,7 @@
|
|||
#define PREAMBLE \
|
||||
rd %asi, %g1; \
|
||||
cmp %g1, ASI_AIUS; \
|
||||
bne,pn %icc, memcpy_user_stub; \
|
||||
bne,pn %icc, ___copy_in_user; \
|
||||
nop
|
||||
#endif
|
||||
|
||||
|
|
|
@ -6,13 +6,9 @@
|
|||
|
||||
#define EX_ST(x,y) \
|
||||
98: x,y; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: retl; \
|
||||
mov %o1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_o1; \
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
|
|
@ -5,14 +5,9 @@
|
|||
|
||||
#define EX_LD(x) \
|
||||
98: x; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: wr %g0, ASI_AIUS, %asi;\
|
||||
ret; \
|
||||
restore %g0, 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __ret_one_asi;\
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
@ -30,7 +25,7 @@
|
|||
#define PREAMBLE \
|
||||
rd %asi, %g1; \
|
||||
cmp %g1, ASI_AIUS; \
|
||||
bne,pn %icc, memcpy_user_stub; \
|
||||
bne,pn %icc, ___copy_in_user; \
|
||||
nop
|
||||
#endif
|
||||
|
||||
|
|
|
@ -5,14 +5,9 @@
|
|||
|
||||
#define EX_ST(x) \
|
||||
98: x; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: wr %g0, ASI_AIUS, %asi;\
|
||||
ret; \
|
||||
restore %g0, 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __ret_one_asi;\
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
@ -33,7 +28,7 @@
|
|||
#define PREAMBLE \
|
||||
rd %asi, %g1; \
|
||||
cmp %g1, ASI_AIUS; \
|
||||
bne,pn %icc, memcpy_user_stub; \
|
||||
bne,pn %icc, ___copy_in_user; \
|
||||
nop
|
||||
#endif
|
||||
|
||||
|
|
|
@ -5,13 +5,9 @@
|
|||
|
||||
#define EX_LD(x) \
|
||||
98: x; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: retl; \
|
||||
mov 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_one; \
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
@ -27,7 +23,7 @@
|
|||
#define PREAMBLE \
|
||||
rd %asi, %g1; \
|
||||
cmp %g1, ASI_AIUS; \
|
||||
bne,pn %icc, memcpy_user_stub; \
|
||||
bne,pn %icc, ___copy_in_user; \
|
||||
nop; \
|
||||
|
||||
#include "U1memcpy.S"
|
||||
|
|
|
@ -5,13 +5,9 @@
|
|||
|
||||
#define EX_ST(x) \
|
||||
98: x; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: retl; \
|
||||
mov 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_one; \
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
@ -27,7 +23,7 @@
|
|||
#define PREAMBLE \
|
||||
rd %asi, %g1; \
|
||||
cmp %g1, ASI_AIUS; \
|
||||
bne,pn %icc, memcpy_user_stub; \
|
||||
bne,pn %icc, ___copy_in_user; \
|
||||
nop; \
|
||||
|
||||
#include "U1memcpy.S"
|
||||
|
|
|
@ -5,13 +5,9 @@
|
|||
|
||||
#define EX_LD(x) \
|
||||
98: x; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: retl; \
|
||||
mov 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_one; \
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
|
|
@ -5,13 +5,9 @@
|
|||
|
||||
#define EX_ST(x) \
|
||||
98: x; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: retl; \
|
||||
mov 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_one; \
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
@ -27,7 +23,7 @@
|
|||
#define PREAMBLE \
|
||||
rd %asi, %g1; \
|
||||
cmp %g1, ASI_AIUS; \
|
||||
bne,pn %icc, memcpy_user_stub; \
|
||||
bne,pn %icc, ___copy_in_user; \
|
||||
nop; \
|
||||
|
||||
#include "U3memcpy.S"
|
||||
|
|
|
@ -88,13 +88,9 @@ __bzero_done:
|
|||
|
||||
#define EX_ST(x,y) \
|
||||
98: x,y; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: retl; \
|
||||
mov %o1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_o1; \
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
|
|
@ -3,19 +3,16 @@
|
|||
* Copyright (C) 1999, 2000, 2004 David S. Miller (davem@redhat.com)
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/asi.h>
|
||||
|
||||
#define XCC xcc
|
||||
|
||||
#define EX(x,y) \
|
||||
98: x,y; \
|
||||
.section .fixup; \
|
||||
.align 4; \
|
||||
99: retl; \
|
||||
mov 1, %o0; \
|
||||
.section __ex_table,"a";\
|
||||
.align 4; \
|
||||
.word 98b, 99b; \
|
||||
.word 98b, __retl_one; \
|
||||
.text; \
|
||||
.align 4;
|
||||
|
||||
|
@ -31,18 +28,7 @@
|
|||
* to copy register windows around during thread cloning.
|
||||
*/
|
||||
|
||||
.globl ___copy_in_user
|
||||
.type ___copy_in_user,#function
|
||||
___copy_in_user: /* %o0=dst, %o1=src, %o2=len */
|
||||
/* Writing to %asi is _expensive_ so we hardcode it.
|
||||
* Reading %asi to check for KERNEL_DS is comparatively
|
||||
* cheap.
|
||||
*/
|
||||
rd %asi, %g1
|
||||
cmp %g1, ASI_AIUS
|
||||
bne,pn %icc, memcpy_user_stub
|
||||
nop
|
||||
|
||||
ENTRY(___copy_in_user) /* %o0=dst, %o1=src, %o2=len */
|
||||
cmp %o2, 0
|
||||
be,pn %XCC, 85f
|
||||
or %o0, %o1, %o3
|
||||
|
@ -53,22 +39,24 @@ ___copy_in_user: /* %o0=dst, %o1=src, %o2=len */
|
|||
/* 16 < len <= 64 */
|
||||
andcc %o3, 0x7, %g0
|
||||
bne,pn %XCC, 90f
|
||||
sub %o0, %o1, %o3
|
||||
nop
|
||||
|
||||
andn %o2, 0x7, %o4
|
||||
and %o2, 0x7, %o2
|
||||
1: subcc %o4, 0x8, %o4
|
||||
EX(ldxa [%o1] %asi, %o5)
|
||||
EX(stxa %o5, [%o1 + %o3] ASI_AIUS)
|
||||
EX(stxa %o5, [%o0] %asi)
|
||||
add %o1, 0x8, %o1
|
||||
bgu,pt %XCC, 1b
|
||||
add %o1, 0x8, %o1
|
||||
add %o0, 0x8, %o0
|
||||
andcc %o2, 0x4, %g0
|
||||
be,pt %XCC, 1f
|
||||
nop
|
||||
sub %o2, 0x4, %o2
|
||||
EX(lduwa [%o1] %asi, %o5)
|
||||
EX(stwa %o5, [%o1 + %o3] ASI_AIUS)
|
||||
EX(stwa %o5, [%o0] %asi)
|
||||
add %o1, 0x4, %o1
|
||||
add %o0, 0x4, %o0
|
||||
1: cmp %o2, 0
|
||||
be,pt %XCC, 85f
|
||||
nop
|
||||
|
@ -78,14 +66,15 @@ ___copy_in_user: /* %o0=dst, %o1=src, %o2=len */
|
|||
80: /* 0 < len <= 16 */
|
||||
andcc %o3, 0x3, %g0
|
||||
bne,pn %XCC, 90f
|
||||
sub %o0, %o1, %o3
|
||||
nop
|
||||
|
||||
82:
|
||||
subcc %o2, 4, %o2
|
||||
EX(lduwa [%o1] %asi, %g1)
|
||||
EX(stwa %g1, [%o1 + %o3] ASI_AIUS)
|
||||
EX(stwa %g1, [%o0] %asi)
|
||||
add %o1, 4, %o1
|
||||
bgu,pt %XCC, 82b
|
||||
add %o1, 4, %o1
|
||||
add %o0, 4, %o0
|
||||
|
||||
85: retl
|
||||
clr %o0
|
||||
|
@ -94,26 +83,10 @@ ___copy_in_user: /* %o0=dst, %o1=src, %o2=len */
|
|||
90:
|
||||
subcc %o2, 1, %o2
|
||||
EX(lduba [%o1] %asi, %g1)
|
||||
EX(stba %g1, [%o1 + %o3] ASI_AIUS)
|
||||
EX(stba %g1, [%o0] %asi)
|
||||
add %o1, 1, %o1
|
||||
bgu,pt %XCC, 90b
|
||||
add %o1, 1, %o1
|
||||
add %o0, 1, %o0
|
||||
retl
|
||||
clr %o0
|
||||
|
||||
.size ___copy_in_user, .-___copy_in_user
|
||||
|
||||
/* Act like copy_{to,in}_user(), ie. return zero instead
|
||||
* of original destination pointer. This is invoked when
|
||||
* copy_{to,in}_user() finds that %asi is kernel space.
|
||||
*/
|
||||
.globl memcpy_user_stub
|
||||
.type memcpy_user_stub,#function
|
||||
memcpy_user_stub:
|
||||
save %sp, -192, %sp
|
||||
mov %i0, %o0
|
||||
mov %i1, %o1
|
||||
call memcpy
|
||||
mov %i2, %o2
|
||||
ret
|
||||
restore %g0, %g0, %o0
|
||||
.size memcpy_user_stub, .-memcpy_user_stub
|
||||
ENDPROC(___copy_in_user)
|
||||
|
|
|
@ -1802,6 +1802,17 @@ config DMAR
|
|||
and include PCI device scope covered by these DMA
|
||||
remapping devices.
|
||||
|
||||
config DMAR_DEFAULT_ON
|
||||
def_bool n
|
||||
prompt "Enable DMA Remapping Devices by default"
|
||||
depends on DMAR
|
||||
help
|
||||
Selecting this option will enable a DMAR device at boot time if
|
||||
one is found. If this option is not selected, DMAR support can
|
||||
be enabled by passing intel_iommu=on to the kernel. It is
|
||||
recommended you say N here while the DMAR code remains
|
||||
experimental.
|
||||
|
||||
config DMAR_GFX_WA
|
||||
def_bool y
|
||||
prompt "Support for Graphics workaround"
|
||||
|
|
|
@ -167,9 +167,9 @@ config MK7
|
|||
config MK8
|
||||
bool "Opteron/Athlon64/Hammer/K8"
|
||||
help
|
||||
Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
|
||||
use of some extended instructions, and passes appropriate optimization
|
||||
flags to GCC.
|
||||
Select this for an AMD Opteron or Athlon64 Hammer-family processor.
|
||||
Enables use of some extended instructions, and passes appropriate
|
||||
optimization flags to GCC.
|
||||
|
||||
config MCRUSOE
|
||||
bool "Crusoe"
|
||||
|
@ -256,9 +256,11 @@ config MPSC
|
|||
config MCORE2
|
||||
bool "Core 2/newer Xeon"
|
||||
help
|
||||
Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
|
||||
CPUs. You can distinguish newer from older Xeons by the CPU family
|
||||
in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo)
|
||||
|
||||
Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
|
||||
53xx) CPUs. You can distinguish newer from older Xeons by the CPU
|
||||
family in /proc/cpuinfo. Newer ones have 6 and older ones 15
|
||||
(not a typo)
|
||||
|
||||
config GENERIC_CPU
|
||||
bool "Generic-x86-64"
|
||||
|
@ -320,14 +322,14 @@ config X86_PPRO_FENCE
|
|||
bool "PentiumPro memory ordering errata workaround"
|
||||
depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
|
||||
help
|
||||
Old PentiumPro multiprocessor systems had errata that could cause memory
|
||||
operations to violate the x86 ordering standard in rare cases. Enabling this
|
||||
option will attempt to work around some (but not all) occurances of
|
||||
this problem, at the cost of much heavier spinlock and memory barrier
|
||||
operations.
|
||||
Old PentiumPro multiprocessor systems had errata that could cause
|
||||
memory operations to violate the x86 ordering standard in rare cases.
|
||||
Enabling this option will attempt to work around some (but not all)
|
||||
occurances of this problem, at the cost of much heavier spinlock and
|
||||
memory barrier operations.
|
||||
|
||||
If unsure, say n here. Even distro kernels should think twice before enabling
|
||||
this: there are few systems, and an unlikely bug.
|
||||
If unsure, say n here. Even distro kernels should think twice before
|
||||
enabling this: there are few systems, and an unlikely bug.
|
||||
|
||||
config X86_F00F_BUG
|
||||
def_bool y
|
||||
|
|
|
@ -23,8 +23,6 @@
|
|||
*/
|
||||
static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
|
||||
{
|
||||
u16 gs;
|
||||
|
||||
/* changed the size calculations - should hopefully work better. lbt */
|
||||
dump->magic = CMAGIC;
|
||||
dump->start_code = 0;
|
||||
|
@ -57,7 +55,7 @@ static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
|
|||
dump->regs.ds = (u16)regs->ds;
|
||||
dump->regs.es = (u16)regs->es;
|
||||
dump->regs.fs = (u16)regs->fs;
|
||||
savesegment(gs, gs);
|
||||
savesegment(gs, dump->regs.gs);
|
||||
dump->regs.orig_ax = regs->orig_ax;
|
||||
dump->regs.ip = regs->ip;
|
||||
dump->regs.cs = (u16)regs->cs;
|
||||
|
|
|
@ -93,6 +93,7 @@
|
|||
#define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */
|
||||
#define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */
|
||||
#define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */
|
||||
#define X86_FEATURE_CLFLUSH_MONITOR (3*32+25) /* "" clflush reqd with monitor */
|
||||
|
||||
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
|
||||
#define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */
|
||||
|
|
|
@ -1,31 +1,18 @@
|
|||
#ifndef _ASM_X86_MATH_EMU_H
|
||||
#define _ASM_X86_MATH_EMU_H
|
||||
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/vm86.h>
|
||||
|
||||
/* This structure matches the layout of the data saved to the stack
|
||||
following a device-not-present interrupt, part of it saved
|
||||
automatically by the 80386/80486.
|
||||
*/
|
||||
struct info {
|
||||
struct math_emu_info {
|
||||
long ___orig_eip;
|
||||
long ___ebx;
|
||||
long ___ecx;
|
||||
long ___edx;
|
||||
long ___esi;
|
||||
long ___edi;
|
||||
long ___ebp;
|
||||
long ___eax;
|
||||
long ___ds;
|
||||
long ___es;
|
||||
long ___fs;
|
||||
long ___orig_eax;
|
||||
long ___eip;
|
||||
long ___cs;
|
||||
long ___eflags;
|
||||
long ___esp;
|
||||
long ___ss;
|
||||
long ___vm86_es; /* This and the following only in vm86 mode */
|
||||
long ___vm86_ds;
|
||||
long ___vm86_fs;
|
||||
long ___vm86_gs;
|
||||
union {
|
||||
struct pt_regs *regs;
|
||||
struct kernel_vm86_regs *vm86;
|
||||
};
|
||||
};
|
||||
#endif /* _ASM_X86_MATH_EMU_H */
|
||||
|
|
|
@ -60,6 +60,7 @@ extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
|
|||
u32 gsi);
|
||||
extern void mp_config_acpi_legacy_irqs(void);
|
||||
extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low);
|
||||
extern int acpi_probe_gsi(void);
|
||||
#ifdef CONFIG_X86_IO_APIC
|
||||
extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
|
||||
u32 gsi, int triggering, int polarity);
|
||||
|
@ -71,6 +72,11 @@ mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
|
|||
return 0;
|
||||
}
|
||||
#endif
|
||||
#else /* !CONFIG_ACPI: */
|
||||
static inline int acpi_probe_gsi(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_ACPI */
|
||||
|
||||
#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
|
||||
|
|
|
@ -1402,6 +1402,7 @@ static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
|
|||
{
|
||||
return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
|
||||
}
|
||||
#define __raw_spin_is_contended __raw_spin_is_contended
|
||||
|
||||
static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
|
||||
{
|
||||
|
|
|
@ -302,16 +302,30 @@ static inline pte_t pte_mkspecial(pte_t pte)
|
|||
|
||||
extern pteval_t __supported_pte_mask;
|
||||
|
||||
/*
|
||||
* Mask out unsupported bits in a present pgprot. Non-present pgprots
|
||||
* can use those bits for other purposes, so leave them be.
|
||||
*/
|
||||
static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
|
||||
{
|
||||
pgprotval_t protval = pgprot_val(pgprot);
|
||||
|
||||
if (protval & _PAGE_PRESENT)
|
||||
protval &= __supported_pte_mask;
|
||||
|
||||
return protval;
|
||||
}
|
||||
|
||||
static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
|
||||
{
|
||||
return __pte((((phys_addr_t)page_nr << PAGE_SHIFT) |
|
||||
pgprot_val(pgprot)) & __supported_pte_mask);
|
||||
return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
|
||||
massage_pgprot(pgprot));
|
||||
}
|
||||
|
||||
static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
|
||||
{
|
||||
return __pmd((((phys_addr_t)page_nr << PAGE_SHIFT) |
|
||||
pgprot_val(pgprot)) & __supported_pte_mask);
|
||||
return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
|
||||
massage_pgprot(pgprot));
|
||||
}
|
||||
|
||||
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
||||
|
@ -323,7 +337,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
|||
* the newprot (if present):
|
||||
*/
|
||||
val &= _PAGE_CHG_MASK;
|
||||
val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask;
|
||||
val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
|
||||
|
||||
return __pte(val);
|
||||
}
|
||||
|
@ -339,7 +353,7 @@ static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
|
|||
|
||||
#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
|
||||
|
||||
#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
|
||||
#define canon_pgprot(p) __pgprot(massage_pgprot(p))
|
||||
|
||||
static inline int is_new_memtype_allowed(unsigned long flags,
|
||||
unsigned long new_flags)
|
||||
|
|
|
@ -353,7 +353,7 @@ struct i387_soft_struct {
|
|||
u8 no_update;
|
||||
u8 rm;
|
||||
u8 alimit;
|
||||
struct info *info;
|
||||
struct math_emu_info *info;
|
||||
u32 entry_eip;
|
||||
};
|
||||
|
||||
|
|
|
@ -245,6 +245,7 @@ static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
|
|||
{
|
||||
return __ticket_spin_is_contended(lock);
|
||||
}
|
||||
#define __raw_spin_is_contended __raw_spin_is_contended
|
||||
|
||||
static __always_inline void __raw_spin_lock(raw_spinlock_t *lock)
|
||||
{
|
||||
|
|
|
@ -41,7 +41,7 @@ dotraplinkage void do_int3(struct pt_regs *, long);
|
|||
dotraplinkage void do_overflow(struct pt_regs *, long);
|
||||
dotraplinkage void do_bounds(struct pt_regs *, long);
|
||||
dotraplinkage void do_invalid_op(struct pt_regs *, long);
|
||||
dotraplinkage void do_device_not_available(struct pt_regs *, long);
|
||||
dotraplinkage void do_device_not_available(struct pt_regs);
|
||||
dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long);
|
||||
dotraplinkage void do_invalid_TSS(struct pt_regs *, long);
|
||||
dotraplinkage void do_segment_not_present(struct pt_regs *, long);
|
||||
|
@ -77,7 +77,7 @@ extern int panic_on_unrecovered_nmi;
|
|||
extern int kstack_depth_to_print;
|
||||
|
||||
void math_error(void __user *);
|
||||
asmlinkage void math_emulate(long);
|
||||
void math_emulate(struct math_emu_info *);
|
||||
#ifdef CONFIG_X86_32
|
||||
unsigned long patch_espfix_desc(unsigned long, unsigned long);
|
||||
#else
|
||||
|
|
|
@ -137,7 +137,7 @@ static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot)
|
|||
pte_t pte;
|
||||
|
||||
pte.pte = ((phys_addr_t)page_nr << PAGE_SHIFT) |
|
||||
(pgprot_val(pgprot) & __supported_pte_mask);
|
||||
massage_pgprot(pgprot);
|
||||
|
||||
return pte;
|
||||
}
|
||||
|
|
|
@ -973,6 +973,29 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
|
|||
nr_ioapics++;
|
||||
}
|
||||
|
||||
int __init acpi_probe_gsi(void)
|
||||
{
|
||||
int idx;
|
||||
int gsi;
|
||||
int max_gsi = 0;
|
||||
|
||||
if (acpi_disabled)
|
||||
return 0;
|
||||
|
||||
if (!acpi_ioapic)
|
||||
return 0;
|
||||
|
||||
max_gsi = 0;
|
||||
for (idx = 0; idx < nr_ioapics; idx++) {
|
||||
gsi = mp_ioapic_routing[idx].gsi_end;
|
||||
|
||||
if (gsi > max_gsi)
|
||||
max_gsi = gsi;
|
||||
}
|
||||
|
||||
return max_gsi + 1;
|
||||
}
|
||||
|
||||
static void assign_to_mp_irq(struct mp_config_intsrc *m,
|
||||
struct mp_config_intsrc *mp_irq)
|
||||
{
|
||||
|
|
|
@ -939,10 +939,25 @@ static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
|
|||
free_cpumask_var(data->acpi_data.shared_cpu_map);
|
||||
}
|
||||
|
||||
static int get_transition_latency(struct powernow_k8_data *data)
|
||||
{
|
||||
int max_latency = 0;
|
||||
int i;
|
||||
for (i = 0; i < data->acpi_data.state_count; i++) {
|
||||
int cur_latency = data->acpi_data.states[i].transition_latency
|
||||
+ data->acpi_data.states[i].bus_master_latency;
|
||||
if (cur_latency > max_latency)
|
||||
max_latency = cur_latency;
|
||||
}
|
||||
/* value in usecs, needs to be in nanoseconds */
|
||||
return 1000 * max_latency;
|
||||
}
|
||||
|
||||
#else
|
||||
static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
|
||||
static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
|
||||
static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
|
||||
static int get_transition_latency(struct powernow_k8_data *data) { return 0; }
|
||||
#endif /* CONFIG_X86_POWERNOW_K8_ACPI */
|
||||
|
||||
/* Take a frequency, and issue the fid/vid transition command */
|
||||
|
@ -1173,7 +1188,13 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
|
|||
if (rc) {
|
||||
goto err_out;
|
||||
}
|
||||
}
|
||||
/* Take a crude guess here.
|
||||
* That guess was in microseconds, so multiply with 1000 */
|
||||
pol->cpuinfo.transition_latency = (
|
||||
((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
|
||||
((1 << data->irt) * 30)) * 1000;
|
||||
} else /* ACPI _PSS objects available */
|
||||
pol->cpuinfo.transition_latency = get_transition_latency(data);
|
||||
|
||||
/* only run on specific CPU from here on */
|
||||
oldmask = current->cpus_allowed;
|
||||
|
@ -1204,11 +1225,6 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
|
|||
cpumask_copy(pol->cpus, &per_cpu(cpu_core_map, pol->cpu));
|
||||
data->available_cores = pol->cpus;
|
||||
|
||||
/* Take a crude guess here.
|
||||
* That guess was in microseconds, so multiply with 1000 */
|
||||
pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
|
||||
+ (3 * (1 << data->irt) * 10)) * 1000;
|
||||
|
||||
if (cpu_family == CPU_HW_PSTATE)
|
||||
pol->cur = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
|
||||
else
|
||||
|
|
|
@ -291,6 +291,9 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
|
|||
ds_init_intel(c);
|
||||
}
|
||||
|
||||
if (c->x86 == 6 && c->x86_model == 29 && cpu_has_clflush)
|
||||
set_cpu_cap(c, X86_FEATURE_CLFLUSH_MONITOR);
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (c->x86 == 15)
|
||||
c->x86_cache_alignment = c->x86_clflush_size * 2;
|
||||
|
|
|
@ -488,20 +488,21 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
|
|||
* ignore such a protection.
|
||||
*/
|
||||
asm volatile(
|
||||
"1: " _ASM_MOV " (%[parent_old]), %[old]\n"
|
||||
"2: " _ASM_MOV " %[return_hooker], (%[parent_replaced])\n"
|
||||
"1: " _ASM_MOV " (%[parent]), %[old]\n"
|
||||
"2: " _ASM_MOV " %[return_hooker], (%[parent])\n"
|
||||
" movl $0, %[faulted]\n"
|
||||
"3:\n"
|
||||
|
||||
".section .fixup, \"ax\"\n"
|
||||
"3: movl $1, %[faulted]\n"
|
||||
"4: movl $1, %[faulted]\n"
|
||||
" jmp 3b\n"
|
||||
".previous\n"
|
||||
|
||||
_ASM_EXTABLE(1b, 3b)
|
||||
_ASM_EXTABLE(2b, 3b)
|
||||
_ASM_EXTABLE(1b, 4b)
|
||||
_ASM_EXTABLE(2b, 4b)
|
||||
|
||||
: [parent_replaced] "=r" (parent), [old] "=r" (old),
|
||||
[faulted] "=r" (faulted)
|
||||
: [parent_old] "0" (parent), [return_hooker] "r" (return_hooker)
|
||||
: [old] "=r" (old), [faulted] "=r" (faulted)
|
||||
: [parent] "r" (parent), [return_hooker] "r" (return_hooker)
|
||||
: "memory"
|
||||
);
|
||||
|
||||
|
|
|
@ -897,13 +897,21 @@ static unsigned long hpet_rtc_flags;
|
|||
static int hpet_prev_update_sec;
|
||||
static struct rtc_time hpet_alarm_time;
|
||||
static unsigned long hpet_pie_count;
|
||||
static unsigned long hpet_t1_cmp;
|
||||
static u32 hpet_t1_cmp;
|
||||
static unsigned long hpet_default_delta;
|
||||
static unsigned long hpet_pie_delta;
|
||||
static unsigned long hpet_pie_limit;
|
||||
|
||||
static rtc_irq_handler irq_handler;
|
||||
|
||||
/*
|
||||
* Check that the hpet counter c1 is ahead of the c2
|
||||
*/
|
||||
static inline int hpet_cnt_ahead(u32 c1, u32 c2)
|
||||
{
|
||||
return (s32)(c2 - c1) < 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Registers a IRQ handler.
|
||||
*/
|
||||
|
@ -1075,7 +1083,7 @@ static void hpet_rtc_timer_reinit(void)
|
|||
hpet_t1_cmp += delta;
|
||||
hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
|
||||
lost_ints++;
|
||||
} while ((long)(hpet_readl(HPET_COUNTER) - hpet_t1_cmp) > 0);
|
||||
} while (!hpet_cnt_ahead(hpet_t1_cmp, hpet_readl(HPET_COUNTER)));
|
||||
|
||||
if (lost_ints) {
|
||||
if (hpet_rtc_flags & RTC_PIE)
|
||||
|
|
|
@ -28,10 +28,10 @@ static int i8237A_resume(struct sys_device *dev)
|
|||
|
||||
flags = claim_dma_lock();
|
||||
|
||||
dma_outb(DMA1_RESET_REG, 0);
|
||||
dma_outb(DMA2_RESET_REG, 0);
|
||||
dma_outb(0, DMA1_RESET_REG);
|
||||
dma_outb(0, DMA2_RESET_REG);
|
||||
|
||||
for (i = 0;i < 8;i++) {
|
||||
for (i = 0; i < 8; i++) {
|
||||
set_dma_addr(i, 0x000000);
|
||||
/* DMA count is a bit weird so this is not 0 */
|
||||
set_dma_count(i, 1);
|
||||
|
@ -51,14 +51,14 @@ static int i8237A_suspend(struct sys_device *dev, pm_message_t state)
|
|||
}
|
||||
|
||||
static struct sysdev_class i8237_sysdev_class = {
|
||||
.name = "i8237",
|
||||
.suspend = i8237A_suspend,
|
||||
.resume = i8237A_resume,
|
||||
.name = "i8237",
|
||||
.suspend = i8237A_suspend,
|
||||
.resume = i8237A_resume,
|
||||
};
|
||||
|
||||
static struct sys_device device_i8237A = {
|
||||
.id = 0,
|
||||
.cls = &i8237_sysdev_class,
|
||||
.id = 0,
|
||||
.cls = &i8237_sysdev_class,
|
||||
};
|
||||
|
||||
static int __init i8237A_init_sysfs(void)
|
||||
|
@ -68,5 +68,4 @@ static int __init i8237A_init_sysfs(void)
|
|||
error = sysdev_register(&device_i8237A);
|
||||
return error;
|
||||
}
|
||||
|
||||
device_initcall(i8237A_init_sysfs);
|
||||
|
|
|
@ -3841,14 +3841,24 @@ int __init io_apic_get_redir_entries (int ioapic)
|
|||
|
||||
void __init probe_nr_irqs_gsi(void)
|
||||
{
|
||||
int idx;
|
||||
int nr = 0;
|
||||
|
||||
for (idx = 0; idx < nr_ioapics; idx++)
|
||||
nr += io_apic_get_redir_entries(idx) + 1;
|
||||
|
||||
if (nr > nr_irqs_gsi)
|
||||
nr = acpi_probe_gsi();
|
||||
if (nr > nr_irqs_gsi) {
|
||||
nr_irqs_gsi = nr;
|
||||
} else {
|
||||
/* for acpi=off or acpi is not compiled in */
|
||||
int idx;
|
||||
|
||||
nr = 0;
|
||||
for (idx = 0; idx < nr_ioapics; idx++)
|
||||
nr += io_apic_get_redir_entries(idx) + 1;
|
||||
|
||||
if (nr > nr_irqs_gsi)
|
||||
nr_irqs_gsi = nr;
|
||||
}
|
||||
|
||||
printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------------
|
||||
|
|
|
@ -180,6 +180,9 @@ void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
|
|||
|
||||
trace_power_start(&it, POWER_CSTATE, (ax>>4)+1);
|
||||
if (!need_resched()) {
|
||||
if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
|
||||
clflush((void *)¤t_thread_info()->flags);
|
||||
|
||||
__monitor((void *)¤t_thread_info()->flags, 0, 0);
|
||||
smp_mb();
|
||||
if (!need_resched())
|
||||
|
@ -194,6 +197,9 @@ static void mwait_idle(void)
|
|||
struct power_trace it;
|
||||
if (!need_resched()) {
|
||||
trace_power_start(&it, POWER_CSTATE, 1);
|
||||
if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
|
||||
clflush((void *)¤t_thread_info()->flags);
|
||||
|
||||
__monitor((void *)¤t_thread_info()->flags, 0, 0);
|
||||
smp_mb();
|
||||
if (!need_resched())
|
||||
|
|
|
@ -40,6 +40,7 @@
|
|||
#include <linux/uaccess.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/ftrace.h>
|
||||
#include <linux/dmi.h>
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/system.h>
|
||||
|
@ -151,14 +152,18 @@ void __show_regs(struct pt_regs *regs, int all)
|
|||
unsigned long d0, d1, d2, d3, d6, d7;
|
||||
unsigned int fsindex, gsindex;
|
||||
unsigned int ds, cs, es;
|
||||
const char *board;
|
||||
|
||||
printk("\n");
|
||||
print_modules();
|
||||
printk(KERN_INFO "Pid: %d, comm: %.20s %s %s %.*s\n",
|
||||
board = dmi_get_system_info(DMI_PRODUCT_NAME);
|
||||
if (!board)
|
||||
board = "";
|
||||
printk(KERN_INFO "Pid: %d, comm: %.20s %s %s %.*s %s\n",
|
||||
current->pid, current->comm, print_tainted(),
|
||||
init_utsname()->release,
|
||||
(int)strcspn(init_utsname()->version, " "),
|
||||
init_utsname()->version);
|
||||
init_utsname()->version, board);
|
||||
printk(KERN_INFO "RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip);
|
||||
printk_address(regs->ip, 1);
|
||||
printk(KERN_INFO "RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss,
|
||||
|
|
|
@ -607,7 +607,7 @@ struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
|
|||
static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
|
||||
{
|
||||
printk(KERN_NOTICE
|
||||
"%s detected: BIOS may corrupt low RAM, working it around.\n",
|
||||
"%s detected: BIOS may corrupt low RAM, working around it.\n",
|
||||
d->ident);
|
||||
|
||||
e820_update_range(0, 0x10000, E820_RAM, E820_RESERVED);
|
||||
|
|
|
@ -896,7 +896,7 @@ asmlinkage void math_state_restore(void)
|
|||
EXPORT_SYMBOL_GPL(math_state_restore);
|
||||
|
||||
#ifndef CONFIG_MATH_EMULATION
|
||||
asmlinkage void math_emulate(long arg)
|
||||
void math_emulate(struct math_emu_info *info)
|
||||
{
|
||||
printk(KERN_EMERG
|
||||
"math-emulation not enabled and no coprocessor found.\n");
|
||||
|
@ -906,16 +906,19 @@ asmlinkage void math_emulate(long arg)
|
|||
}
|
||||
#endif /* CONFIG_MATH_EMULATION */
|
||||
|
||||
dotraplinkage void __kprobes
|
||||
do_device_not_available(struct pt_regs *regs, long error)
|
||||
dotraplinkage void __kprobes do_device_not_available(struct pt_regs regs)
|
||||
{
|
||||
#ifdef CONFIG_X86_32
|
||||
if (read_cr0() & X86_CR0_EM) {
|
||||
conditional_sti(regs);
|
||||
math_emulate(0);
|
||||
struct math_emu_info info = { };
|
||||
|
||||
conditional_sti(®s);
|
||||
|
||||
info.regs = ®s;
|
||||
math_emulate(&info);
|
||||
} else {
|
||||
math_state_restore(); /* interrupts still off */
|
||||
conditional_sti(regs);
|
||||
conditional_sti(®s);
|
||||
}
|
||||
#else
|
||||
math_state_restore();
|
||||
|
|
|
@ -320,6 +320,16 @@ static void vmi_release_pmd(unsigned long pfn)
|
|||
vmi_ops.release_page(pfn, VMI_PAGE_L2);
|
||||
}
|
||||
|
||||
/*
|
||||
* We use the pgd_free hook for releasing the pgd page:
|
||||
*/
|
||||
static void vmi_pgd_free(struct mm_struct *mm, pgd_t *pgd)
|
||||
{
|
||||
unsigned long pfn = __pa(pgd) >> PAGE_SHIFT;
|
||||
|
||||
vmi_ops.release_page(pfn, VMI_PAGE_L2);
|
||||
}
|
||||
|
||||
/*
|
||||
* Helper macros for MMU update flags. We can defer updates until a flush
|
||||
* or page invalidation only if the update is to the current address space
|
||||
|
@ -762,6 +772,7 @@ static inline int __init activate_vmi(void)
|
|||
if (vmi_ops.release_page) {
|
||||
pv_mmu_ops.release_pte = vmi_release_pte;
|
||||
pv_mmu_ops.release_pmd = vmi_release_pmd;
|
||||
pv_mmu_ops.pgd_free = vmi_pgd_free;
|
||||
}
|
||||
|
||||
/* Set linear is needed in all cases */
|
||||
|
|
|
@ -131,7 +131,7 @@ u_char emulating = 0;
|
|||
static int valid_prefix(u_char *Byte, u_char __user ** fpu_eip,
|
||||
overrides * override);
|
||||
|
||||
asmlinkage void math_emulate(long arg)
|
||||
void math_emulate(struct math_emu_info *info)
|
||||
{
|
||||
u_char FPU_modrm, byte1;
|
||||
unsigned short code;
|
||||
|
@ -161,7 +161,7 @@ asmlinkage void math_emulate(long arg)
|
|||
RE_ENTRANT_CHECK_ON;
|
||||
#endif /* RE_ENTRANT_CHECKING */
|
||||
|
||||
SETUP_DATA_AREA(arg);
|
||||
FPU_info = info;
|
||||
|
||||
FPU_ORIG_EIP = FPU_EIP;
|
||||
|
||||
|
@ -659,7 +659,7 @@ static int valid_prefix(u_char *Byte, u_char __user **fpu_eip,
|
|||
}
|
||||
}
|
||||
|
||||
void math_abort(struct info *info, unsigned int signal)
|
||||
void math_abort(struct math_emu_info *info, unsigned int signal)
|
||||
{
|
||||
FPU_EIP = FPU_ORIG_EIP;
|
||||
current->thread.trap_no = 16;
|
||||
|
|
|
@ -51,8 +51,8 @@ extern void ffreep(void);
|
|||
extern void fst_i_(void);
|
||||
extern void fstp_i(void);
|
||||
/* fpu_entry.c */
|
||||
asmlinkage extern void math_emulate(long arg);
|
||||
extern void math_abort(struct info *info, unsigned int signal);
|
||||
extern void math_emulate(struct math_emu_info *info);
|
||||
extern void math_abort(struct math_emu_info *info, unsigned int signal);
|
||||
/* fpu_etc.c */
|
||||
extern void FPU_etc(void);
|
||||
/* fpu_tags.c */
|
||||
|
|
|
@ -16,10 +16,6 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/mm.h>
|
||||
|
||||
/* This sets the pointer FPU_info to point to the argument part
|
||||
of the stack frame of math_emulate() */
|
||||
#define SETUP_DATA_AREA(arg) FPU_info = (struct info *) &arg
|
||||
|
||||
/* s is always from a cpu register, and the cpu does bounds checking
|
||||
* during register load --> no further bounds checks needed */
|
||||
#define LDT_DESCRIPTOR(s) (((struct desc_struct *)current->mm->context.ldt)[(s) >> 3])
|
||||
|
@ -38,12 +34,12 @@
|
|||
#define I387 (current->thread.xstate)
|
||||
#define FPU_info (I387->soft.info)
|
||||
|
||||
#define FPU_CS (*(unsigned short *) &(FPU_info->___cs))
|
||||
#define FPU_SS (*(unsigned short *) &(FPU_info->___ss))
|
||||
#define FPU_DS (*(unsigned short *) &(FPU_info->___ds))
|
||||
#define FPU_EAX (FPU_info->___eax)
|
||||
#define FPU_EFLAGS (FPU_info->___eflags)
|
||||
#define FPU_EIP (FPU_info->___eip)
|
||||
#define FPU_CS (*(unsigned short *) &(FPU_info->regs->cs))
|
||||
#define FPU_SS (*(unsigned short *) &(FPU_info->regs->ss))
|
||||
#define FPU_DS (*(unsigned short *) &(FPU_info->regs->ds))
|
||||
#define FPU_EAX (FPU_info->regs->ax)
|
||||
#define FPU_EFLAGS (FPU_info->regs->flags)
|
||||
#define FPU_EIP (FPU_info->regs->ip)
|
||||
#define FPU_ORIG_EIP (FPU_info->___orig_eip)
|
||||
|
||||
#define FPU_lookahead (I387->soft.lookahead)
|
||||
|
|
|
@ -29,46 +29,43 @@
|
|||
#define FPU_WRITE_BIT 0x10
|
||||
|
||||
static int reg_offset[] = {
|
||||
offsetof(struct info, ___eax),
|
||||
offsetof(struct info, ___ecx),
|
||||
offsetof(struct info, ___edx),
|
||||
offsetof(struct info, ___ebx),
|
||||
offsetof(struct info, ___esp),
|
||||
offsetof(struct info, ___ebp),
|
||||
offsetof(struct info, ___esi),
|
||||
offsetof(struct info, ___edi)
|
||||
offsetof(struct pt_regs, ax),
|
||||
offsetof(struct pt_regs, cx),
|
||||
offsetof(struct pt_regs, dx),
|
||||
offsetof(struct pt_regs, bx),
|
||||
offsetof(struct pt_regs, sp),
|
||||
offsetof(struct pt_regs, bp),
|
||||
offsetof(struct pt_regs, si),
|
||||
offsetof(struct pt_regs, di)
|
||||
};
|
||||
|
||||
#define REG_(x) (*(long *)(reg_offset[(x)]+(u_char *) FPU_info))
|
||||
#define REG_(x) (*(long *)(reg_offset[(x)] + (u_char *)FPU_info->regs))
|
||||
|
||||
static int reg_offset_vm86[] = {
|
||||
offsetof(struct info, ___cs),
|
||||
offsetof(struct info, ___vm86_ds),
|
||||
offsetof(struct info, ___vm86_es),
|
||||
offsetof(struct info, ___vm86_fs),
|
||||
offsetof(struct info, ___vm86_gs),
|
||||
offsetof(struct info, ___ss),
|
||||
offsetof(struct info, ___vm86_ds)
|
||||
offsetof(struct pt_regs, cs),
|
||||
offsetof(struct kernel_vm86_regs, ds),
|
||||
offsetof(struct kernel_vm86_regs, es),
|
||||
offsetof(struct kernel_vm86_regs, fs),
|
||||
offsetof(struct kernel_vm86_regs, gs),
|
||||
offsetof(struct pt_regs, ss),
|
||||
offsetof(struct kernel_vm86_regs, ds)
|
||||
};
|
||||
|
||||
#define VM86_REG_(x) (*(unsigned short *) \
|
||||
(reg_offset_vm86[((unsigned)x)]+(u_char *) FPU_info))
|
||||
|
||||
/* This dummy, gs is not saved on the stack. */
|
||||
#define ___GS ___ds
|
||||
(reg_offset_vm86[((unsigned)x)] + (u_char *)FPU_info->regs))
|
||||
|
||||
static int reg_offset_pm[] = {
|
||||
offsetof(struct info, ___cs),
|
||||
offsetof(struct info, ___ds),
|
||||
offsetof(struct info, ___es),
|
||||
offsetof(struct info, ___fs),
|
||||
offsetof(struct info, ___GS),
|
||||
offsetof(struct info, ___ss),
|
||||
offsetof(struct info, ___ds)
|
||||
offsetof(struct pt_regs, cs),
|
||||
offsetof(struct pt_regs, ds),
|
||||
offsetof(struct pt_regs, es),
|
||||
offsetof(struct pt_regs, fs),
|
||||
offsetof(struct pt_regs, ds), /* dummy, not saved on stack */
|
||||
offsetof(struct pt_regs, ss),
|
||||
offsetof(struct pt_regs, ds)
|
||||
};
|
||||
|
||||
#define PM_REG_(x) (*(unsigned short *) \
|
||||
(reg_offset_pm[((unsigned)x)]+(u_char *) FPU_info))
|
||||
(reg_offset_pm[((unsigned)x)] + (u_char *)FPU_info->regs))
|
||||
|
||||
/* Decode the SIB byte. This function assumes mod != 0 */
|
||||
static int sib(int mod, unsigned long *fpu_eip)
|
||||
|
@ -349,34 +346,34 @@ void __user *FPU_get_address_16(u_char FPU_modrm, unsigned long *fpu_eip,
|
|||
}
|
||||
switch (rm) {
|
||||
case 0:
|
||||
address += FPU_info->___ebx + FPU_info->___esi;
|
||||
address += FPU_info->regs->bx + FPU_info->regs->si;
|
||||
break;
|
||||
case 1:
|
||||
address += FPU_info->___ebx + FPU_info->___edi;
|
||||
address += FPU_info->regs->bx + FPU_info->regs->di;
|
||||
break;
|
||||
case 2:
|
||||
address += FPU_info->___ebp + FPU_info->___esi;
|
||||
address += FPU_info->regs->bp + FPU_info->regs->si;
|
||||
if (addr_modes.override.segment == PREFIX_DEFAULT)
|
||||
addr_modes.override.segment = PREFIX_SS_;
|
||||
break;
|
||||
case 3:
|
||||
address += FPU_info->___ebp + FPU_info->___edi;
|
||||
address += FPU_info->regs->bp + FPU_info->regs->di;
|
||||
if (addr_modes.override.segment == PREFIX_DEFAULT)
|
||||
addr_modes.override.segment = PREFIX_SS_;
|
||||
break;
|
||||
case 4:
|
||||
address += FPU_info->___esi;
|
||||
address += FPU_info->regs->si;
|
||||
break;
|
||||
case 5:
|
||||
address += FPU_info->___edi;
|
||||
address += FPU_info->regs->di;
|
||||
break;
|
||||
case 6:
|
||||
address += FPU_info->___ebp;
|
||||
address += FPU_info->regs->bp;
|
||||
if (addr_modes.override.segment == PREFIX_DEFAULT)
|
||||
addr_modes.override.segment = PREFIX_SS_;
|
||||
break;
|
||||
case 7:
|
||||
address += FPU_info->___ebx;
|
||||
address += FPU_info->regs->bx;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
@ -149,6 +149,9 @@ static struct crypto_larval *__crypto_register_alg(struct crypto_alg *alg)
|
|||
if (q == alg)
|
||||
goto err;
|
||||
|
||||
if (crypto_is_moribund(q))
|
||||
continue;
|
||||
|
||||
if (crypto_is_larval(q)) {
|
||||
if (!strcmp(alg->cra_driver_name, q->cra_driver_name))
|
||||
goto err;
|
||||
|
@ -197,7 +200,7 @@ void crypto_alg_tested(const char *name, int err)
|
|||
|
||||
down_write(&crypto_alg_sem);
|
||||
list_for_each_entry(q, &crypto_alg_list, cra_list) {
|
||||
if (!crypto_is_larval(q))
|
||||
if (crypto_is_moribund(q) || !crypto_is_larval(q))
|
||||
continue;
|
||||
|
||||
test = (struct crypto_larval *)q;
|
||||
|
@ -210,6 +213,7 @@ void crypto_alg_tested(const char *name, int err)
|
|||
goto unlock;
|
||||
|
||||
found:
|
||||
q->cra_flags |= CRYPTO_ALG_DEAD;
|
||||
alg = test->adult;
|
||||
if (err || list_empty(&alg->cra_list))
|
||||
goto complete;
|
||||
|
|
20
crypto/api.c
20
crypto/api.c
|
@ -557,34 +557,34 @@ err:
|
|||
return ERR_PTR(err);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(crypto_alloc_tfm);
|
||||
|
||||
|
||||
/*
|
||||
* crypto_free_tfm - Free crypto transform
|
||||
* crypto_destroy_tfm - Free crypto transform
|
||||
* @mem: Start of tfm slab
|
||||
* @tfm: Transform to free
|
||||
*
|
||||
* crypto_free_tfm() frees up the transform and any associated resources,
|
||||
* This function frees up the transform and any associated resources,
|
||||
* then drops the refcount on the associated algorithm.
|
||||
*/
|
||||
void crypto_free_tfm(struct crypto_tfm *tfm)
|
||||
void crypto_destroy_tfm(void *mem, struct crypto_tfm *tfm)
|
||||
{
|
||||
struct crypto_alg *alg;
|
||||
int size;
|
||||
|
||||
if (unlikely(!tfm))
|
||||
if (unlikely(!mem))
|
||||
return;
|
||||
|
||||
alg = tfm->__crt_alg;
|
||||
size = sizeof(*tfm) + alg->cra_ctxsize;
|
||||
size = ksize(mem);
|
||||
|
||||
if (!tfm->exit && alg->cra_exit)
|
||||
alg->cra_exit(tfm);
|
||||
crypto_exit_ops(tfm);
|
||||
crypto_mod_put(alg);
|
||||
memset(tfm, 0, size);
|
||||
kfree(tfm);
|
||||
memset(mem, 0, size);
|
||||
kfree(mem);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(crypto_free_tfm);
|
||||
EXPORT_SYMBOL_GPL(crypto_destroy_tfm);
|
||||
|
||||
int crypto_has_alg(const char *name, u32 type, u32 mask)
|
||||
{
|
||||
|
|
|
@ -54,7 +54,8 @@ static void scatterwalk_pagedone(struct scatter_walk *walk, int out,
|
|||
struct page *page;
|
||||
|
||||
page = sg_page(walk->sg) + ((walk->offset - 1) >> PAGE_SHIFT);
|
||||
flush_dcache_page(page);
|
||||
if (!PageSlab(page))
|
||||
flush_dcache_page(page);
|
||||
}
|
||||
|
||||
if (more) {
|
||||
|
|
|
@ -388,10 +388,15 @@ static int crypto_init_shash_ops_compat(struct crypto_tfm *tfm)
|
|||
struct shash_desc *desc = crypto_tfm_ctx(tfm);
|
||||
struct crypto_shash *shash;
|
||||
|
||||
if (!crypto_mod_get(calg))
|
||||
return -EAGAIN;
|
||||
|
||||
shash = __crypto_shash_cast(crypto_create_tfm(
|
||||
calg, &crypto_shash_type));
|
||||
if (IS_ERR(shash))
|
||||
if (IS_ERR(shash)) {
|
||||
crypto_mod_put(calg);
|
||||
return PTR_ERR(shash);
|
||||
}
|
||||
|
||||
desc->tfm = shash;
|
||||
tfm->exit = crypto_exit_shash_ops_compat;
|
||||
|
|
|
@ -2519,8 +2519,8 @@ fore200e_load_and_start_fw(struct fore200e* fore200e)
|
|||
return err;
|
||||
|
||||
sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
|
||||
if (request_firmware(&firmware, buf, device) == 1) {
|
||||
printk(FORE200E "missing %s firmware image\n", fore200e->bus->model_name);
|
||||
if ((err = request_firmware(&firmware, buf, device)) < 0) {
|
||||
printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
|
||||
return err;
|
||||
}
|
||||
|
||||
|
|
|
@ -685,6 +685,7 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
|
|||
out_release_regions:
|
||||
pci_release_regions(dev);
|
||||
out:
|
||||
kfree(card);
|
||||
return err;
|
||||
}
|
||||
|
||||
|
|
|
@ -549,6 +549,15 @@ static void do_nbd_request(struct request_queue * q)
|
|||
|
||||
BUG_ON(lo->magic != LO_MAGIC);
|
||||
|
||||
if (unlikely(!lo->sock)) {
|
||||
printk(KERN_ERR "%s: Attempted send on closed socket\n",
|
||||
lo->disk->disk_name);
|
||||
req->errors++;
|
||||
nbd_end_request(req);
|
||||
spin_lock_irq(q->queue_lock);
|
||||
continue;
|
||||
}
|
||||
|
||||
spin_lock_irq(&lo->queue_lock);
|
||||
list_add_tail(&req->queuelist, &lo->waiting_queue);
|
||||
spin_unlock_irq(&lo->queue_lock);
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
* SLD 9630 TT 1.1 and SLB 9635 TT 1.2 Trusted Platform Module
|
||||
* Specifications at www.trustedcomputinggroup.org
|
||||
*
|
||||
* Copyright (C) 2005, Marcel Selhorst <selhorst@crypto.rub.de>
|
||||
* Copyright (C) 2005, Marcel Selhorst <m.selhorst@sirrix.com>
|
||||
* Sirrix AG - security technologies, http://www.sirrix.com and
|
||||
* Applied Data Security Group, Ruhr-University Bochum, Germany
|
||||
* Project-Homepage: http://www.prosec.rub.de/tpm
|
||||
|
@ -636,7 +636,7 @@ static void __exit cleanup_inf(void)
|
|||
module_init(init_inf);
|
||||
module_exit(cleanup_inf);
|
||||
|
||||
MODULE_AUTHOR("Marcel Selhorst <selhorst@crypto.rub.de>");
|
||||
MODULE_AUTHOR("Marcel Selhorst <m.selhorst@sirrix.com>");
|
||||
MODULE_DESCRIPTION("Driver for Infineon TPM SLD 9630 TT 1.1 / SLB 9635 TT 1.2");
|
||||
MODULE_VERSION("1.9");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
|
@ -117,11 +117,7 @@ static inline cputime64_t get_cpu_idle_time_jiffy(unsigned int cpu,
|
|||
busy_time = cputime64_add(busy_time, kstat_cpu(cpu).cpustat.irq);
|
||||
busy_time = cputime64_add(busy_time, kstat_cpu(cpu).cpustat.softirq);
|
||||
busy_time = cputime64_add(busy_time, kstat_cpu(cpu).cpustat.steal);
|
||||
|
||||
if (!dbs_tuners_ins.ignore_nice) {
|
||||
busy_time = cputime64_add(busy_time,
|
||||
kstat_cpu(cpu).cpustat.nice);
|
||||
}
|
||||
busy_time = cputime64_add(busy_time, kstat_cpu(cpu).cpustat.nice);
|
||||
|
||||
idle_time = cputime64_sub(cur_wall_time, busy_time);
|
||||
if (wall)
|
||||
|
@ -137,23 +133,6 @@ static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall)
|
|||
if (idle_time == -1ULL)
|
||||
return get_cpu_idle_time_jiffy(cpu, wall);
|
||||
|
||||
if (dbs_tuners_ins.ignore_nice) {
|
||||
cputime64_t cur_nice;
|
||||
unsigned long cur_nice_jiffies;
|
||||
struct cpu_dbs_info_s *dbs_info;
|
||||
|
||||
dbs_info = &per_cpu(cpu_dbs_info, cpu);
|
||||
cur_nice = cputime64_sub(kstat_cpu(cpu).cpustat.nice,
|
||||
dbs_info->prev_cpu_nice);
|
||||
/*
|
||||
* Assumption: nice time between sampling periods will be
|
||||
* less than 2^32 jiffies for 32 bit sys
|
||||
*/
|
||||
cur_nice_jiffies = (unsigned long)
|
||||
cputime64_to_jiffies64(cur_nice);
|
||||
dbs_info->prev_cpu_nice = kstat_cpu(cpu).cpustat.nice;
|
||||
return idle_time + jiffies_to_usecs(cur_nice_jiffies);
|
||||
}
|
||||
return idle_time;
|
||||
}
|
||||
|
||||
|
@ -319,6 +298,9 @@ static ssize_t store_ignore_nice_load(struct cpufreq_policy *policy,
|
|||
dbs_info = &per_cpu(cpu_dbs_info, j);
|
||||
dbs_info->prev_cpu_idle = get_cpu_idle_time(j,
|
||||
&dbs_info->prev_cpu_wall);
|
||||
if (dbs_tuners_ins.ignore_nice)
|
||||
dbs_info->prev_cpu_nice = kstat_cpu(j).cpustat.nice;
|
||||
|
||||
}
|
||||
mutex_unlock(&dbs_mutex);
|
||||
|
||||
|
@ -419,6 +401,23 @@ static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info)
|
|||
j_dbs_info->prev_cpu_idle);
|
||||
j_dbs_info->prev_cpu_idle = cur_idle_time;
|
||||
|
||||
if (dbs_tuners_ins.ignore_nice) {
|
||||
cputime64_t cur_nice;
|
||||
unsigned long cur_nice_jiffies;
|
||||
|
||||
cur_nice = cputime64_sub(kstat_cpu(j).cpustat.nice,
|
||||
j_dbs_info->prev_cpu_nice);
|
||||
/*
|
||||
* Assumption: nice time between sampling periods will
|
||||
* be less than 2^32 jiffies for 32 bit sys
|
||||
*/
|
||||
cur_nice_jiffies = (unsigned long)
|
||||
cputime64_to_jiffies64(cur_nice);
|
||||
|
||||
j_dbs_info->prev_cpu_nice = kstat_cpu(j).cpustat.nice;
|
||||
idle_time += jiffies_to_usecs(cur_nice_jiffies);
|
||||
}
|
||||
|
||||
if (unlikely(!wall_time || wall_time < idle_time))
|
||||
continue;
|
||||
|
||||
|
@ -575,6 +574,10 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
|
|||
|
||||
j_dbs_info->prev_cpu_idle = get_cpu_idle_time(j,
|
||||
&j_dbs_info->prev_cpu_wall);
|
||||
if (dbs_tuners_ins.ignore_nice) {
|
||||
j_dbs_info->prev_cpu_nice =
|
||||
kstat_cpu(j).cpustat.nice;
|
||||
}
|
||||
}
|
||||
this_dbs_info->cpu = cpu;
|
||||
/*
|
||||
|
|
|
@ -70,7 +70,7 @@ config DRM_I915
|
|||
select FB_CFB_FILLRECT
|
||||
select FB_CFB_COPYAREA
|
||||
select FB_CFB_IMAGEBLIT
|
||||
depends on FB
|
||||
select FB
|
||||
tristate "i915 driver"
|
||||
help
|
||||
Choose this option if you have a system that has Intel 830M, 845G,
|
||||
|
|
|
@ -276,6 +276,7 @@ int drm_irq_uninstall(struct drm_device * dev)
|
|||
for (i = 0; i < dev->num_crtcs; i++) {
|
||||
DRM_WAKEUP(&dev->vbl_queue[i]);
|
||||
dev->vblank_enabled[i] = 0;
|
||||
dev->last_vblank[i] = dev->driver->get_vblank_counter(dev, i);
|
||||
}
|
||||
spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
|
||||
|
||||
|
|
|
@ -171,9 +171,14 @@ EXPORT_SYMBOL(drm_core_ioremap);
|
|||
|
||||
void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev)
|
||||
{
|
||||
map->handle = ioremap_wc(map->offset, map->size);
|
||||
if (drm_core_has_AGP(dev) &&
|
||||
dev->agp && dev->agp->cant_use_aperture && map->type == _DRM_AGP)
|
||||
map->handle = agp_remap(map->offset, map->size, dev);
|
||||
else
|
||||
map->handle = ioremap_wc(map->offset, map->size);
|
||||
}
|
||||
EXPORT_SYMBOL(drm_core_ioremap_wc);
|
||||
|
||||
void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev)
|
||||
{
|
||||
if (!map->handle || !map->size)
|
||||
|
|
|
@ -731,8 +731,11 @@ static int i915_getparam(struct drm_device *dev, void *data,
|
|||
case I915_PARAM_HAS_GEM:
|
||||
value = dev_priv->has_gem;
|
||||
break;
|
||||
case I915_PARAM_NUM_FENCES_AVAIL:
|
||||
value = dev_priv->num_fence_regs - dev_priv->fence_reg_start;
|
||||
break;
|
||||
default:
|
||||
DRM_ERROR("Unknown parameter %d\n", param->param);
|
||||
DRM_DEBUG("Unknown parameter %d\n", param->param);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
@ -764,8 +767,15 @@ static int i915_setparam(struct drm_device *dev, void *data,
|
|||
case I915_SETPARAM_ALLOW_BATCHBUFFER:
|
||||
dev_priv->allow_batchbuffer = param->value;
|
||||
break;
|
||||
case I915_SETPARAM_NUM_USED_FENCES:
|
||||
if (param->value > dev_priv->num_fence_regs ||
|
||||
param->value < 0)
|
||||
return -EINVAL;
|
||||
/* Userspace can use first N regs */
|
||||
dev_priv->fence_reg_start = param->value;
|
||||
break;
|
||||
default:
|
||||
DRM_ERROR("unknown parameter %d\n", param->param);
|
||||
DRM_DEBUG("unknown parameter %d\n", param->param);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
@ -966,10 +976,6 @@ static int i915_load_modeset_init(struct drm_device *dev)
|
|||
if (ret)
|
||||
goto kfree_devname;
|
||||
|
||||
dev_priv->mm.gtt_mapping =
|
||||
io_mapping_create_wc(dev->agp->base,
|
||||
dev->agp->agp_info.aper_size * 1024*1024);
|
||||
|
||||
/* Allow hardware batchbuffers unless told otherwise.
|
||||
*/
|
||||
dev_priv->allow_batchbuffer = 1;
|
||||
|
@ -1081,6 +1087,23 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
|
|||
goto free_priv;
|
||||
}
|
||||
|
||||
dev_priv->mm.gtt_mapping =
|
||||
io_mapping_create_wc(dev->agp->base,
|
||||
dev->agp->agp_info.aper_size * 1024*1024);
|
||||
/* Set up a WC MTRR for non-PAT systems. This is more common than
|
||||
* one would think, because the kernel disables PAT on first
|
||||
* generation Core chips because WC PAT gets overridden by a UC
|
||||
* MTRR if present. Even if a UC MTRR isn't present.
|
||||
*/
|
||||
dev_priv->mm.gtt_mtrr = mtrr_add(dev->agp->base,
|
||||
dev->agp->agp_info.aper_size *
|
||||
1024 * 1024,
|
||||
MTRR_TYPE_WRCOMB, 1);
|
||||
if (dev_priv->mm.gtt_mtrr < 0) {
|
||||
DRM_INFO("MTRR allocation failed\n. Graphics "
|
||||
"performance may suffer.\n");
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HIGHMEM64G
|
||||
/* don't enable GEM on PAE - needs agp + set_memory_* interface fixes */
|
||||
dev_priv->has_gem = 0;
|
||||
|
@ -1089,6 +1112,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
|
|||
dev_priv->has_gem = 1;
|
||||
#endif
|
||||
|
||||
dev->driver->get_vblank_counter = i915_get_vblank_counter;
|
||||
if (IS_GM45(dev))
|
||||
dev->driver->get_vblank_counter = gm45_get_vblank_counter;
|
||||
|
||||
i915_gem_load(dev);
|
||||
|
||||
/* Init HWS */
|
||||
|
@ -1145,8 +1172,14 @@ int i915_driver_unload(struct drm_device *dev)
|
|||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
||||
io_mapping_free(dev_priv->mm.gtt_mapping);
|
||||
if (dev_priv->mm.gtt_mtrr >= 0) {
|
||||
mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base,
|
||||
dev->agp->agp_info.aper_size * 1024 * 1024);
|
||||
dev_priv->mm.gtt_mtrr = -1;
|
||||
}
|
||||
|
||||
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
|
||||
io_mapping_free(dev_priv->mm.gtt_mapping);
|
||||
drm_irq_uninstall(dev);
|
||||
}
|
||||
|
||||
|
|
|
@ -112,7 +112,6 @@ static struct drm_driver driver = {
|
|||
.suspend = i915_suspend,
|
||||
.resume = i915_resume,
|
||||
.device_is_agp = i915_driver_device_is_agp,
|
||||
.get_vblank_counter = i915_get_vblank_counter,
|
||||
.enable_vblank = i915_enable_vblank,
|
||||
.disable_vblank = i915_disable_vblank,
|
||||
.irq_preinstall = i915_driver_irq_preinstall,
|
||||
|
|
|
@ -284,6 +284,7 @@ typedef struct drm_i915_private {
|
|||
struct drm_mm gtt_space;
|
||||
|
||||
struct io_mapping *gtt_mapping;
|
||||
int gtt_mtrr;
|
||||
|
||||
/**
|
||||
* List of objects currently involved in rendering from the
|
||||
|
@ -534,6 +535,7 @@ extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
|
|||
extern int i915_enable_vblank(struct drm_device *dev, int crtc);
|
||||
extern void i915_disable_vblank(struct drm_device *dev, int crtc);
|
||||
extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc);
|
||||
extern u32 gm45_get_vblank_counter(struct drm_device *dev, int crtc);
|
||||
extern int i915_vblank_swap(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv);
|
||||
extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
|
||||
|
@ -601,6 +603,7 @@ int i915_gem_init_object(struct drm_gem_object *obj);
|
|||
void i915_gem_free_object(struct drm_gem_object *obj);
|
||||
int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
|
||||
void i915_gem_object_unpin(struct drm_gem_object *obj);
|
||||
int i915_gem_object_unbind(struct drm_gem_object *obj);
|
||||
void i915_gem_lastclose(struct drm_device *dev);
|
||||
uint32_t i915_get_gem_seqno(struct drm_device *dev);
|
||||
void i915_gem_retire_requests(struct drm_device *dev);
|
||||
|
@ -784,6 +787,11 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
|
|||
IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
|
||||
|
||||
#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
|
||||
/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
|
||||
* rows, which changed the alignment requirements and fence programming.
|
||||
*/
|
||||
#define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \
|
||||
IS_I915GM(dev)))
|
||||
#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev))
|
||||
|
||||
#define PRIMARY_RINGBUFFER_SIZE (128*1024)
|
||||
|
|
|
@ -52,7 +52,7 @@ static void i915_gem_object_free_page_list(struct drm_gem_object *obj);
|
|||
static int i915_gem_object_wait_rendering(struct drm_gem_object *obj);
|
||||
static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj,
|
||||
unsigned alignment);
|
||||
static void i915_gem_object_get_fence_reg(struct drm_gem_object *obj);
|
||||
static int i915_gem_object_get_fence_reg(struct drm_gem_object *obj, bool write);
|
||||
static void i915_gem_clear_fence_reg(struct drm_gem_object *obj);
|
||||
static int i915_gem_evict_something(struct drm_device *dev);
|
||||
static int i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
|
||||
|
@ -567,6 +567,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
|
|||
pgoff_t page_offset;
|
||||
unsigned long pfn;
|
||||
int ret = 0;
|
||||
bool write = !!(vmf->flags & FAULT_FLAG_WRITE);
|
||||
|
||||
/* We don't use vmf->pgoff since that has the fake offset */
|
||||
page_offset = ((unsigned long)vmf->virtual_address - vma->vm_start) >>
|
||||
|
@ -585,8 +586,13 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
|
|||
|
||||
/* Need a new fence register? */
|
||||
if (obj_priv->fence_reg == I915_FENCE_REG_NONE &&
|
||||
obj_priv->tiling_mode != I915_TILING_NONE)
|
||||
i915_gem_object_get_fence_reg(obj);
|
||||
obj_priv->tiling_mode != I915_TILING_NONE) {
|
||||
ret = i915_gem_object_get_fence_reg(obj, write);
|
||||
if (ret) {
|
||||
mutex_unlock(&dev->struct_mutex);
|
||||
return VM_FAULT_SIGBUS;
|
||||
}
|
||||
}
|
||||
|
||||
pfn = ((dev->agp->base + obj_priv->gtt_offset) >> PAGE_SHIFT) +
|
||||
page_offset;
|
||||
|
@ -1211,7 +1217,7 @@ i915_gem_object_wait_rendering(struct drm_gem_object *obj)
|
|||
/**
|
||||
* Unbinds an object from the GTT aperture.
|
||||
*/
|
||||
static int
|
||||
int
|
||||
i915_gem_object_unbind(struct drm_gem_object *obj)
|
||||
{
|
||||
struct drm_device *dev = obj->dev;
|
||||
|
@ -1445,21 +1451,26 @@ static void i915_write_fence_reg(struct drm_i915_fence_reg *reg)
|
|||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
struct drm_i915_gem_object *obj_priv = obj->driver_private;
|
||||
int regnum = obj_priv->fence_reg;
|
||||
int tile_width;
|
||||
uint32_t val;
|
||||
uint32_t pitch_val;
|
||||
|
||||
if ((obj_priv->gtt_offset & ~I915_FENCE_START_MASK) ||
|
||||
(obj_priv->gtt_offset & (obj->size - 1))) {
|
||||
WARN(1, "%s: object not 1M or size aligned\n", __func__);
|
||||
WARN(1, "%s: object 0x%08x not 1M or size (0x%zx) aligned\n",
|
||||
__func__, obj_priv->gtt_offset, obj->size);
|
||||
return;
|
||||
}
|
||||
|
||||
if (obj_priv->tiling_mode == I915_TILING_Y && (IS_I945G(dev) ||
|
||||
IS_I945GM(dev) ||
|
||||
IS_G33(dev)))
|
||||
pitch_val = (obj_priv->stride / 128) - 1;
|
||||
if (obj_priv->tiling_mode == I915_TILING_Y &&
|
||||
HAS_128_BYTE_Y_TILING(dev))
|
||||
tile_width = 128;
|
||||
else
|
||||
pitch_val = (obj_priv->stride / 512) - 1;
|
||||
tile_width = 512;
|
||||
|
||||
/* Note: pitch better be a power of two tile widths */
|
||||
pitch_val = obj_priv->stride / tile_width;
|
||||
pitch_val = ffs(pitch_val) - 1;
|
||||
|
||||
val = obj_priv->gtt_offset;
|
||||
if (obj_priv->tiling_mode == I915_TILING_Y)
|
||||
|
@ -1483,7 +1494,8 @@ static void i830_write_fence_reg(struct drm_i915_fence_reg *reg)
|
|||
|
||||
if ((obj_priv->gtt_offset & ~I915_FENCE_START_MASK) ||
|
||||
(obj_priv->gtt_offset & (obj->size - 1))) {
|
||||
WARN(1, "%s: object not 1M or size aligned\n", __func__);
|
||||
WARN(1, "%s: object 0x%08x not 1M or size aligned\n",
|
||||
__func__, obj_priv->gtt_offset);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -1503,6 +1515,7 @@ static void i830_write_fence_reg(struct drm_i915_fence_reg *reg)
|
|||
/**
|
||||
* i915_gem_object_get_fence_reg - set up a fence reg for an object
|
||||
* @obj: object to map through a fence reg
|
||||
* @write: object is about to be written
|
||||
*
|
||||
* When mapping objects through the GTT, userspace wants to be able to write
|
||||
* to them without having to worry about swizzling if the object is tiled.
|
||||
|
@ -1513,8 +1526,8 @@ static void i830_write_fence_reg(struct drm_i915_fence_reg *reg)
|
|||
* It then sets up the reg based on the object's properties: address, pitch
|
||||
* and tiling format.
|
||||
*/
|
||||
static void
|
||||
i915_gem_object_get_fence_reg(struct drm_gem_object *obj)
|
||||
static int
|
||||
i915_gem_object_get_fence_reg(struct drm_gem_object *obj, bool write)
|
||||
{
|
||||
struct drm_device *dev = obj->dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
@ -1527,12 +1540,18 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj)
|
|||
WARN(1, "allocating a fence for non-tiled object?\n");
|
||||
break;
|
||||
case I915_TILING_X:
|
||||
WARN(obj_priv->stride & (512 - 1),
|
||||
"object is X tiled but has non-512B pitch\n");
|
||||
if (!obj_priv->stride)
|
||||
return -EINVAL;
|
||||
WARN((obj_priv->stride & (512 - 1)),
|
||||
"object 0x%08x is X tiled but has non-512B pitch\n",
|
||||
obj_priv->gtt_offset);
|
||||
break;
|
||||
case I915_TILING_Y:
|
||||
WARN(obj_priv->stride & (128 - 1),
|
||||
"object is Y tiled but has non-128B pitch\n");
|
||||
if (!obj_priv->stride)
|
||||
return -EINVAL;
|
||||
WARN((obj_priv->stride & (128 - 1)),
|
||||
"object 0x%08x is Y tiled but has non-128B pitch\n",
|
||||
obj_priv->gtt_offset);
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -1563,10 +1582,11 @@ try_again:
|
|||
* objects to finish before trying again.
|
||||
*/
|
||||
if (i == dev_priv->num_fence_regs) {
|
||||
ret = i915_gem_object_wait_rendering(reg->obj);
|
||||
ret = i915_gem_object_set_to_gtt_domain(reg->obj, 0);
|
||||
if (ret) {
|
||||
WARN(ret, "wait_rendering failed: %d\n", ret);
|
||||
return;
|
||||
WARN(ret != -ERESTARTSYS,
|
||||
"switch to GTT domain failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
goto try_again;
|
||||
}
|
||||
|
@ -1591,6 +1611,8 @@ try_again:
|
|||
i915_write_fence_reg(reg);
|
||||
else
|
||||
i830_write_fence_reg(reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1631,7 +1653,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
|
|||
if (dev_priv->mm.suspended)
|
||||
return -EBUSY;
|
||||
if (alignment == 0)
|
||||
alignment = PAGE_SIZE;
|
||||
alignment = i915_gem_get_gtt_alignment(obj);
|
||||
if (alignment & (PAGE_SIZE - 1)) {
|
||||
DRM_ERROR("Invalid object alignment requested %u\n", alignment);
|
||||
return -EINVAL;
|
||||
|
@ -2652,6 +2674,14 @@ i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment)
|
|||
DRM_ERROR("Failure to bind: %d", ret);
|
||||
return ret;
|
||||
}
|
||||
/*
|
||||
* Pre-965 chips need a fence register set up in order to
|
||||
* properly handle tiled surfaces.
|
||||
*/
|
||||
if (!IS_I965G(dev) &&
|
||||
obj_priv->fence_reg == I915_FENCE_REG_NONE &&
|
||||
obj_priv->tiling_mode != I915_TILING_NONE)
|
||||
i915_gem_object_get_fence_reg(obj, true);
|
||||
}
|
||||
obj_priv->pin_count++;
|
||||
|
||||
|
@ -3229,10 +3259,6 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
|
|||
dev_priv->mm.wedged = 0;
|
||||
}
|
||||
|
||||
dev_priv->mm.gtt_mapping = io_mapping_create_wc(dev->agp->base,
|
||||
dev->agp->agp_info.aper_size
|
||||
* 1024 * 1024);
|
||||
|
||||
mutex_lock(&dev->struct_mutex);
|
||||
dev_priv->mm.suspended = 0;
|
||||
|
||||
|
@ -3255,7 +3281,6 @@ int
|
|||
i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = dev->dev_private;
|
||||
int ret;
|
||||
|
||||
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
||||
|
@ -3264,7 +3289,6 @@ i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
|
|||
ret = i915_gem_idle(dev);
|
||||
drm_irq_uninstall(dev);
|
||||
|
||||
io_mapping_free(dev_priv->mm.gtt_mapping);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -3273,6 +3297,9 @@ i915_gem_lastclose(struct drm_device *dev)
|
|||
{
|
||||
int ret;
|
||||
|
||||
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
||||
return;
|
||||
|
||||
ret = i915_gem_idle(dev);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to idle hardware: %d\n", ret);
|
||||
|
@ -3294,7 +3321,7 @@ i915_gem_load(struct drm_device *dev)
|
|||
/* Old X drivers will take 0-2 for front, back, depth buffers */
|
||||
dev_priv->fence_reg_start = 3;
|
||||
|
||||
if (IS_I965G(dev))
|
||||
if (IS_I965G(dev) || IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
|
||||
dev_priv->num_fence_regs = 16;
|
||||
else
|
||||
dev_priv->num_fence_regs = 8;
|
||||
|
|
|
@ -173,6 +173,73 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
|
|||
dev_priv->mm.bit_6_swizzle_y = swizzle_y;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Returns the size of the fence for a tiled object of the given size.
|
||||
*/
|
||||
static int
|
||||
i915_get_fence_size(struct drm_device *dev, int size)
|
||||
{
|
||||
int i;
|
||||
int start;
|
||||
|
||||
if (IS_I965G(dev)) {
|
||||
/* The 965 can have fences at any page boundary. */
|
||||
return ALIGN(size, 4096);
|
||||
} else {
|
||||
/* Align the size to a power of two greater than the smallest
|
||||
* fence size.
|
||||
*/
|
||||
if (IS_I9XX(dev))
|
||||
start = 1024 * 1024;
|
||||
else
|
||||
start = 512 * 1024;
|
||||
|
||||
for (i = start; i < size; i <<= 1)
|
||||
;
|
||||
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
/* Check pitch constriants for all chips & tiling formats */
|
||||
static bool
|
||||
i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
|
||||
{
|
||||
int tile_width;
|
||||
|
||||
/* Linear is always fine */
|
||||
if (tiling_mode == I915_TILING_NONE)
|
||||
return true;
|
||||
|
||||
if (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))
|
||||
tile_width = 128;
|
||||
else
|
||||
tile_width = 512;
|
||||
|
||||
/* 965+ just needs multiples of tile width */
|
||||
if (IS_I965G(dev)) {
|
||||
if (stride & (tile_width - 1))
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Pre-965 needs power of two tile widths */
|
||||
if (stride < tile_width)
|
||||
return false;
|
||||
|
||||
if (stride & (stride - 1))
|
||||
return false;
|
||||
|
||||
/* We don't handle the aperture area covered by the fence being bigger
|
||||
* than the object size.
|
||||
*/
|
||||
if (i915_get_fence_size(dev, size) != size)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* Sets the tiling mode of an object, returning the required swizzling of
|
||||
* bit 6 of addresses in the object.
|
||||
|
@ -191,6 +258,11 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
|
|||
return -EINVAL;
|
||||
obj_priv = obj->driver_private;
|
||||
|
||||
if (!i915_tiling_ok(dev, args->stride, obj->size, args->tiling_mode)) {
|
||||
drm_gem_object_unreference(obj);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
mutex_lock(&dev->struct_mutex);
|
||||
|
||||
if (args->tiling_mode == I915_TILING_NONE) {
|
||||
|
@ -207,7 +279,24 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
|
|||
args->swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
|
||||
}
|
||||
}
|
||||
obj_priv->tiling_mode = args->tiling_mode;
|
||||
if (args->tiling_mode != obj_priv->tiling_mode) {
|
||||
int ret;
|
||||
|
||||
/* Unbind the object, as switching tiling means we're
|
||||
* switching the cache organization due to fencing, probably.
|
||||
*/
|
||||
ret = i915_gem_object_unbind(obj);
|
||||
if (ret != 0) {
|
||||
WARN(ret != -ERESTARTSYS,
|
||||
"failed to unbind object for tiling switch");
|
||||
args->tiling_mode = obj_priv->tiling_mode;
|
||||
mutex_unlock(&dev->struct_mutex);
|
||||
drm_gem_object_unreference(obj);
|
||||
|
||||
return ret;
|
||||
}
|
||||
obj_priv->tiling_mode = args->tiling_mode;
|
||||
}
|
||||
obj_priv->stride = args->stride;
|
||||
|
||||
mutex_unlock(&dev->struct_mutex);
|
||||
|
|
|
@ -174,6 +174,19 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
|
|||
return count;
|
||||
}
|
||||
|
||||
u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
|
||||
int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45;
|
||||
|
||||
if (!i915_pipe_enabled(dev, pipe)) {
|
||||
DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return I915_READ(reg);
|
||||
}
|
||||
|
||||
irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
|
||||
{
|
||||
struct drm_device *dev = (struct drm_device *) arg;
|
||||
|
|
|
@ -186,12 +186,12 @@
|
|||
#define FENCE_REG_830_0 0x2000
|
||||
#define I830_FENCE_START_MASK 0x07f80000
|
||||
#define I830_FENCE_TILING_Y_SHIFT 12
|
||||
#define I830_FENCE_SIZE_BITS(size) ((get_order(size >> 19) - 1) << 8)
|
||||
#define I830_FENCE_SIZE_BITS(size) ((ffs((size) >> 19) - 1) << 8)
|
||||
#define I830_FENCE_PITCH_SHIFT 4
|
||||
#define I830_FENCE_REG_VALID (1<<0)
|
||||
|
||||
#define I915_FENCE_START_MASK 0x0ff00000
|
||||
#define I915_FENCE_SIZE_BITS(size) ((get_order(size >> 20) - 1) << 8)
|
||||
#define I915_FENCE_SIZE_BITS(size) ((ffs((size) >> 20) - 1) << 8)
|
||||
|
||||
#define FENCE_REG_965_0 0x03000
|
||||
#define I965_FENCE_PITCH_SHIFT 2
|
||||
|
@ -1371,6 +1371,9 @@
|
|||
#define PIPE_FRAME_LOW_SHIFT 24
|
||||
#define PIPE_PIXEL_MASK 0x00ffffff
|
||||
#define PIPE_PIXEL_SHIFT 0
|
||||
/* GM45+ just has to be different */
|
||||
#define PIPEA_FRMCOUNT_GM45 0x70040
|
||||
#define PIPEA_FLIPCOUNT_GM45 0x70044
|
||||
|
||||
/* Cursor A & B regs */
|
||||
#define CURACNTR 0x70080
|
||||
|
@ -1439,6 +1442,9 @@
|
|||
#define PIPEBSTAT 0x71024
|
||||
#define PIPEBFRAMEHIGH 0x71040
|
||||
#define PIPEBFRAMEPIXEL 0x71044
|
||||
#define PIPEB_FRMCOUNT_GM45 0x71040
|
||||
#define PIPEB_FLIPCOUNT_GM45 0x71044
|
||||
|
||||
|
||||
/* Display B control */
|
||||
#define DSPBCNTR 0x71180
|
||||
|
|
|
@ -755,6 +755,8 @@ static void intel_crtc_mode_set(struct drm_crtc *crtc,
|
|||
case INTEL_OUTPUT_SDVO:
|
||||
case INTEL_OUTPUT_HDMI:
|
||||
is_sdvo = true;
|
||||
if (intel_output->needs_tv_clock)
|
||||
is_tv = true;
|
||||
break;
|
||||
case INTEL_OUTPUT_DVO:
|
||||
is_dvo = true;
|
||||
|
@ -1452,6 +1454,7 @@ static int intel_connector_clones(struct drm_device *dev, int type_mask)
|
|||
|
||||
static void intel_setup_outputs(struct drm_device *dev)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct drm_connector *connector;
|
||||
|
||||
intel_crt_init(dev);
|
||||
|
@ -1463,13 +1466,16 @@ static void intel_setup_outputs(struct drm_device *dev)
|
|||
if (IS_I9XX(dev)) {
|
||||
int found;
|
||||
|
||||
found = intel_sdvo_init(dev, SDVOB);
|
||||
if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
|
||||
intel_hdmi_init(dev, SDVOB);
|
||||
|
||||
found = intel_sdvo_init(dev, SDVOC);
|
||||
if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
|
||||
intel_hdmi_init(dev, SDVOC);
|
||||
if (I915_READ(SDVOB) & SDVO_DETECTED) {
|
||||
found = intel_sdvo_init(dev, SDVOB);
|
||||
if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
|
||||
intel_hdmi_init(dev, SDVOB);
|
||||
}
|
||||
if (!IS_G4X(dev) || (I915_READ(SDVOB) & SDVO_DETECTED)) {
|
||||
found = intel_sdvo_init(dev, SDVOC);
|
||||
if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
|
||||
intel_hdmi_init(dev, SDVOC);
|
||||
}
|
||||
} else
|
||||
intel_dvo_init(dev);
|
||||
|
||||
|
|
|
@ -82,6 +82,7 @@ struct intel_output {
|
|||
struct intel_i2c_chan *i2c_bus; /* for control functions */
|
||||
struct intel_i2c_chan *ddc_bus; /* for DDC only stuff */
|
||||
bool load_detect_temp;
|
||||
bool needs_tv_clock;
|
||||
void *dev_priv;
|
||||
};
|
||||
|
||||
|
|
|
@ -27,6 +27,7 @@
|
|||
* Jesse Barnes <jesse.barnes@intel.com>
|
||||
*/
|
||||
|
||||
#include <linux/dmi.h>
|
||||
#include <linux/i2c.h>
|
||||
#include "drmP.h"
|
||||
#include "drm.h"
|
||||
|
@ -311,10 +312,8 @@ static int intel_lvds_get_modes(struct drm_connector *connector)
|
|||
if (dev_priv->panel_fixed_mode != NULL) {
|
||||
struct drm_display_mode *mode;
|
||||
|
||||
mutex_lock(&dev->mode_config.mutex);
|
||||
mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
|
||||
drm_mode_probed_add(connector, mode);
|
||||
mutex_unlock(&dev->mode_config.mutex);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
@ -405,6 +404,16 @@ void intel_lvds_init(struct drm_device *dev)
|
|||
u32 lvds;
|
||||
int pipe;
|
||||
|
||||
/* Blacklist machines that we know falsely report LVDS. */
|
||||
/* FIXME: add a check for the Aopen Mini PC */
|
||||
|
||||
/* Apple Mac Mini Core Duo and Mac Mini Core 2 Duo */
|
||||
if(dmi_match(DMI_PRODUCT_NAME, "Macmini1,1") ||
|
||||
dmi_match(DMI_PRODUCT_NAME, "Macmini2,1")) {
|
||||
DRM_DEBUG("Skipping LVDS initialization for Apple Mac Mini\n");
|
||||
return;
|
||||
}
|
||||
|
||||
intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
|
||||
if (!intel_output) {
|
||||
return;
|
||||
|
@ -458,7 +467,7 @@ void intel_lvds_init(struct drm_device *dev)
|
|||
dev_priv->panel_fixed_mode =
|
||||
drm_mode_duplicate(dev, scan);
|
||||
mutex_unlock(&dev->mode_config.mutex);
|
||||
goto out; /* FIXME: check for quirks */
|
||||
goto out;
|
||||
}
|
||||
mutex_unlock(&dev->mode_config.mutex);
|
||||
}
|
||||
|
@ -492,7 +501,7 @@ void intel_lvds_init(struct drm_device *dev)
|
|||
if (dev_priv->panel_fixed_mode) {
|
||||
dev_priv->panel_fixed_mode->type |=
|
||||
DRM_MODE_TYPE_PREFERRED;
|
||||
goto out; /* FIXME: check for quirks */
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -500,38 +509,6 @@ void intel_lvds_init(struct drm_device *dev)
|
|||
if (!dev_priv->panel_fixed_mode)
|
||||
goto failed;
|
||||
|
||||
/* FIXME: detect aopen & mac mini type stuff automatically? */
|
||||
/*
|
||||
* Blacklist machines with BIOSes that list an LVDS panel without
|
||||
* actually having one.
|
||||
*/
|
||||
if (IS_I945GM(dev)) {
|
||||
/* aopen mini pc */
|
||||
if (dev->pdev->subsystem_vendor == 0xa0a0)
|
||||
goto failed;
|
||||
|
||||
if ((dev->pdev->subsystem_vendor == 0x8086) &&
|
||||
(dev->pdev->subsystem_device == 0x7270)) {
|
||||
/* It's a Mac Mini or Macbook Pro.
|
||||
*
|
||||
* Apple hardware is out to get us. The macbook pro
|
||||
* has a real LVDS panel, but the mac mini does not,
|
||||
* and they have the same device IDs. We'll
|
||||
* distinguish by panel size, on the assumption
|
||||
* that Apple isn't about to make any machines with an
|
||||
* 800x600 display.
|
||||
*/
|
||||
|
||||
if (dev_priv->panel_fixed_mode != NULL &&
|
||||
dev_priv->panel_fixed_mode->hdisplay == 800 &&
|
||||
dev_priv->panel_fixed_mode->vdisplay == 600) {
|
||||
DRM_DEBUG("Suspected Mac Mini, ignoring the LVDS\n");
|
||||
goto failed;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
out:
|
||||
drm_sysfs_connector_add(connector);
|
||||
return;
|
||||
|
|
Разница между файлами не показана из-за своего большого размера
Загрузить разницу
|
@ -173,6 +173,9 @@ struct intel_sdvo_get_trained_inputs_response {
|
|||
* Returns two struct intel_sdvo_output_flags structures.
|
||||
*/
|
||||
#define SDVO_CMD_GET_IN_OUT_MAP 0x06
|
||||
struct intel_sdvo_in_out_map {
|
||||
u16 in0, in1;
|
||||
};
|
||||
|
||||
/**
|
||||
* Sets the current mapping of SDVO inputs to outputs on the device.
|
||||
|
@ -206,7 +209,8 @@ struct intel_sdvo_get_trained_inputs_response {
|
|||
struct intel_sdvo_get_interrupt_event_source_response {
|
||||
u16 interrupt_status;
|
||||
unsigned int ambient_light_interrupt:1;
|
||||
unsigned int pad:7;
|
||||
unsigned int hdmi_audio_encrypt_change:1;
|
||||
unsigned int pad:6;
|
||||
} __attribute__((packed));
|
||||
|
||||
/**
|
||||
|
@ -305,23 +309,411 @@ struct intel_sdvo_set_target_input_args {
|
|||
# define SDVO_CLOCK_RATE_MULT_4X (1 << 3)
|
||||
|
||||
#define SDVO_CMD_GET_SUPPORTED_TV_FORMATS 0x27
|
||||
/** 5 bytes of bit flags for TV formats shared by all TV format functions */
|
||||
struct intel_sdvo_tv_format {
|
||||
unsigned int ntsc_m:1;
|
||||
unsigned int ntsc_j:1;
|
||||
unsigned int ntsc_443:1;
|
||||
unsigned int pal_b:1;
|
||||
unsigned int pal_d:1;
|
||||
unsigned int pal_g:1;
|
||||
unsigned int pal_h:1;
|
||||
unsigned int pal_i:1;
|
||||
|
||||
unsigned int pal_m:1;
|
||||
unsigned int pal_n:1;
|
||||
unsigned int pal_nc:1;
|
||||
unsigned int pal_60:1;
|
||||
unsigned int secam_b:1;
|
||||
unsigned int secam_d:1;
|
||||
unsigned int secam_g:1;
|
||||
unsigned int secam_k:1;
|
||||
|
||||
unsigned int secam_k1:1;
|
||||
unsigned int secam_l:1;
|
||||
unsigned int secam_60:1;
|
||||
unsigned int hdtv_std_smpte_240m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_240m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_260m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_260m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080i_50:1;
|
||||
|
||||
unsigned int hdtv_std_smpte_274m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_23:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_24:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_25:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_29:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_30:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_50:1;
|
||||
|
||||
unsigned int hdtv_std_smpte_274m_1080p_59:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_60:1;
|
||||
unsigned int hdtv_std_smpte_295m_1080i_50:1;
|
||||
unsigned int hdtv_std_smpte_295m_1080p_50:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_59:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_60:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_50:1;
|
||||
unsigned int hdtv_std_smpte_293m_480p_59:1;
|
||||
|
||||
unsigned int hdtv_std_smpte_170m_480i_59:1;
|
||||
unsigned int hdtv_std_iturbt601_576i_50:1;
|
||||
unsigned int hdtv_std_iturbt601_576p_50:1;
|
||||
unsigned int hdtv_std_eia_7702a_480i_60:1;
|
||||
unsigned int hdtv_std_eia_7702a_480p_60:1;
|
||||
unsigned int pad:3;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define SDVO_CMD_GET_TV_FORMAT 0x28
|
||||
|
||||
#define SDVO_CMD_SET_TV_FORMAT 0x29
|
||||
|
||||
/** Returns the resolutiosn that can be used with the given TV format */
|
||||
#define SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT 0x83
|
||||
struct intel_sdvo_sdtv_resolution_request {
|
||||
unsigned int ntsc_m:1;
|
||||
unsigned int ntsc_j:1;
|
||||
unsigned int ntsc_443:1;
|
||||
unsigned int pal_b:1;
|
||||
unsigned int pal_d:1;
|
||||
unsigned int pal_g:1;
|
||||
unsigned int pal_h:1;
|
||||
unsigned int pal_i:1;
|
||||
|
||||
unsigned int pal_m:1;
|
||||
unsigned int pal_n:1;
|
||||
unsigned int pal_nc:1;
|
||||
unsigned int pal_60:1;
|
||||
unsigned int secam_b:1;
|
||||
unsigned int secam_d:1;
|
||||
unsigned int secam_g:1;
|
||||
unsigned int secam_k:1;
|
||||
|
||||
unsigned int secam_k1:1;
|
||||
unsigned int secam_l:1;
|
||||
unsigned int secam_60:1;
|
||||
unsigned int pad:5;
|
||||
} __attribute__((packed));
|
||||
|
||||
struct intel_sdvo_sdtv_resolution_reply {
|
||||
unsigned int res_320x200:1;
|
||||
unsigned int res_320x240:1;
|
||||
unsigned int res_400x300:1;
|
||||
unsigned int res_640x350:1;
|
||||
unsigned int res_640x400:1;
|
||||
unsigned int res_640x480:1;
|
||||
unsigned int res_704x480:1;
|
||||
unsigned int res_704x576:1;
|
||||
|
||||
unsigned int res_720x350:1;
|
||||
unsigned int res_720x400:1;
|
||||
unsigned int res_720x480:1;
|
||||
unsigned int res_720x540:1;
|
||||
unsigned int res_720x576:1;
|
||||
unsigned int res_768x576:1;
|
||||
unsigned int res_800x600:1;
|
||||
unsigned int res_832x624:1;
|
||||
|
||||
unsigned int res_920x766:1;
|
||||
unsigned int res_1024x768:1;
|
||||
unsigned int res_1280x1024:1;
|
||||
unsigned int pad:5;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Get supported resolution with squire pixel aspect ratio that can be
|
||||
scaled for the requested HDTV format */
|
||||
#define SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT 0x85
|
||||
|
||||
struct intel_sdvo_hdtv_resolution_request {
|
||||
unsigned int hdtv_std_smpte_240m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_240m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_260m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_260m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080i_50:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_23:1;
|
||||
|
||||
unsigned int hdtv_std_smpte_274m_1080p_24:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_25:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_29:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_30:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_50:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_59:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_60:1;
|
||||
unsigned int hdtv_std_smpte_295m_1080i_50:1;
|
||||
|
||||
unsigned int hdtv_std_smpte_295m_1080p_50:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_59:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_60:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_50:1;
|
||||
unsigned int hdtv_std_smpte_293m_480p_59:1;
|
||||
unsigned int hdtv_std_smpte_170m_480i_59:1;
|
||||
unsigned int hdtv_std_iturbt601_576i_50:1;
|
||||
unsigned int hdtv_std_iturbt601_576p_50:1;
|
||||
|
||||
unsigned int hdtv_std_eia_7702a_480i_60:1;
|
||||
unsigned int hdtv_std_eia_7702a_480p_60:1;
|
||||
unsigned int pad:6;
|
||||
} __attribute__((packed));
|
||||
|
||||
struct intel_sdvo_hdtv_resolution_reply {
|
||||
unsigned int res_640x480:1;
|
||||
unsigned int res_800x600:1;
|
||||
unsigned int res_1024x768:1;
|
||||
unsigned int res_1280x960:1;
|
||||
unsigned int res_1400x1050:1;
|
||||
unsigned int res_1600x1200:1;
|
||||
unsigned int res_1920x1440:1;
|
||||
unsigned int res_2048x1536:1;
|
||||
|
||||
unsigned int res_2560x1920:1;
|
||||
unsigned int res_3200x2400:1;
|
||||
unsigned int res_3840x2880:1;
|
||||
unsigned int pad1:5;
|
||||
|
||||
unsigned int res_848x480:1;
|
||||
unsigned int res_1064x600:1;
|
||||
unsigned int res_1280x720:1;
|
||||
unsigned int res_1360x768:1;
|
||||
unsigned int res_1704x960:1;
|
||||
unsigned int res_1864x1050:1;
|
||||
unsigned int res_1920x1080:1;
|
||||
unsigned int res_2128x1200:1;
|
||||
|
||||
unsigned int res_2560x1400:1;
|
||||
unsigned int res_2728x1536:1;
|
||||
unsigned int res_3408x1920:1;
|
||||
unsigned int res_4264x2400:1;
|
||||
unsigned int res_5120x2880:1;
|
||||
unsigned int pad2:3;
|
||||
|
||||
unsigned int res_768x480:1;
|
||||
unsigned int res_960x600:1;
|
||||
unsigned int res_1152x720:1;
|
||||
unsigned int res_1124x768:1;
|
||||
unsigned int res_1536x960:1;
|
||||
unsigned int res_1680x1050:1;
|
||||
unsigned int res_1728x1080:1;
|
||||
unsigned int res_1920x1200:1;
|
||||
|
||||
unsigned int res_2304x1440:1;
|
||||
unsigned int res_2456x1536:1;
|
||||
unsigned int res_3072x1920:1;
|
||||
unsigned int res_3840x2400:1;
|
||||
unsigned int res_4608x2880:1;
|
||||
unsigned int pad3:3;
|
||||
|
||||
unsigned int res_1280x1024:1;
|
||||
unsigned int pad4:7;
|
||||
|
||||
unsigned int res_1280x768:1;
|
||||
unsigned int pad5:7;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Get supported power state returns info for encoder and monitor, rely on
|
||||
last SetTargetInput and SetTargetOutput calls */
|
||||
#define SDVO_CMD_GET_SUPPORTED_POWER_STATES 0x2a
|
||||
/* Get power state returns info for encoder and monitor, rely on last
|
||||
SetTargetInput and SetTargetOutput calls */
|
||||
#define SDVO_CMD_GET_POWER_STATE 0x2b
|
||||
#define SDVO_CMD_GET_ENCODER_POWER_STATE 0x2b
|
||||
#define SDVO_CMD_SET_ENCODER_POWER_STATE 0x2c
|
||||
# define SDVO_ENCODER_STATE_ON (1 << 0)
|
||||
# define SDVO_ENCODER_STATE_STANDBY (1 << 1)
|
||||
# define SDVO_ENCODER_STATE_SUSPEND (1 << 2)
|
||||
# define SDVO_ENCODER_STATE_OFF (1 << 3)
|
||||
# define SDVO_MONITOR_STATE_ON (1 << 4)
|
||||
# define SDVO_MONITOR_STATE_STANDBY (1 << 5)
|
||||
# define SDVO_MONITOR_STATE_SUSPEND (1 << 6)
|
||||
# define SDVO_MONITOR_STATE_OFF (1 << 7)
|
||||
|
||||
#define SDVO_CMD_SET_TV_RESOLUTION_SUPPORT 0x93
|
||||
#define SDVO_CMD_GET_MAX_PANEL_POWER_SEQUENCING 0x2d
|
||||
#define SDVO_CMD_GET_PANEL_POWER_SEQUENCING 0x2e
|
||||
#define SDVO_CMD_SET_PANEL_POWER_SEQUENCING 0x2f
|
||||
/**
|
||||
* The panel power sequencing parameters are in units of milliseconds.
|
||||
* The high fields are bits 8:9 of the 10-bit values.
|
||||
*/
|
||||
struct sdvo_panel_power_sequencing {
|
||||
u8 t0;
|
||||
u8 t1;
|
||||
u8 t2;
|
||||
u8 t3;
|
||||
u8 t4;
|
||||
|
||||
unsigned int t0_high:2;
|
||||
unsigned int t1_high:2;
|
||||
unsigned int t2_high:2;
|
||||
unsigned int t3_high:2;
|
||||
|
||||
unsigned int t4_high:2;
|
||||
unsigned int pad:6;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define SDVO_CMD_GET_MAX_BACKLIGHT_LEVEL 0x30
|
||||
struct sdvo_max_backlight_reply {
|
||||
u8 max_value;
|
||||
u8 default_value;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define SDVO_CMD_GET_BACKLIGHT_LEVEL 0x31
|
||||
#define SDVO_CMD_SET_BACKLIGHT_LEVEL 0x32
|
||||
|
||||
#define SDVO_CMD_GET_AMBIENT_LIGHT 0x33
|
||||
struct sdvo_get_ambient_light_reply {
|
||||
u16 trip_low;
|
||||
u16 trip_high;
|
||||
u16 value;
|
||||
} __attribute__((packed));
|
||||
#define SDVO_CMD_SET_AMBIENT_LIGHT 0x34
|
||||
struct sdvo_set_ambient_light_reply {
|
||||
u16 trip_low;
|
||||
u16 trip_high;
|
||||
unsigned int enable:1;
|
||||
unsigned int pad:7;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Set display power state */
|
||||
#define SDVO_CMD_SET_DISPLAY_POWER_STATE 0x7d
|
||||
# define SDVO_DISPLAY_STATE_ON (1 << 0)
|
||||
# define SDVO_DISPLAY_STATE_STANDBY (1 << 1)
|
||||
# define SDVO_DISPLAY_STATE_SUSPEND (1 << 2)
|
||||
# define SDVO_DISPLAY_STATE_OFF (1 << 3)
|
||||
|
||||
#define SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS 0x84
|
||||
struct intel_sdvo_enhancements_reply {
|
||||
unsigned int flicker_filter:1;
|
||||
unsigned int flicker_filter_adaptive:1;
|
||||
unsigned int flicker_filter_2d:1;
|
||||
unsigned int saturation:1;
|
||||
unsigned int hue:1;
|
||||
unsigned int brightness:1;
|
||||
unsigned int contrast:1;
|
||||
unsigned int overscan_h:1;
|
||||
|
||||
unsigned int overscan_v:1;
|
||||
unsigned int position_h:1;
|
||||
unsigned int position_v:1;
|
||||
unsigned int sharpness:1;
|
||||
unsigned int dot_crawl:1;
|
||||
unsigned int dither:1;
|
||||
unsigned int max_tv_chroma_filter:1;
|
||||
unsigned int max_tv_luma_filter:1;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Picture enhancement limits below are dependent on the current TV format,
|
||||
* and thus need to be queried and set after it.
|
||||
*/
|
||||
#define SDVO_CMD_GET_MAX_FLICKER_FITER 0x4d
|
||||
#define SDVO_CMD_GET_MAX_ADAPTIVE_FLICKER_FITER 0x7b
|
||||
#define SDVO_CMD_GET_MAX_2D_FLICKER_FITER 0x52
|
||||
#define SDVO_CMD_GET_MAX_SATURATION 0x55
|
||||
#define SDVO_CMD_GET_MAX_HUE 0x58
|
||||
#define SDVO_CMD_GET_MAX_BRIGHTNESS 0x5b
|
||||
#define SDVO_CMD_GET_MAX_CONTRAST 0x5e
|
||||
#define SDVO_CMD_GET_MAX_OVERSCAN_H 0x61
|
||||
#define SDVO_CMD_GET_MAX_OVERSCAN_V 0x64
|
||||
#define SDVO_CMD_GET_MAX_POSITION_H 0x67
|
||||
#define SDVO_CMD_GET_MAX_POSITION_V 0x6a
|
||||
#define SDVO_CMD_GET_MAX_SHARPNESS_V 0x6d
|
||||
#define SDVO_CMD_GET_MAX_TV_CHROMA 0x74
|
||||
#define SDVO_CMD_GET_MAX_TV_LUMA 0x77
|
||||
struct intel_sdvo_enhancement_limits_reply {
|
||||
u16 max_value;
|
||||
u16 default_value;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define SDVO_CMD_GET_LVDS_PANEL_INFORMATION 0x7f
|
||||
#define SDVO_CMD_SET_LVDS_PANEL_INFORMATION 0x80
|
||||
# define SDVO_LVDS_COLOR_DEPTH_18 (0 << 0)
|
||||
# define SDVO_LVDS_COLOR_DEPTH_24 (1 << 0)
|
||||
# define SDVO_LVDS_CONNECTOR_SPWG (0 << 2)
|
||||
# define SDVO_LVDS_CONNECTOR_OPENLDI (1 << 2)
|
||||
# define SDVO_LVDS_SINGLE_CHANNEL (0 << 4)
|
||||
# define SDVO_LVDS_DUAL_CHANNEL (1 << 4)
|
||||
|
||||
#define SDVO_CMD_GET_FLICKER_FILTER 0x4e
|
||||
#define SDVO_CMD_SET_FLICKER_FILTER 0x4f
|
||||
#define SDVO_CMD_GET_ADAPTIVE_FLICKER_FITER 0x50
|
||||
#define SDVO_CMD_SET_ADAPTIVE_FLICKER_FITER 0x51
|
||||
#define SDVO_CMD_GET_2D_FLICKER_FITER 0x53
|
||||
#define SDVO_CMD_SET_2D_FLICKER_FITER 0x54
|
||||
#define SDVO_CMD_GET_SATURATION 0x56
|
||||
#define SDVO_CMD_SET_SATURATION 0x57
|
||||
#define SDVO_CMD_GET_HUE 0x59
|
||||
#define SDVO_CMD_SET_HUE 0x5a
|
||||
#define SDVO_CMD_GET_BRIGHTNESS 0x5c
|
||||
#define SDVO_CMD_SET_BRIGHTNESS 0x5d
|
||||
#define SDVO_CMD_GET_CONTRAST 0x5f
|
||||
#define SDVO_CMD_SET_CONTRAST 0x60
|
||||
#define SDVO_CMD_GET_OVERSCAN_H 0x62
|
||||
#define SDVO_CMD_SET_OVERSCAN_H 0x63
|
||||
#define SDVO_CMD_GET_OVERSCAN_V 0x65
|
||||
#define SDVO_CMD_SET_OVERSCAN_V 0x66
|
||||
#define SDVO_CMD_GET_POSITION_H 0x68
|
||||
#define SDVO_CMD_SET_POSITION_H 0x69
|
||||
#define SDVO_CMD_GET_POSITION_V 0x6b
|
||||
#define SDVO_CMD_SET_POSITION_V 0x6c
|
||||
#define SDVO_CMD_GET_SHARPNESS 0x6e
|
||||
#define SDVO_CMD_SET_SHARPNESS 0x6f
|
||||
#define SDVO_CMD_GET_TV_CHROMA 0x75
|
||||
#define SDVO_CMD_SET_TV_CHROMA 0x76
|
||||
#define SDVO_CMD_GET_TV_LUMA 0x78
|
||||
#define SDVO_CMD_SET_TV_LUMA 0x79
|
||||
struct intel_sdvo_enhancements_arg {
|
||||
u16 value;
|
||||
}__attribute__((packed));
|
||||
|
||||
#define SDVO_CMD_GET_DOT_CRAWL 0x70
|
||||
#define SDVO_CMD_SET_DOT_CRAWL 0x71
|
||||
# define SDVO_DOT_CRAWL_ON (1 << 0)
|
||||
# define SDVO_DOT_CRAWL_DEFAULT_ON (1 << 1)
|
||||
|
||||
#define SDVO_CMD_GET_DITHER 0x72
|
||||
#define SDVO_CMD_SET_DITHER 0x73
|
||||
# define SDVO_DITHER_ON (1 << 0)
|
||||
# define SDVO_DITHER_DEFAULT_ON (1 << 1)
|
||||
|
||||
#define SDVO_CMD_SET_CONTROL_BUS_SWITCH 0x7a
|
||||
# define SDVO_CONTROL_BUS_PROM 0x0
|
||||
# define SDVO_CONTROL_BUS_DDC1 0x1
|
||||
# define SDVO_CONTROL_BUS_DDC2 0x2
|
||||
# define SDVO_CONTROL_BUS_DDC3 0x3
|
||||
# define SDVO_CONTROL_BUS_PROM (1 << 0)
|
||||
# define SDVO_CONTROL_BUS_DDC1 (1 << 1)
|
||||
# define SDVO_CONTROL_BUS_DDC2 (1 << 2)
|
||||
# define SDVO_CONTROL_BUS_DDC3 (1 << 3)
|
||||
|
||||
/* HDMI op codes */
|
||||
#define SDVO_CMD_GET_SUPP_ENCODE 0x9d
|
||||
#define SDVO_CMD_GET_ENCODE 0x9e
|
||||
#define SDVO_CMD_SET_ENCODE 0x9f
|
||||
#define SDVO_ENCODE_DVI 0x0
|
||||
#define SDVO_ENCODE_HDMI 0x1
|
||||
#define SDVO_CMD_SET_PIXEL_REPLI 0x8b
|
||||
#define SDVO_CMD_GET_PIXEL_REPLI 0x8c
|
||||
#define SDVO_CMD_GET_COLORIMETRY_CAP 0x8d
|
||||
#define SDVO_CMD_SET_COLORIMETRY 0x8e
|
||||
#define SDVO_COLORIMETRY_RGB256 0x0
|
||||
#define SDVO_COLORIMETRY_RGB220 0x1
|
||||
#define SDVO_COLORIMETRY_YCrCb422 0x3
|
||||
#define SDVO_COLORIMETRY_YCrCb444 0x4
|
||||
#define SDVO_CMD_GET_COLORIMETRY 0x8f
|
||||
#define SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER 0x90
|
||||
#define SDVO_CMD_SET_AUDIO_STAT 0x91
|
||||
#define SDVO_CMD_GET_AUDIO_STAT 0x92
|
||||
#define SDVO_CMD_SET_HBUF_INDEX 0x93
|
||||
#define SDVO_CMD_GET_HBUF_INDEX 0x94
|
||||
#define SDVO_CMD_GET_HBUF_INFO 0x95
|
||||
#define SDVO_CMD_SET_HBUF_AV_SPLIT 0x96
|
||||
#define SDVO_CMD_GET_HBUF_AV_SPLIT 0x97
|
||||
#define SDVO_CMD_SET_HBUF_DATA 0x98
|
||||
#define SDVO_CMD_GET_HBUF_DATA 0x99
|
||||
#define SDVO_CMD_SET_HBUF_TXRATE 0x9a
|
||||
#define SDVO_CMD_GET_HBUF_TXRATE 0x9b
|
||||
#define SDVO_HBUF_TX_DISABLED (0 << 6)
|
||||
#define SDVO_HBUF_TX_ONCE (2 << 6)
|
||||
#define SDVO_HBUF_TX_VSYNC (3 << 6)
|
||||
#define SDVO_CMD_GET_AUDIO_TX_INFO 0x9c
|
||||
|
||||
struct intel_sdvo_encode{
|
||||
u8 dvi_rev;
|
||||
u8 hdmi_rev;
|
||||
} __attribute__ ((packed));
|
||||
|
|
|
@ -1039,9 +1039,9 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
|
|||
|
||||
#if __OS_HAS_AGP
|
||||
if (dev_priv->flags & RADEON_IS_AGP) {
|
||||
drm_core_ioremap(dev_priv->cp_ring, dev);
|
||||
drm_core_ioremap(dev_priv->ring_rptr, dev);
|
||||
drm_core_ioremap(dev->agp_buffer_map, dev);
|
||||
drm_core_ioremap_wc(dev_priv->cp_ring, dev);
|
||||
drm_core_ioremap_wc(dev_priv->ring_rptr, dev);
|
||||
drm_core_ioremap_wc(dev->agp_buffer_map, dev);
|
||||
if (!dev_priv->cp_ring->handle ||
|
||||
!dev_priv->ring_rptr->handle ||
|
||||
!dev->agp_buffer_map->handle) {
|
||||
|
|
|
@ -4599,6 +4599,7 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)
|
|||
printk(KERN_ERR "%s: no memory for coeffs\n",
|
||||
__func__);
|
||||
ret = -ENOMEM;
|
||||
kfree(bch);
|
||||
goto free_chan;
|
||||
}
|
||||
bch->nr = ch;
|
||||
|
@ -4767,6 +4768,7 @@ init_multi_port(struct hfc_multi *hc, int pt)
|
|||
printk(KERN_ERR "%s: no memory for coeffs\n",
|
||||
__func__);
|
||||
ret = -ENOMEM;
|
||||
kfree(bch);
|
||||
goto free_chan;
|
||||
}
|
||||
bch->nr = ch + 1;
|
||||
|
|
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