ftgmac100: Make ring sizes configurable via ethtool
We set an arbitrary max at 1024 since we pre-allocate the actual descriptor arrays and skb arrays to the full size to keep the code a bit simpler and avoid allocation failures in the reset task. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Benjamin Herrenschmidt
David S. Miller
Родитель
3833dc6c18
Коммит
52d9138fb3
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@ -40,8 +40,15 @@
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#define DRV_NAME "ftgmac100"
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#define DRV_VERSION "0.7"
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#define RX_QUEUE_ENTRIES 256 /* must be power of 2 */
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#define TX_QUEUE_ENTRIES 512 /* must be power of 2 */
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/* Arbitrary values, I am not sure the HW has limits */
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#define MAX_RX_QUEUE_ENTRIES 1024
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#define MAX_TX_QUEUE_ENTRIES 1024
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#define MIN_RX_QUEUE_ENTRIES 32
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#define MIN_TX_QUEUE_ENTRIES 32
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/* Defaults */
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#define DEF_RX_QUEUE_ENTRIES 256
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#define DEF_TX_QUEUE_ENTRIES 512
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#define MAX_PKT_SIZE 1536
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#define RX_BUF_SIZE MAX_PKT_SIZE /* must be smaller than 0x3fff */
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@ -49,30 +56,32 @@
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/* Min number of tx ring entries before stopping queue */
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#define TX_THRESHOLD (MAX_SKB_FRAGS + 1)
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struct ftgmac100_descs {
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struct ftgmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
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struct ftgmac100_txdes txdes[TX_QUEUE_ENTRIES];
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};
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struct ftgmac100 {
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/* Registers */
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struct resource *res;
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void __iomem *base;
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struct ftgmac100_descs *descs;
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dma_addr_t descs_dma_addr;
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/* Rx ring */
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struct sk_buff *rx_skbs[RX_QUEUE_ENTRIES];
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unsigned int rx_q_entries;
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struct ftgmac100_rxdes *rxdes;
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dma_addr_t rxdes_dma;
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struct sk_buff **rx_skbs;
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unsigned int rx_pointer;
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u32 rxdes0_edorr_mask;
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/* Tx ring */
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struct sk_buff *tx_skbs[TX_QUEUE_ENTRIES];
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unsigned int tx_q_entries;
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struct ftgmac100_txdes *txdes;
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dma_addr_t txdes_dma;
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struct sk_buff **tx_skbs;
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unsigned int tx_clean_pointer;
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unsigned int tx_pointer;
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u32 txdes0_edotr_mask;
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/* Used to signal the reset task of ring change request */
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unsigned int new_rx_q_entries;
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unsigned int new_tx_q_entries;
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/* Scratch page to use when rx skb alloc fails */
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void *rx_scratch;
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dma_addr_t rx_scratch_dma;
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@ -219,14 +228,10 @@ static void ftgmac100_init_hw(struct ftgmac100 *priv)
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iowrite32(reg, priv->base + FTGMAC100_OFFSET_ISR);
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/* Setup RX ring buffer base */
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iowrite32(priv->descs_dma_addr +
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offsetof(struct ftgmac100_descs, rxdes),
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priv->base + FTGMAC100_OFFSET_RXR_BADR);
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iowrite32(priv->rxdes_dma, priv->base + FTGMAC100_OFFSET_RXR_BADR);
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/* Setup TX ring buffer base */
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iowrite32(priv->descs_dma_addr +
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offsetof(struct ftgmac100_descs, txdes),
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priv->base + FTGMAC100_OFFSET_NPTXR_BADR);
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iowrite32(priv->txdes_dma, priv->base + FTGMAC100_OFFSET_NPTXR_BADR);
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/* Configure RX buffer size */
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iowrite32(FTGMAC100_RBSR_SIZE(RX_BUF_SIZE),
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@ -339,7 +344,7 @@ static int ftgmac100_alloc_rx_buf(struct ftgmac100 *priv, unsigned int entry,
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dma_wmb();
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/* Clean status (which resets own bit) */
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if (entry == (RX_QUEUE_ENTRIES - 1))
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if (entry == (priv->rx_q_entries - 1))
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rxdes->rxdes0 = cpu_to_le32(priv->rxdes0_edorr_mask);
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else
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rxdes->rxdes0 = 0;
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@ -347,9 +352,10 @@ static int ftgmac100_alloc_rx_buf(struct ftgmac100 *priv, unsigned int entry,
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return 0;
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}
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static int ftgmac100_next_rx_pointer(int pointer)
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static unsigned int ftgmac100_next_rx_pointer(struct ftgmac100 *priv,
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unsigned int pointer)
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{
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return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
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return (pointer + 1) & (priv->rx_q_entries - 1);
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}
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static void ftgmac100_rx_packet_error(struct ftgmac100 *priv, u32 status)
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@ -379,7 +385,7 @@ static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
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/* Grab next RX descriptor */
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pointer = priv->rx_pointer;
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rxdes = &priv->descs->rxdes[pointer];
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rxdes = &priv->rxdes[pointer];
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/* Grab descriptor status */
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status = le32_to_cpu(rxdes->rxdes0);
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@ -467,7 +473,7 @@ static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
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/* Resplenish rx ring */
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ftgmac100_alloc_rx_buf(priv, pointer, rxdes, GFP_ATOMIC);
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priv->rx_pointer = ftgmac100_next_rx_pointer(pointer);
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priv->rx_pointer = ftgmac100_next_rx_pointer(priv, pointer);
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skb->protocol = eth_type_trans(skb, netdev);
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@ -486,7 +492,7 @@ static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
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drop:
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/* Clean rxdes0 (which resets own bit) */
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rxdes->rxdes0 = cpu_to_le32(status & priv->rxdes0_edorr_mask);
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priv->rx_pointer = ftgmac100_next_rx_pointer(pointer);
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priv->rx_pointer = ftgmac100_next_rx_pointer(priv, pointer);
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netdev->stats.rx_dropped++;
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return true;
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}
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@ -494,15 +500,16 @@ static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
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static u32 ftgmac100_base_tx_ctlstat(struct ftgmac100 *priv,
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unsigned int index)
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{
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if (index == (TX_QUEUE_ENTRIES - 1))
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if (index == (priv->tx_q_entries - 1))
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return priv->txdes0_edotr_mask;
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else
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return 0;
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}
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static int ftgmac100_next_tx_pointer(int pointer)
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static unsigned int ftgmac100_next_tx_pointer(struct ftgmac100 *priv,
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unsigned int pointer)
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{
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return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
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return (pointer + 1) & (priv->tx_q_entries - 1);
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}
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static u32 ftgmac100_tx_buf_avail(struct ftgmac100 *priv)
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@ -514,7 +521,7 @@ static u32 ftgmac100_tx_buf_avail(struct ftgmac100 *priv)
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* test for ftgmac100_tx_buf_cleanable() below
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*/
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return (priv->tx_clean_pointer - priv->tx_pointer - 1) &
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(TX_QUEUE_ENTRIES - 1);
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(priv->tx_q_entries - 1);
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}
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static bool ftgmac100_tx_buf_cleanable(struct ftgmac100 *priv)
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@ -554,7 +561,7 @@ static bool ftgmac100_tx_complete_packet(struct ftgmac100 *priv)
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u32 ctl_stat;
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pointer = priv->tx_clean_pointer;
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txdes = &priv->descs->txdes[pointer];
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txdes = &priv->txdes[pointer];
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ctl_stat = le32_to_cpu(txdes->txdes0);
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if (ctl_stat & FTGMAC100_TXDES0_TXDMA_OWN)
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@ -566,7 +573,7 @@ static bool ftgmac100_tx_complete_packet(struct ftgmac100 *priv)
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ftgmac100_free_tx_packet(priv, pointer, skb, txdes, ctl_stat);
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txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask);
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priv->tx_clean_pointer = ftgmac100_next_tx_pointer(pointer);
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priv->tx_clean_pointer = ftgmac100_next_tx_pointer(priv, pointer);
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return true;
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}
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@ -655,7 +662,7 @@ static int ftgmac100_hard_start_xmit(struct sk_buff *skb,
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/* Grab the next free tx descriptor */
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pointer = priv->tx_pointer;
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txdes = first = &priv->descs->txdes[pointer];
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txdes = first = &priv->txdes[pointer];
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/* Setup it up with the packet head. Don't write the head to the
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* ring just yet
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@ -677,7 +684,7 @@ static int ftgmac100_hard_start_xmit(struct sk_buff *skb,
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txdes->txdes1 = cpu_to_le32(csum_vlan);
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/* Next descriptor */
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pointer = ftgmac100_next_tx_pointer(pointer);
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pointer = ftgmac100_next_tx_pointer(priv, pointer);
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/* Add the fragments */
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for (i = 0; i < nfrags; i++) {
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@ -693,7 +700,7 @@ static int ftgmac100_hard_start_xmit(struct sk_buff *skb,
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/* Setup descriptor */
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priv->tx_skbs[pointer] = skb;
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txdes = &priv->descs->txdes[pointer];
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txdes = &priv->txdes[pointer];
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ctl_stat = ftgmac100_base_tx_ctlstat(priv, pointer);
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ctl_stat |= FTGMAC100_TXDES0_TXDMA_OWN;
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ctl_stat |= FTGMAC100_TXDES0_TXBUF_SIZE(len);
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@ -704,7 +711,7 @@ static int ftgmac100_hard_start_xmit(struct sk_buff *skb,
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txdes->txdes3 = cpu_to_le32(map);
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/* Next one */
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pointer = ftgmac100_next_tx_pointer(pointer);
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pointer = ftgmac100_next_tx_pointer(priv, pointer);
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}
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/* Order the previous packet and descriptor udpates
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@ -744,8 +751,8 @@ static int ftgmac100_hard_start_xmit(struct sk_buff *skb,
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/* Then all fragments */
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for (j = 0; j < i; j++) {
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pointer = ftgmac100_next_tx_pointer(pointer);
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txdes = &priv->descs->txdes[pointer];
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pointer = ftgmac100_next_tx_pointer(priv, pointer);
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txdes = &priv->txdes[pointer];
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ctl_stat = le32_to_cpu(txdes->txdes0);
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ftgmac100_free_tx_packet(priv, pointer, skb, txdes, ctl_stat);
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txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask);
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@ -768,8 +775,8 @@ static void ftgmac100_free_buffers(struct ftgmac100 *priv)
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int i;
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/* Free all RX buffers */
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for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
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struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
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for (i = 0; i < priv->rx_q_entries; i++) {
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struct ftgmac100_rxdes *rxdes = &priv->rxdes[i];
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struct sk_buff *skb = priv->rx_skbs[i];
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dma_addr_t map = le32_to_cpu(rxdes->rxdes3);
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@ -782,8 +789,8 @@ static void ftgmac100_free_buffers(struct ftgmac100 *priv)
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}
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/* Free all TX buffers */
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for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
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struct ftgmac100_txdes *txdes = &priv->descs->txdes[i];
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for (i = 0; i < priv->tx_q_entries; i++) {
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struct ftgmac100_txdes *txdes = &priv->txdes[i];
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struct sk_buff *skb = priv->tx_skbs[i];
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if (!skb)
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@ -795,10 +802,22 @@ static void ftgmac100_free_buffers(struct ftgmac100 *priv)
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static void ftgmac100_free_rings(struct ftgmac100 *priv)
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{
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/* Free skb arrays */
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kfree(priv->rx_skbs);
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kfree(priv->tx_skbs);
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/* Free descriptors */
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if (priv->descs)
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dma_free_coherent(priv->dev, sizeof(struct ftgmac100_descs),
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priv->descs, priv->descs_dma_addr);
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if (priv->rxdes)
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dma_free_coherent(priv->dev, MAX_RX_QUEUE_ENTRIES *
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sizeof(struct ftgmac100_rxdes),
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priv->rxdes, priv->rxdes_dma);
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priv->rxdes = NULL;
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if (priv->txdes)
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dma_free_coherent(priv->dev, MAX_TX_QUEUE_ENTRIES *
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sizeof(struct ftgmac100_txdes),
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priv->txdes, priv->txdes_dma);
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priv->txdes = NULL;
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/* Free scratch packet buffer */
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if (priv->rx_scratch)
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@ -808,11 +827,28 @@ static void ftgmac100_free_rings(struct ftgmac100 *priv)
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static int ftgmac100_alloc_rings(struct ftgmac100 *priv)
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{
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/* Allocate skb arrays */
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priv->rx_skbs = kcalloc(MAX_RX_QUEUE_ENTRIES, sizeof(void *),
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GFP_KERNEL);
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if (!priv->rx_skbs)
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return -ENOMEM;
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priv->tx_skbs = kcalloc(MAX_TX_QUEUE_ENTRIES, sizeof(void *),
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GFP_KERNEL);
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if (!priv->tx_skbs)
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return -ENOMEM;
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/* Allocate descriptors */
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priv->descs = dma_zalloc_coherent(priv->dev,
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sizeof(struct ftgmac100_descs),
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&priv->descs_dma_addr, GFP_KERNEL);
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if (!priv->descs)
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priv->rxdes = dma_zalloc_coherent(priv->dev,
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MAX_RX_QUEUE_ENTRIES *
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sizeof(struct ftgmac100_rxdes),
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&priv->rxdes_dma, GFP_KERNEL);
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if (!priv->rxdes)
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return -ENOMEM;
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priv->txdes = dma_zalloc_coherent(priv->dev,
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MAX_TX_QUEUE_ENTRIES *
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sizeof(struct ftgmac100_txdes),
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&priv->txdes_dma, GFP_KERNEL);
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if (!priv->txdes)
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return -ENOMEM;
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/* Allocate scratch packet buffer */
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@ -828,22 +864,32 @@ static int ftgmac100_alloc_rings(struct ftgmac100 *priv)
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static void ftgmac100_init_rings(struct ftgmac100 *priv)
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{
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struct ftgmac100_rxdes *rxdes;
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struct ftgmac100_txdes *txdes;
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struct ftgmac100_rxdes *rxdes = NULL;
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struct ftgmac100_txdes *txdes = NULL;
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int i;
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/* Update entries counts */
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priv->rx_q_entries = priv->new_rx_q_entries;
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priv->tx_q_entries = priv->new_tx_q_entries;
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if (WARN_ON(priv->rx_q_entries < MIN_RX_QUEUE_ENTRIES))
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return;
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/* Initialize RX ring */
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for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
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rxdes = &priv->descs->rxdes[i];
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for (i = 0; i < priv->rx_q_entries; i++) {
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rxdes = &priv->rxdes[i];
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rxdes->rxdes0 = 0;
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rxdes->rxdes3 = cpu_to_le32(priv->rx_scratch_dma);
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}
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/* Mark the end of the ring */
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rxdes->rxdes0 |= cpu_to_le32(priv->rxdes0_edorr_mask);
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if (WARN_ON(priv->tx_q_entries < MIN_RX_QUEUE_ENTRIES))
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return;
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/* Initialize TX ring */
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for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
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txdes = &priv->descs->txdes[i];
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for (i = 0; i < priv->tx_q_entries; i++) {
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txdes = &priv->txdes[i];
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txdes->txdes0 = 0;
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}
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txdes->txdes0 |= cpu_to_le32(priv->txdes0_edotr_mask);
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@ -853,8 +899,8 @@ static int ftgmac100_alloc_rx_buffers(struct ftgmac100 *priv)
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{
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int i;
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for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
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struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
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for (i = 0; i < priv->rx_q_entries; i++) {
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struct ftgmac100_rxdes *rxdes = &priv->rxdes[i];
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if (ftgmac100_alloc_rx_buf(priv, i, rxdes, GFP_KERNEL))
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return -ENOMEM;
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@ -999,11 +1045,53 @@ static void ftgmac100_get_drvinfo(struct net_device *netdev,
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strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
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}
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static int ftgmac100_nway_reset(struct net_device *ndev)
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{
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if (!ndev->phydev)
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return -ENXIO;
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return phy_start_aneg(ndev->phydev);
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}
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static void ftgmac100_get_ringparam(struct net_device *netdev,
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struct ethtool_ringparam *ering)
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{
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struct ftgmac100 *priv = netdev_priv(netdev);
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memset(ering, 0, sizeof(*ering));
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ering->rx_max_pending = MAX_RX_QUEUE_ENTRIES;
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ering->tx_max_pending = MAX_TX_QUEUE_ENTRIES;
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ering->rx_pending = priv->rx_q_entries;
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ering->tx_pending = priv->tx_q_entries;
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}
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static int ftgmac100_set_ringparam(struct net_device *netdev,
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struct ethtool_ringparam *ering)
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{
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struct ftgmac100 *priv = netdev_priv(netdev);
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if (ering->rx_pending > MAX_RX_QUEUE_ENTRIES ||
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ering->tx_pending > MAX_TX_QUEUE_ENTRIES ||
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ering->rx_pending < MIN_RX_QUEUE_ENTRIES ||
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ering->tx_pending < MIN_TX_QUEUE_ENTRIES ||
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!is_power_of_2(ering->rx_pending) ||
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!is_power_of_2(ering->tx_pending))
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return -EINVAL;
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priv->new_rx_q_entries = ering->rx_pending;
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priv->new_tx_q_entries = ering->tx_pending;
|
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if (netif_running(netdev))
|
||||
schedule_work(&priv->reset_task);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct ethtool_ops ftgmac100_ethtool_ops = {
|
||||
.get_drvinfo = ftgmac100_get_drvinfo,
|
||||
.get_link = ethtool_op_get_link,
|
||||
.get_link_ksettings = phy_ethtool_get_link_ksettings,
|
||||
.set_link_ksettings = phy_ethtool_set_link_ksettings,
|
||||
.get_ringparam = ftgmac100_get_ringparam,
|
||||
.set_ringparam = ftgmac100_set_ringparam,
|
||||
};
|
||||
|
||||
static irqreturn_t ftgmac100_interrupt(int irq, void *dev_id)
|
||||
|
|
@ -1059,7 +1147,7 @@ static irqreturn_t ftgmac100_interrupt(int irq, void *dev_id)
|
|||
|
||||
static bool ftgmac100_check_rx(struct ftgmac100 *priv)
|
||||
{
|
||||
struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[priv->rx_pointer];
|
||||
struct ftgmac100_rxdes *rxdes = &priv->rxdes[priv->rx_pointer];
|
||||
|
||||
/* Do we have a packet ? */
|
||||
return !!(rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY));
|
||||
|
|
@ -1496,6 +1584,10 @@ static int ftgmac100_probe(struct platform_device *pdev)
|
|||
goto err_setup_mdio;
|
||||
}
|
||||
|
||||
/* Default ring sizes */
|
||||
priv->rx_q_entries = priv->new_rx_q_entries = DEF_RX_QUEUE_ENTRIES;
|
||||
priv->tx_q_entries = priv->new_tx_q_entries = DEF_TX_QUEUE_ENTRIES;
|
||||
|
||||
/* Base feature set */
|
||||
netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_HW_CSUM |
|
||||
NETIF_F_GRO | NETIF_F_SG;
|
||||
|
|
|
|||
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