powerpc fixes for 4.7
- Handle RTAS delay requests in configure_bridge from Russell Currey - Refactor the configure_bridge RTAS tokens from Russell Currey - Fix definition of SIAR and SDAR registers from Thomas Huth - Use privileged SPR number for MMCR2 from Thomas Huth - Update LPCR only if it is powernv from Aneesh Kumar K.V - Fix the reference bit update when handling hash fault from Aneesh Kumar K.V - Add missing tlb flush from Aneesh Kumar K.V - Add POWER8NVL support to ibm,client-architecture-support call from Thomas Huth -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXUWmzAAoJEFHr6jzI4aWAuEAQAKAWjT4JCIQMzc2Qk0LbBFhD Mw3xIt618g0PLRLN431rqk9xE1phh9ecSNt40kQV0UYypCwQyYaOzAAHq7QibRFh wFDLyrO10aiqTVBI9Dl7l6ZDespGP4ufOyj4GF3vIndTQ8CLT6+Jj/cfaT8lNIna vOp0Q8RKoSuqJu7wOZwxGHc9vhdpDftBOi2Yl2KHWrWUMTVtyDzgRwmFiCk/9SvX +xYVGfbCRkU1b05X9RgbsbMdiAzC7odzAC8e4VNHqB+YHgBFenlOKcx6uuz5Oubv /0dGJq1OEKxKgkEWZsXMhfcezI1i6H1qa5gwqO2pJn/mQiWUx/IxxC5j1tGMcgXJ tU4cJtMccUmB22bOTqJsGhQJyHh09UDql2PIAHdvTZplYBj34R+2fr6LMRC5TUyY yXsk/26CAh1ihPK8juytK8D2f7CfFJVe96HXMz8yGWNy2MeaJHh3Nz7E2/hA6L6B GzT08EBGmGU/1/L4xJi1uuRLQXMgvWkuo0C65m9jqFah7y82gHetypTBSbLOBcUX +pJRcWouZlksbEHydMlbvNrqmJz1zPx9JJFJJrfDzkYUB/O61NxOpaQPZHfhMt01 Bd8n0wt7OPW9bZL9WrW5W11OhOxNZfuxcr5GmVnzsaALPazFThQm1gZH2NOp6Wr/ 9aWy/lZAuDOrtOnmfcZm =OkUs -----END PGP SIGNATURE----- Merge tag 'powerpc-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: - Handle RTAS delay requests in configure_bridge from Russell Currey - Refactor the configure_bridge RTAS tokens from Russell Currey - Fix definition of SIAR and SDAR registers from Thomas Huth - Use privileged SPR number for MMCR2 from Thomas Huth - Update LPCR only if it is powernv from Aneesh Kumar K.V - Fix the reference bit update when handling hash fault from Aneesh Kumar K.V - Add missing tlb flush from Aneesh Kumar K.V - Add POWER8NVL support to ibm,client-architecture-support call from Thomas Huth * tag 'powerpc-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/pseries: Add POWER8NVL support to ibm,client-architecture-support call powerpc/mm/radix: Add missing tlb flush powerpc/mm/hash: Fix the reference bit update when handling hash fault powerpc/mm/radix: Update LPCR only if it is powernv powerpc: Use privileged SPR number for MMCR2 powerpc: Fix definition of SIAR and SDAR registers powerpc/pseries/eeh: Refactor the configure_bridge RTAS tokens powerpc/pseries/eeh: Handle RTAS delay requests in configure_bridge
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Коммит
5306d766f1
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@ -717,7 +717,7 @@
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#define MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */
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#define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */
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#define SPRN_MMCR1 798
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#define SPRN_MMCR2 769
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#define SPRN_MMCR2 785
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#define SPRN_MMCRA 0x312
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#define MMCRA_SDSYNC 0x80000000UL /* SDAR synced with SIAR */
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#define MMCRA_SDAR_DCACHE_MISS 0x40000000UL
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@ -754,13 +754,13 @@
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#define SPRN_PMC6 792
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#define SPRN_PMC7 793
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#define SPRN_PMC8 794
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#define SPRN_SIAR 780
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#define SPRN_SDAR 781
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#define SPRN_SIER 784
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#define SIER_SIPR 0x2000000 /* Sampled MSR_PR */
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#define SIER_SIHV 0x1000000 /* Sampled MSR_HV */
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#define SIER_SIAR_VALID 0x0400000 /* SIAR contents valid */
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#define SIER_SDAR_VALID 0x0200000 /* SDAR contents valid */
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#define SPRN_SIAR 796
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#define SPRN_SDAR 797
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#define SPRN_TACR 888
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#define SPRN_TCSCR 889
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#define SPRN_CSIGR 890
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@ -656,6 +656,7 @@ unsigned char ibm_architecture_vec[] = {
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W(0xffff0000), W(0x003e0000), /* POWER6 */
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W(0xffff0000), W(0x003f0000), /* POWER7 */
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W(0xffff0000), W(0x004b0000), /* POWER8E */
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W(0xffff0000), W(0x004c0000), /* POWER8NVL */
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W(0xffff0000), W(0x004d0000), /* POWER8 */
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W(0xffffffff), W(0x0f000004), /* all 2.07-compliant */
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W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */
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@ -159,6 +159,19 @@ static struct mmu_psize_def mmu_psize_defaults_gp[] = {
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},
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};
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/*
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* 'R' and 'C' update notes:
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* - Under pHyp or KVM, the updatepp path will not set C, thus it *will*
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* create writeable HPTEs without C set, because the hcall H_PROTECT
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* that we use in that case will not update C
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* - The above is however not a problem, because we also don't do that
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* fancy "no flush" variant of eviction and we use H_REMOVE which will
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* do the right thing and thus we don't have the race I described earlier
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*
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* - Under bare metal, we do have the race, so we need R and C set
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* - We make sure R is always set and never lost
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* - C is _PAGE_DIRTY, and *should* always be set for a writeable mapping
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*/
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unsigned long htab_convert_pte_flags(unsigned long pteflags)
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{
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unsigned long rflags = 0;
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@ -186,9 +199,14 @@ unsigned long htab_convert_pte_flags(unsigned long pteflags)
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rflags |= 0x1;
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}
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/*
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* Always add "C" bit for perf. Memory coherence is always enabled
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* We can't allow hardware to update hpte bits. Hence always
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* set 'R' bit and set 'C' if it is a write fault
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* Memory coherence is always enabled
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*/
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rflags |= HPTE_R_C | HPTE_R_M;
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rflags |= HPTE_R_R | HPTE_R_M;
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if (pteflags & _PAGE_DIRTY)
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rflags |= HPTE_R_C;
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/*
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* Add in WIG bits
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*/
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@ -33,10 +33,7 @@ int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
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changed = !pmd_same(*(pmdp), entry);
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if (changed) {
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__ptep_set_access_flags(pmdp_ptep(pmdp), pmd_pte(entry));
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/*
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* Since we are not supporting SW TLB systems, we don't
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* have any thing similar to flush_tlb_page_nohash()
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*/
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flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
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}
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return changed;
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}
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@ -296,11 +296,6 @@ found:
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void __init radix__early_init_mmu(void)
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{
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unsigned long lpcr;
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/*
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* setup LPCR UPRT based on mmu_features
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*/
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lpcr = mfspr(SPRN_LPCR);
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mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
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#ifdef CONFIG_PPC_64K_PAGES
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/* PAGE_SIZE mappings */
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@ -343,8 +338,11 @@ void __init radix__early_init_mmu(void)
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__pte_frag_size_shift = H_PTE_FRAG_SIZE_SHIFT;
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radix_init_page_sizes();
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if (!firmware_has_feature(FW_FEATURE_LPAR))
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if (!firmware_has_feature(FW_FEATURE_LPAR)) {
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lpcr = mfspr(SPRN_LPCR);
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mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
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radix_init_partition_table();
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}
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radix_init_pgtable();
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}
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@ -353,16 +351,15 @@ void radix__early_init_mmu_secondary(void)
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{
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unsigned long lpcr;
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/*
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* setup LPCR UPRT based on mmu_features
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* update partition table control register and UPRT
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*/
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lpcr = mfspr(SPRN_LPCR);
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mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
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/*
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* update partition table control register, 64 K size.
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*/
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if (!firmware_has_feature(FW_FEATURE_LPAR))
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if (!firmware_has_feature(FW_FEATURE_LPAR)) {
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lpcr = mfspr(SPRN_LPCR);
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mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
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mtspr(SPRN_PTCR,
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__pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
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}
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}
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void radix__setup_initial_memory_limit(phys_addr_t first_memblock_base,
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@ -53,7 +53,6 @@ static int ibm_read_slot_reset_state2;
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static int ibm_slot_error_detail;
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static int ibm_get_config_addr_info;
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static int ibm_get_config_addr_info2;
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static int ibm_configure_bridge;
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static int ibm_configure_pe;
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/*
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@ -81,7 +80,14 @@ static int pseries_eeh_init(void)
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ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
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ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
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ibm_configure_pe = rtas_token("ibm,configure-pe");
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ibm_configure_bridge = rtas_token("ibm,configure-bridge");
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/*
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* ibm,configure-pe and ibm,configure-bridge have the same semantics,
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* however ibm,configure-pe can be faster. If we can't find
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* ibm,configure-pe then fall back to using ibm,configure-bridge.
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*/
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if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE)
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ibm_configure_pe = rtas_token("ibm,configure-bridge");
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/*
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* Necessary sanity check. We needn't check "get-config-addr-info"
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@ -93,8 +99,7 @@ static int pseries_eeh_init(void)
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(ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
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ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) ||
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ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE ||
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(ibm_configure_pe == RTAS_UNKNOWN_SERVICE &&
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ibm_configure_bridge == RTAS_UNKNOWN_SERVICE)) {
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ibm_configure_pe == RTAS_UNKNOWN_SERVICE) {
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pr_info("EEH functionality not supported\n");
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return -EINVAL;
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}
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@ -615,29 +620,41 @@ static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
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{
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int config_addr;
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int ret;
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/* Waiting 0.2s maximum before skipping configuration */
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int max_wait = 200;
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/* Figure out the PE address */
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config_addr = pe->config_addr;
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if (pe->addr)
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config_addr = pe->addr;
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/* Use new configure-pe function, if supported */
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if (ibm_configure_pe != RTAS_UNKNOWN_SERVICE) {
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while (max_wait > 0) {
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ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
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config_addr, BUID_HI(pe->phb->buid),
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BUID_LO(pe->phb->buid));
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} else if (ibm_configure_bridge != RTAS_UNKNOWN_SERVICE) {
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ret = rtas_call(ibm_configure_bridge, 3, 1, NULL,
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config_addr, BUID_HI(pe->phb->buid),
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BUID_LO(pe->phb->buid));
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} else {
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return -EFAULT;
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if (!ret)
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return ret;
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/*
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* If RTAS returns a delay value that's above 100ms, cut it
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* down to 100ms in case firmware made a mistake. For more
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* on how these delay values work see rtas_busy_delay_time
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*/
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if (ret > RTAS_EXTENDED_DELAY_MIN+2 &&
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ret <= RTAS_EXTENDED_DELAY_MAX)
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ret = RTAS_EXTENDED_DELAY_MIN+2;
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max_wait -= rtas_busy_delay_time(ret);
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if (max_wait < 0)
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break;
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rtas_busy_delay(ret);
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}
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if (ret)
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pr_warn("%s: Unable to configure bridge PHB#%d-PE#%x (%d)\n",
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__func__, pe->phb->global_number, pe->addr, ret);
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pr_warn("%s: Unable to configure bridge PHB#%d-PE#%x (%d)\n",
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__func__, pe->phb->global_number, pe->addr, ret);
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return ret;
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}
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