ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros
Resource size required mostly is 4K for all devices, whereas currently reserved space is much beyond that. This patch replaces SIZE macro's used at multiple places with SZ_4K. Reviewed-by: Stanley Miao <stanley.miao@windriver.com> Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Родитель
c2c07831a7
Коммит
53821162fc
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@ -437,7 +437,7 @@ struct amba_device gpio1_device = {
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},
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},
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.res = {
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.res = {
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.start = SPEAR300_GPIO_BASE,
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.start = SPEAR300_GPIO_BASE,
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.end = SPEAR300_GPIO_BASE + SPEAR300_GPIO_SIZE - 1,
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.end = SPEAR300_GPIO_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_MEM,
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},
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},
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.irq = {VIRQ_GPIO1, NO_IRQ},
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.irq = {VIRQ_GPIO1, NO_IRQ},
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@ -452,8 +452,7 @@ void __init spear300_init(void)
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spear3xx_init();
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spear3xx_init();
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/* shared irq registration */
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/* shared irq registration */
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shirq_ras1.regs.base =
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shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K);
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ioremap(SPEAR300_TELECOM_BASE, SPEAR300_TELECOM_REG_SIZE);
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if (shirq_ras1.regs.base) {
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if (shirq_ras1.regs.base) {
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ret = spear_shirq_register(&shirq_ras1);
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ret = spear_shirq_register(&shirq_ras1);
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if (ret)
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if (ret)
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@ -461,8 +460,7 @@ void __init spear300_init(void)
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}
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}
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/* pmx initialization */
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/* pmx initialization */
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pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE,
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pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);
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SPEAR300_SOC_CONFIG_SIZE);
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if (pmx_driver.base) {
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if (pmx_driver.base) {
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ret = pmx_register(&pmx_driver);
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ret = pmx_register(&pmx_driver);
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if (ret)
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if (ret)
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@ -267,7 +267,7 @@ void __init spear310_init(void)
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spear3xx_init();
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spear3xx_init();
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/* shared irq registration */
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/* shared irq registration */
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base = ioremap(SPEAR310_SOC_CONFIG_BASE, SPEAR310_SOC_CONFIG_SIZE);
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base = ioremap(SPEAR310_SOC_CONFIG_BASE, SZ_4K);
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if (base) {
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if (base) {
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/* shirq 1 */
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/* shirq 1 */
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shirq_ras1.regs.base = base;
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shirq_ras1.regs.base = base;
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@ -520,7 +520,7 @@ void __init spear320_init(void)
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spear3xx_init();
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spear3xx_init();
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/* shared irq registration */
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/* shared irq registration */
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base = ioremap(SPEAR320_SOC_CONFIG_BASE, SPEAR320_SOC_CONFIG_SIZE);
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base = ioremap(SPEAR320_SOC_CONFIG_BASE, SZ_4K);
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if (base) {
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if (base) {
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/* shirq 1 */
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/* shirq 1 */
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shirq_ras1.regs.base = base;
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shirq_ras1.regs.base = base;
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@ -35,7 +35,7 @@ struct amba_device gpio_device = {
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},
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},
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.res = {
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.res = {
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.start = SPEAR3XX_ICM3_GPIO_BASE,
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.start = SPEAR3XX_ICM3_GPIO_BASE,
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.end = SPEAR3XX_ICM3_GPIO_BASE + SPEAR3XX_ICM3_GPIO_SIZE - 1,
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.end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_MEM,
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},
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},
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.irq = {IRQ_BASIC_GPIO, NO_IRQ},
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.irq = {IRQ_BASIC_GPIO, NO_IRQ},
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@ -48,7 +48,7 @@ struct amba_device uart_device = {
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},
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},
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.res = {
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.res = {
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.start = SPEAR3XX_ICM1_UART_BASE,
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.start = SPEAR3XX_ICM1_UART_BASE,
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.end = SPEAR3XX_ICM1_UART_BASE + SPEAR3XX_ICM1_UART_SIZE - 1,
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.end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_MEM,
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},
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},
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.irq = {IRQ_UART, NO_IRQ},
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.irq = {IRQ_UART, NO_IRQ},
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@ -71,22 +71,22 @@ struct map_desc spear3xx_io_desc[] __initdata = {
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{
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{
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.virtual = VA_SPEAR3XX_ICM1_UART_BASE,
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.virtual = VA_SPEAR3XX_ICM1_UART_BASE,
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.pfn = __phys_to_pfn(SPEAR3XX_ICM1_UART_BASE),
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.pfn = __phys_to_pfn(SPEAR3XX_ICM1_UART_BASE),
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.length = SPEAR3XX_ICM1_UART_SIZE,
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.length = SZ_4K,
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.type = MT_DEVICE
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.type = MT_DEVICE
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}, {
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}, {
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.virtual = VA_SPEAR3XX_ML1_VIC_BASE,
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.virtual = VA_SPEAR3XX_ML1_VIC_BASE,
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.pfn = __phys_to_pfn(SPEAR3XX_ML1_VIC_BASE),
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.pfn = __phys_to_pfn(SPEAR3XX_ML1_VIC_BASE),
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.length = SPEAR3XX_ML1_VIC_SIZE,
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.length = SZ_4K,
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.type = MT_DEVICE
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.type = MT_DEVICE
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}, {
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}, {
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.virtual = VA_SPEAR3XX_ICM3_SYS_CTRL_BASE,
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.virtual = VA_SPEAR3XX_ICM3_SYS_CTRL_BASE,
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.pfn = __phys_to_pfn(SPEAR3XX_ICM3_SYS_CTRL_BASE),
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.pfn = __phys_to_pfn(SPEAR3XX_ICM3_SYS_CTRL_BASE),
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.length = SPEAR3XX_ICM3_SYS_CTRL_SIZE,
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.length = SZ_4K,
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.type = MT_DEVICE
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.type = MT_DEVICE
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}, {
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}, {
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.virtual = VA_SPEAR3XX_ICM3_MISC_REG_BASE,
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.virtual = VA_SPEAR3XX_ICM3_MISC_REG_BASE,
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.pfn = __phys_to_pfn(SPEAR3XX_ICM3_MISC_REG_BASE),
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.pfn = __phys_to_pfn(SPEAR3XX_ICM3_MISC_REG_BASE),
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.length = SPEAR3XX_ICM3_MISC_REG_SIZE,
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.length = SZ_4K,
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.type = MT_DEVICE
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.type = MT_DEVICE
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},
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},
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};
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};
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@ -31,8 +31,7 @@ struct amba_device uart_device[] = {
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},
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},
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.res = {
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.res = {
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.start = SPEAR6XX_ICM1_UART0_BASE,
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.start = SPEAR6XX_ICM1_UART0_BASE,
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.end = SPEAR6XX_ICM1_UART0_BASE +
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.end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
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SPEAR6XX_ICM1_UART0_SIZE - 1,
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_MEM,
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},
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},
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.irq = {IRQ_UART_0, NO_IRQ},
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.irq = {IRQ_UART_0, NO_IRQ},
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@ -42,8 +41,7 @@ struct amba_device uart_device[] = {
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},
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},
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.res = {
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.res = {
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.start = SPEAR6XX_ICM1_UART1_BASE,
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.start = SPEAR6XX_ICM1_UART1_BASE,
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.end = SPEAR6XX_ICM1_UART1_BASE +
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.end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
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SPEAR6XX_ICM1_UART1_SIZE - 1,
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_MEM,
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},
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},
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.irq = {IRQ_UART_1, NO_IRQ},
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.irq = {IRQ_UART_1, NO_IRQ},
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@ -72,8 +70,7 @@ struct amba_device gpio_device[] = {
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},
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},
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.res = {
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.res = {
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.start = SPEAR6XX_CPU_GPIO_BASE,
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.start = SPEAR6XX_CPU_GPIO_BASE,
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.end = SPEAR6XX_CPU_GPIO_BASE +
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.end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
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SPEAR6XX_CPU_GPIO_SIZE - 1,
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_MEM,
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},
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},
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.irq = {IRQ_LOCAL_GPIO, NO_IRQ},
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.irq = {IRQ_LOCAL_GPIO, NO_IRQ},
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@ -84,8 +81,7 @@ struct amba_device gpio_device[] = {
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},
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},
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.res = {
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.res = {
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.start = SPEAR6XX_ICM3_GPIO_BASE,
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.start = SPEAR6XX_ICM3_GPIO_BASE,
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.end = SPEAR6XX_ICM3_GPIO_BASE +
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.end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
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SPEAR6XX_ICM3_GPIO_SIZE - 1,
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_MEM,
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},
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},
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.irq = {IRQ_BASIC_GPIO, NO_IRQ},
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.irq = {IRQ_BASIC_GPIO, NO_IRQ},
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@ -96,8 +92,7 @@ struct amba_device gpio_device[] = {
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},
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},
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.res = {
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.res = {
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.start = SPEAR6XX_ICM2_GPIO_BASE,
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.start = SPEAR6XX_ICM2_GPIO_BASE,
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.end = SPEAR6XX_ICM2_GPIO_BASE +
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.end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
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SPEAR6XX_ICM2_GPIO_SIZE - 1,
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_MEM,
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},
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},
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.irq = {IRQ_APPL_GPIO, NO_IRQ},
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.irq = {IRQ_APPL_GPIO, NO_IRQ},
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@ -122,27 +117,27 @@ static struct map_desc spear6xx_io_desc[] __initdata = {
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{
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{
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.virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
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.virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
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.pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
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.length = SPEAR6XX_ICM1_UART0_SIZE,
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.length = SZ_4K,
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.type = MT_DEVICE
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.type = MT_DEVICE
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}, {
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}, {
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.virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
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.virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
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.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
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.length = SPEAR6XX_CPU_VIC_PRI_SIZE,
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.length = SZ_4K,
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.type = MT_DEVICE
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.type = MT_DEVICE
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}, {
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}, {
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.virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
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.virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
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.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
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.length = SPEAR6XX_CPU_VIC_SEC_SIZE,
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.length = SZ_4K,
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.type = MT_DEVICE
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.type = MT_DEVICE
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}, {
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}, {
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.virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
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.virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
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.pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
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.length = SPEAR6XX_ICM3_MISC_REG_BASE,
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.length = SZ_4K,
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.type = MT_DEVICE
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.type = MT_DEVICE
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}, {
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}, {
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.virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
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.virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
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.pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
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.length = SPEAR6XX_ICM3_MISC_REG_SIZE,
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.length = SZ_4K,
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.type = MT_DEVICE
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.type = MT_DEVICE
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},
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},
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};
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};
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