EDAC, AMD: decode FR MCEs
See Fam10h BKDG (31116, rev. 3.28), Table 101. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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@ -321,6 +321,15 @@ void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
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}
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EXPORT_SYMBOL_GPL(amd_decode_nb_mce);
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static void amd_decode_fr_mce(u64 mc5_status)
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{
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/* we have only one error signature so match all fields at once. */
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if ((mc5_status & 0xffff) == 0x0f0f)
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pr_emerg(" FR Error: CPU Watchdog timer expire.\n");
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else
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pr_warning("Corrupted FR MCE info?\n");
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}
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static inline void amd_decode_err_code(unsigned int ec)
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{
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if (TLB_ERROR(ec)) {
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@ -401,6 +410,10 @@ void decode_mce(struct mce *m)
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amd_decode_nb_mce(node, ®s, 1);
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break;
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case 5:
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amd_decode_fr_mce(m->status);
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break;
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default:
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break;
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}
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