USB: EHCI whitespace fixes (cosmetic)
[ ... when you have an editor set to remind you of whitespace bugs ... ] Cosmetic EHCI changes: remove end-of-line whitespace, spaces before tabs. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
David Brownell
Greg Kroah-Hartman
Родитель
729ed6d502
Коммит
53bd6a601a
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2001-2002 by David Brownell
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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@ -65,7 +65,7 @@ static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
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for (i = 0; i < HCS_N_PORTS (params); i++) {
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// FIXME MIPS won't readb() ...
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byte = readb (&ehci->caps->portroute[(i>>1)]);
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sprintf(tmp, "%d ",
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sprintf(tmp, "%d ",
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((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
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strcat(buf, tmp);
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}
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@ -141,12 +141,12 @@ dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
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}
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static void __attribute__((__unused__))
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dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
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dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
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{
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ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
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label, itd->frame, itd, le32_to_cpu(itd->hw_next), itd->urb);
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ehci_dbg (ehci,
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" trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
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" trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
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le32_to_cpu(itd->hw_transaction[0]),
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le32_to_cpu(itd->hw_transaction[1]),
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le32_to_cpu(itd->hw_transaction[2]),
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@ -156,7 +156,7 @@ dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
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le32_to_cpu(itd->hw_transaction[6]),
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le32_to_cpu(itd->hw_transaction[7]));
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ehci_dbg (ehci,
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" buf: %08x %08x %08x %08x %08x %08x %08x\n",
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" buf: %08x %08x %08x %08x %08x %08x %08x\n",
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le32_to_cpu(itd->hw_bufp[0]),
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le32_to_cpu(itd->hw_bufp[1]),
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le32_to_cpu(itd->hw_bufp[2]),
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@ -171,12 +171,12 @@ dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
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}
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static void __attribute__((__unused__))
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dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
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dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
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{
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ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
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label, sitd->frame, sitd, le32_to_cpu(sitd->hw_next), sitd->urb);
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ehci_dbg (ehci,
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" addr %08x sched %04x result %08x buf %08x %08x\n",
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" addr %08x sched %04x result %08x buf %08x %08x\n",
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le32_to_cpu(sitd->hw_fullspeed_ep),
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le32_to_cpu(sitd->hw_uframe),
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le32_to_cpu(sitd->hw_results),
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2000-2004 by David Brownell
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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@ -70,7 +70,7 @@
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* 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
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* only scheduling is different, no arbitrary limitations.
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* 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
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* clean up HC run state handshaking.
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* clean up HC run state handshaking.
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* 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
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* 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
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* missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
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@ -425,7 +425,7 @@ static int ehci_init(struct usb_hcd *hcd)
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/* controllers may cache some of the periodic schedule ... */
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hcc_params = readl(&ehci->caps->hcc_params);
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if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
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if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
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ehci->i_thresh = 8;
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else // N microframes cached
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ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
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@ -1,6 +1,6 @@
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/*
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* Copyright (C) 2001-2004 by David Brownell
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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@ -103,10 +103,10 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
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/* re-init operational registers in case we lost power */
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if (readl (&ehci->regs->intr_enable) == 0) {
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/* at least some APM implementations will try to deliver
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/* at least some APM implementations will try to deliver
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* IRQs right away, so delay them until we're ready.
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*/
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intr_enable = 1;
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*/
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intr_enable = 1;
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writel (0, &ehci->regs->segment);
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writel (ehci->periodic_dma, &ehci->regs->frame_list);
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writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next);
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@ -232,7 +232,7 @@ ehci_hub_status_data (struct usb_hcd *hcd, char *buf)
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buf [1] = 0;
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retval++;
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}
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/* no hub change reports (bit 0) for now (power, ...) */
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/* port N changes (bit N)? */
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@ -304,7 +304,7 @@ ehci_hub_descriptor (
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/*-------------------------------------------------------------------------*/
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#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
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#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
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static int ehci_hub_control (
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struct usb_hcd *hcd,
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2001 by David Brownell
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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@ -25,7 +25,7 @@
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* - data used only by the HCD ... kmalloc is fine
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* - async and periodic schedules, shared by HC and HCD ... these
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* need to use dma_pool or dma_alloc_coherent
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* - driver buffers, read/written by HC ... single shot DMA mapped
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* - driver buffers, read/written by HC ... single shot DMA mapped
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*
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* There's also PCI "register" data, which is memory mapped.
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* No memory seen by this driver is pageable.
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@ -119,7 +119,7 @@ static inline void qh_put (struct ehci_qh *qh)
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/*-------------------------------------------------------------------------*/
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/* The queue heads and transfer descriptors are managed from pools tied
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/* The queue heads and transfer descriptors are managed from pools tied
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* to each of the "per device" structures.
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* This is the initialisation and cleanup code.
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*/
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@ -165,7 +165,7 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
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int i;
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/* QTDs for control/bulk/intr transfers */
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ehci->qtd_pool = dma_pool_create ("ehci_qtd",
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ehci->qtd_pool = dma_pool_create ("ehci_qtd",
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ehci_to_hcd(ehci)->self.controller,
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sizeof (struct ehci_qtd),
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32 /* byte alignment (for hw parts) */,
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@ -175,7 +175,7 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
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}
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/* QHs for control/bulk/intr transfers */
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ehci->qh_pool = dma_pool_create ("ehci_qh",
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ehci->qh_pool = dma_pool_create ("ehci_qh",
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ehci_to_hcd(ehci)->self.controller,
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sizeof (struct ehci_qh),
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32 /* byte alignment (for hw parts) */,
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@ -189,7 +189,7 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
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}
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/* ITD for high speed ISO transfers */
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ehci->itd_pool = dma_pool_create ("ehci_itd",
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ehci->itd_pool = dma_pool_create ("ehci_itd",
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ehci_to_hcd(ehci)->self.controller,
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sizeof (struct ehci_itd),
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32 /* byte alignment (for hw parts) */,
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@ -199,7 +199,7 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
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}
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/* SITD for full/low speed split ISO transfers */
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ehci->sitd_pool = dma_pool_create ("ehci_sitd",
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ehci->sitd_pool = dma_pool_create ("ehci_sitd",
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ehci_to_hcd(ehci)->self.controller,
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sizeof (struct ehci_sitd),
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32 /* byte alignment (for hw parts) */,
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@ -1,6 +1,6 @@
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/*
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* Copyright (C) 2001-2004 by David Brownell
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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@ -31,7 +31,7 @@
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* ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
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* interrupts) needs careful scheduling. Performance improvements can be
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* an ongoing challenge. That's in "ehci-sched.c".
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*
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*
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* USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
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* or otherwise through transaction translators (TTs) in USB 2.0 hubs using
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* (b) special fields in qh entries or (c) split iso entries. TTs will
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@ -199,7 +199,7 @@ static void qtd_copy_status (
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&& ((token & QTD_STS_MMF) != 0
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|| QTD_CERR(token) == 0)
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&& (!ehci_is_TDI(ehci)
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|| urb->dev->tt->hub !=
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|| urb->dev->tt->hub !=
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ehci_to_hcd(ehci)->self.root_hub)) {
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#ifdef DEBUG
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struct usb_device *tt = urb->dev->tt->hub;
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@ -364,7 +364,7 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh, struct pt_regs *regs)
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*/
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if (likely (urb->status == -EINPROGRESS))
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continue;
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/* issue status after short control reads */
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if (unlikely (do_status != 0)
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&& QTD_PID (token) == 0 /* OUT */) {
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@ -388,7 +388,7 @@ halt:
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wmb ();
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}
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}
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/* remove it from the queue */
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spin_lock (&urb->lock);
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qtd_copy_status (ehci, urb, qtd->length, token);
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@ -518,7 +518,7 @@ qh_urb_transaction (
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/* for zero length DATA stages, STATUS is always IN */
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if (len == 0)
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token |= (1 /* "in" */ << 8);
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}
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}
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/*
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* data transfer stage: buffer setup
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@ -759,7 +759,7 @@ qh_make (
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}
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break;
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default:
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dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
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dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
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done:
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qh_put (qh);
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return NULL;
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@ -972,7 +972,7 @@ static void end_unlink_async (struct ehci_hcd *ehci, struct pt_regs *regs)
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// qh->hw_next = cpu_to_le32 (qh->qh_dma);
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qh->qh_state = QH_STATE_IDLE;
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qh->qh_next.qh = NULL;
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qh_put (qh); // refcount from reclaim
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qh_put (qh); // refcount from reclaim
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/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
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next = qh->reclaim;
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@ -1031,7 +1031,7 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
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timer_action_done (ehci, TIMER_ASYNC_OFF);
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}
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return;
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}
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}
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qh->qh_state = QH_STATE_UNLINK;
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ehci->reclaim = qh = qh_get (qh);
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@ -1046,7 +1046,7 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
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if (unlikely (ehci_to_hcd(ehci)->state == HC_STATE_HALT)) {
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/* if (unlikely (qh->reclaim != 0))
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* this will recurse, probably not much
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* this will recurse, probably not much
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*/
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end_unlink_async (ehci, NULL);
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return;
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@ -1,7 +1,7 @@
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/*
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* Copyright (c) 2001-2004 by David Brownell
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* Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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@ -613,7 +613,7 @@ static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
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/*-------------------------------------------------------------------------*/
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static int check_period (
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struct ehci_hcd *ehci,
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struct ehci_hcd *ehci,
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unsigned frame,
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unsigned uframe,
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unsigned period,
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@ -629,7 +629,7 @@ static int check_period (
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/*
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* 80% periodic == 100 usec/uframe available
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* convert "usecs we need" to "max already claimed"
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* convert "usecs we need" to "max already claimed"
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*/
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usecs = 100 - usecs;
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@ -659,14 +659,14 @@ static int check_period (
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}
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static int check_intr_schedule (
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struct ehci_hcd *ehci,
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struct ehci_hcd *ehci,
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unsigned frame,
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unsigned uframe,
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const struct ehci_qh *qh,
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__le32 *c_maskp
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)
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{
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int retval = -ENOSPC;
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int retval = -ENOSPC;
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u8 mask = 0;
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if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
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@ -701,7 +701,7 @@ static int check_intr_schedule (
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/* Make sure this tt's buffer is also available for CSPLITs.
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* We pessimize a bit; probably the typical full speed case
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* doesn't need the second CSPLIT.
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*
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*
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* NOTE: both SPLIT and CSPLIT could be checked in just
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* one smart pass...
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*/
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@ -728,7 +728,7 @@ done:
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*/
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static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
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{
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int status;
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int status;
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unsigned uframe;
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__le32 c_mask;
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unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
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@ -784,7 +784,7 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
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ehci_dbg (ehci, "reused qh %p schedule\n", qh);
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/* stuff into the periodic schedule */
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status = qh_link_periodic (ehci, qh);
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status = qh_link_periodic (ehci, qh);
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done:
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return status;
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}
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@ -1681,7 +1681,7 @@ static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
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status = -ESHUTDOWN;
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else
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status = iso_stream_schedule (ehci, urb, stream);
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if (likely (status == 0))
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if (likely (status == 0))
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itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
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spin_unlock_irqrestore (&ehci->lock, flags);
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@ -1738,7 +1738,7 @@ sitd_sched_init (
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if (packet->buf1 != (buf & ~(u64)0x0fff))
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packet->cross = 1;
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/* OUT uses multiple start-splits */
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/* OUT uses multiple start-splits */
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if (stream->bEndpointAddress & USB_DIR_IN)
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continue;
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length = (length + 187) / 188;
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@ -1925,7 +1925,7 @@ sitd_link_urb (
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/*-------------------------------------------------------------------------*/
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#define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
|
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| SITD_STS_XACT | SITD_STS_MMF)
|
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| SITD_STS_XACT | SITD_STS_MMF)
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static unsigned
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sitd_complete (
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@ -2043,7 +2043,7 @@ static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
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status = -ESHUTDOWN;
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else
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status = iso_stream_schedule (ehci, urb, stream);
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if (status == 0)
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if (status == 0)
|
||||
sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
|
||||
spin_unlock_irqrestore (&ehci->lock, flags);
|
||||
|
||||
|
|
@ -2226,5 +2226,5 @@ restart:
|
|||
now_uframe++;
|
||||
now_uframe %= mod;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2001-2002 by David Brownell
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
|
|
@ -103,7 +103,7 @@ struct ehci_hcd { /* one per controller */
|
|||
#endif
|
||||
};
|
||||
|
||||
/* convert between an HCD pointer and the corresponding EHCI_HCD */
|
||||
/* convert between an HCD pointer and the corresponding EHCI_HCD */
|
||||
static inline struct ehci_hcd *hcd_to_ehci (struct usb_hcd *hcd)
|
||||
{
|
||||
return (struct ehci_hcd *) (hcd->hcd_priv);
|
||||
|
|
@ -178,8 +178,8 @@ struct ehci_caps {
|
|||
#define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
|
||||
#define HCS_N_CC(p) (((p)>>12)&0xf) /* bits 15:12, #companion HCs */
|
||||
#define HCS_N_PCC(p) (((p)>>8)&0xf) /* bits 11:8, ports per CC */
|
||||
#define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */
|
||||
#define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
|
||||
#define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */
|
||||
#define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
|
||||
#define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
|
||||
|
||||
u32 hcc_params; /* HCCPARAMS - offset 0x8 */
|
||||
|
|
@ -204,7 +204,7 @@ struct ehci_regs {
|
|||
#define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
|
||||
#define CMD_IAAD (1<<6) /* "doorbell" interrupt async advance */
|
||||
#define CMD_ASE (1<<5) /* async schedule enable */
|
||||
#define CMD_PSE (1<<4) /* periodic schedule enable */
|
||||
#define CMD_PSE (1<<4) /* periodic schedule enable */
|
||||
/* 3:2 is periodic frame list size */
|
||||
#define CMD_RESET (1<<1) /* reset HC not bus */
|
||||
#define CMD_RUN (1<<0) /* start/stop HC */
|
||||
|
|
@ -230,9 +230,9 @@ struct ehci_regs {
|
|||
/* FRINDEX: offset 0x0C */
|
||||
u32 frame_index; /* current microframe number */
|
||||
/* CTRLDSSEGMENT: offset 0x10 */
|
||||
u32 segment; /* address bits 63:32 if needed */
|
||||
u32 segment; /* address bits 63:32 if needed */
|
||||
/* PERIODICLISTBASE: offset 0x14 */
|
||||
u32 frame_list; /* points to periodic list */
|
||||
u32 frame_list; /* points to periodic list */
|
||||
/* ASYNCLISTADDR: offset 0x18 */
|
||||
u32 async_next; /* address of next async queue head */
|
||||
|
||||
|
|
@ -301,7 +301,7 @@ struct ehci_dbg_port {
|
|||
|
||||
/*
|
||||
* EHCI Specification 0.95 Section 3.5
|
||||
* QTD: describe data transfer components (buffer, direction, ...)
|
||||
* QTD: describe data transfer components (buffer, direction, ...)
|
||||
* See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram".
|
||||
*
|
||||
* These are associated only with "QH" (Queue Head) structures,
|
||||
|
|
@ -311,7 +311,7 @@ struct ehci_qtd {
|
|||
/* first part defined by EHCI spec */
|
||||
__le32 hw_next; /* see EHCI 3.5.1 */
|
||||
__le32 hw_alt_next; /* see EHCI 3.5.2 */
|
||||
__le32 hw_token; /* see EHCI 3.5.3 */
|
||||
__le32 hw_token; /* see EHCI 3.5.3 */
|
||||
#define QTD_TOGGLE (1 << 31) /* data toggle */
|
||||
#define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff)
|
||||
#define QTD_IOC (1 << 15) /* interrupt on complete */
|
||||
|
|
@ -348,8 +348,8 @@ struct ehci_qtd {
|
|||
/* values for that type tag */
|
||||
#define Q_TYPE_ITD __constant_cpu_to_le32 (0 << 1)
|
||||
#define Q_TYPE_QH __constant_cpu_to_le32 (1 << 1)
|
||||
#define Q_TYPE_SITD __constant_cpu_to_le32 (2 << 1)
|
||||
#define Q_TYPE_FSTN __constant_cpu_to_le32 (3 << 1)
|
||||
#define Q_TYPE_SITD __constant_cpu_to_le32 (2 << 1)
|
||||
#define Q_TYPE_FSTN __constant_cpu_to_le32 (3 << 1)
|
||||
|
||||
/* next async queue entry, or pointer to interrupt/periodic QH */
|
||||
#define QH_NEXT(dma) (cpu_to_le32(((u32)dma)&~0x01f)|Q_TYPE_QH)
|
||||
|
|
@ -366,7 +366,7 @@ struct ehci_qtd {
|
|||
* For entries in the async schedule, the type tag always says "qh".
|
||||
*/
|
||||
union ehci_shadow {
|
||||
struct ehci_qh *qh; /* Q_TYPE_QH */
|
||||
struct ehci_qh *qh; /* Q_TYPE_QH */
|
||||
struct ehci_itd *itd; /* Q_TYPE_ITD */
|
||||
struct ehci_sitd *sitd; /* Q_TYPE_SITD */
|
||||
struct ehci_fstn *fstn; /* Q_TYPE_FSTN */
|
||||
|
|
@ -396,7 +396,7 @@ struct ehci_qh {
|
|||
#define QH_HUBPORT 0x3f800000
|
||||
#define QH_MULT 0xc0000000
|
||||
__le32 hw_current; /* qtd list - see EHCI 3.6.4 */
|
||||
|
||||
|
||||
/* qtd overlay (hardware parts of a struct ehci_qtd) */
|
||||
__le32 hw_qtd_next;
|
||||
__le32 hw_alt_next;
|
||||
|
|
@ -471,7 +471,7 @@ struct ehci_iso_stream {
|
|||
struct list_head td_list; /* queued itds/sitds */
|
||||
struct list_head free_list; /* list of unused itds/sitds */
|
||||
struct usb_device *udev;
|
||||
struct usb_host_endpoint *ep;
|
||||
struct usb_host_endpoint *ep;
|
||||
|
||||
/* output of (re)scheduling */
|
||||
unsigned long start; /* jiffies */
|
||||
|
|
@ -491,8 +491,8 @@ struct ehci_iso_stream {
|
|||
unsigned bandwidth;
|
||||
|
||||
/* This is used to initialize iTD's hw_bufp fields */
|
||||
__le32 buf0;
|
||||
__le32 buf1;
|
||||
__le32 buf0;
|
||||
__le32 buf1;
|
||||
__le32 buf2;
|
||||
|
||||
/* this is used to initialize sITD's tt info */
|
||||
|
|
@ -520,7 +520,7 @@ struct ehci_itd {
|
|||
|
||||
#define ITD_ACTIVE __constant_cpu_to_le32(EHCI_ISOC_ACTIVE)
|
||||
|
||||
__le32 hw_bufp [7]; /* see EHCI 3.3.3 */
|
||||
__le32 hw_bufp [7]; /* see EHCI 3.3.3 */
|
||||
__le32 hw_bufp_hi [7]; /* Appendix B */
|
||||
|
||||
/* the rest is HCD-private */
|
||||
|
|
@ -541,7 +541,7 @@ struct ehci_itd {
|
|||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* EHCI Specification 0.95 Section 3.4
|
||||
* EHCI Specification 0.95 Section 3.4
|
||||
* siTD, aka split-transaction isochronous Transfer Descriptor
|
||||
* ... describe full speed iso xfers through TT in hubs
|
||||
* see Figure 3-5 "Split-transaction Isochronous Transaction Descriptor (siTD)
|
||||
|
|
|
|||
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