[ARM] 3279/1: OMAP: 1/3 Fix low-level io init
Patch from Tony Lindgren This patch adds the missing cache flushes to common low-level init that are needed to access the IO region. These flushes are normally done at the end of devicemaps_init(), but we need to detect the OMAP core type early. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -13,6 +13,7 @@
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <asm/tlb.h>
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#include <asm/mach/map.h>
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#include <asm/mach/map.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/mux.h>
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@ -83,15 +84,24 @@ static struct map_desc omap16xx_io_desc[] __initdata = {
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};
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};
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#endif
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#endif
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static int initialized = 0;
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/*
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* Maps common IO regions for omap1. This should only get called from
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static void __init _omap_map_io(void)
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* board specific init.
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*/
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void __init omap1_map_common_io(void)
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{
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{
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initialized = 1;
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/* We have to initialize the IO space mapping before we can run
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* cpu_is_omapxxx() macros. */
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iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
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iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
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/* Normally devicemaps_init() would flush caches and tlb after
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* mdesc->map_io(), but we must also do it here because of the CPU
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* revision check below.
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*/
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local_flush_tlb_all();
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flush_cache_all();
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/* We want to check CPU revision early for cpu_is_omapxxxx() macros.
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* IO space mapping must be initialized before we can do that.
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*/
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omap_check_revision();
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omap_check_revision();
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#ifdef CONFIG_ARCH_OMAP730
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#ifdef CONFIG_ARCH_OMAP730
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@ -111,7 +121,14 @@ static void __init _omap_map_io(void)
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#endif
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#endif
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omap_sram_init();
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omap_sram_init();
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}
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/*
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* Common low-level hardware init for omap1. This should only get called from
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* board specific init.
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*/
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void __init omap1_init_common_hw()
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{
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/* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
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/* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
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* on a Posted Write in the TIPB Bridge".
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* on a Posted Write in the TIPB Bridge".
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*/
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*/
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@ -121,16 +138,7 @@ static void __init _omap_map_io(void)
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/* Must init clocks early to assure that timer interrupt works
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/* Must init clocks early to assure that timer interrupt works
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*/
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*/
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omap1_clk_init();
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omap1_clk_init();
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}
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omap1_mux_init();
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/*
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* This should only get called from board specific init
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*/
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void __init omap_map_common_io(void)
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{
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if (!initialized) {
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_omap_map_io();
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omap1_mux_init();
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}
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}
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}
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@ -17,6 +17,7 @@
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#include <linux/init.h>
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#include <linux/init.h>
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#include <asm/mach/map.h>
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#include <asm/mach/map.h>
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#include <asm/tlb.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/cacheflush.h>
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#include <asm/cacheflush.h>
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@ -95,6 +96,14 @@ void __init omap_map_sram(void)
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omap_sram_io_desc[0].pfn, omap_sram_io_desc[0].virtual,
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omap_sram_io_desc[0].pfn, omap_sram_io_desc[0].virtual,
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omap_sram_io_desc[0].length);
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omap_sram_io_desc[0].length);
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/*
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* Normally devicemaps_init() would flush caches and tlb after
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* mdesc->map_io(), but since we're called from map_io(), we
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* must do it here.
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*/
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local_flush_tlb_all();
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flush_cache_all();
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/*
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/*
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* Looks like we need to preserve some bootloader code at the
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* Looks like we need to preserve some bootloader code at the
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* beginning of SRAM for jumping to flash for reboot to work...
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* beginning of SRAM for jumping to flash for reboot to work...
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@ -116,7 +116,11 @@ typedef struct { volatile u32 offset[4096]; } __regbase32;
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->offset[((vaddr)&4095)>>2]
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->offset[((vaddr)&4095)>>2]
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#define __REG32(paddr) __REGV32(io_p2v(paddr))
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#define __REG32(paddr) __REGV32(io_p2v(paddr))
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extern void omap_map_common_io(void);
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extern void omap1_map_common_io(void);
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extern void omap1_init_common_hw(void);
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extern void omap2_map_common_io(void);
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extern void omap2_init_common_hw(void);
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#else
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#else
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