KVM: vPMU: Fill get_msr MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0
SDM section 18.2.3 mentioned that: "IA32_PERF_GLOBAL_OVF_CTL MSR allows software to clear overflow indicator(s) of any general-purpose or fixed-function counters via a single WRMSR." It is R/W mentioned by SDM, we read this msr on bare-metal during perf testing, the value is always 0 for ICX/SKX boxes on hands. Let's fill get_msr MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0 as hardware behavior and drop global_ovf_ctrl variable. Tested-by: Like Xu <likexu@tencent.com> Signed-off-by: Wanpeng Li <wanpengli@tencent.com> Message-Id: <1634631160-67276-2-git-send-email-wanpengli@tencent.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -499,7 +499,6 @@ struct kvm_pmu {
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u64 fixed_ctr_ctrl;
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u64 global_ctrl;
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u64 global_status;
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u64 global_ovf_ctrl;
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u64 counter_bitmask[2];
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u64 global_ctrl_mask;
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u64 global_ovf_ctrl_mask;
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@ -365,7 +365,7 @@ static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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msr_info->data = pmu->global_ctrl;
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return 0;
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case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
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msr_info->data = pmu->global_ovf_ctrl;
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msr_info->data = 0;
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return 0;
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default:
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if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) ||
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@ -423,7 +423,6 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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if (!(data & pmu->global_ovf_ctrl_mask)) {
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if (!msr_info->host_initiated)
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pmu->global_status &= ~data;
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pmu->global_ovf_ctrl = data;
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return 0;
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}
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break;
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@ -588,8 +587,7 @@ static void intel_pmu_reset(struct kvm_vcpu *vcpu)
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pmc->counter = 0;
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}
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pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status =
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pmu->global_ovf_ctrl = 0;
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pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status = 0;
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intel_pmu_release_guest_lbr_event(vcpu);
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}
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