[PPC] Remove mpc8272 ads board from arch/ppc
We have a board port in arch/powerpc so we dont need this one anymore. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Родитель
14b3ca4022
Коммит
546be91915
|
@ -165,9 +165,6 @@ static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
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#ifdef CONFIG_SBC82xx
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#define F1_RXCLK 9
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#define F1_TXCLK 10
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#elif defined(CONFIG_ADS8272)
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#define F1_RXCLK 11
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#define F1_TXCLK 10
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#else
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#define F1_RXCLK 12
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#define F1_TXCLK 11
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@ -175,13 +172,8 @@ static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
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/* FCC2 Clock Source Configuration. There are board specific.
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Can only choose from CLK13-16 */
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#ifdef CONFIG_ADS8272
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#define F2_RXCLK 15
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#define F2_TXCLK 16
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#else
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#define F2_RXCLK 13
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#define F2_TXCLK 14
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#endif
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/* FCC3 Clock Source Configuration. There are board specific.
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Can only choose from CLK13-16 */
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@ -289,10 +281,7 @@ static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
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/* TQM8260 has MDIO and MDCK on PC30 and PC31 respectively */
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#define PC_MDIO ((uint)0x00000002)
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#define PC_MDCK ((uint)0x00000001)
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#elif defined(CONFIG_ADS8272)
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#define PC_MDIO ((uint)0x00002000)
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#define PC_MDCK ((uint)0x00001000)
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#elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260) || defined(CONFIG_PQ2FADS)
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#elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260)
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#define PC_MDIO ((uint)0x00400000)
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#define PC_MDCK ((uint)0x00200000)
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#else
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@ -2118,11 +2107,6 @@ init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
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printk("Can't get FCC IRQ %d\n", fip->fc_interrupt);
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#ifdef PHY_INTERRUPT
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#ifdef CONFIG_ADS8272
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if (request_irq(PHY_INTERRUPT, mii_link_interrupt, IRQF_SHARED,
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"mii", dev) < 0)
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printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
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#else
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/* Make IRQn edge triggered. This does not work if PHY_INTERRUPT is
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* on Port C.
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*/
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@ -2132,7 +2116,6 @@ init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
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if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0,
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"mii", dev) < 0)
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printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
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#endif
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#endif /* PHY_INTERRUPT */
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/* Set GFMR to enable Ethernet operating mode.
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@ -666,9 +666,6 @@ config TQM8260
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End of Life: not yet :-)
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URL: <http://www.denx.de/PDF/TQM82xx_SPEC_Rev005.pdf>
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config ADS8272
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bool "ADS8272"
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config PQ2FADS
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bool "Freescale-PQ2FADS"
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help
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@ -698,11 +695,6 @@ config EV64360
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platform.
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endchoice
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config PQ2ADS
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bool
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depends on ADS8272
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default y
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config TQM8xxL
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bool
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depends on 8xx && (TQM823L || TQM850L || FPS850L || TQM855L || TQM860L)
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@ -725,15 +717,6 @@ config 8260
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this option means that you wish to build a kernel for a machine with
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an 8260 class CPU.
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config 8272
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bool
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depends on 6xx
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default y if ADS8272
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select 8260
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help
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The MPC8272 CPM has a different internal dpram setup than other CPM2
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devices
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config CPM1
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bool
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depends on 8xx
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@ -1069,7 +1052,7 @@ config PCI_8260
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config 8260_PCI9
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bool "Enable workaround for MPC826x erratum PCI 9"
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depends on PCI_8260 && !ADS8272
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depends on PCI_8260
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default y
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choice
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@ -1,930 +0,0 @@
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#
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# Automatically generated make config: don't edit
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# Linux kernel version: 2.6.21-rc5
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# Wed Apr 4 20:55:16 2007
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#
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CONFIG_MMU=y
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CONFIG_GENERIC_HARDIRQS=y
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CONFIG_RWSEM_XCHGADD_ALGORITHM=y
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CONFIG_ARCH_HAS_ILOG2_U32=y
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# CONFIG_ARCH_HAS_ILOG2_U64 is not set
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CONFIG_GENERIC_HWEIGHT=y
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CONFIG_GENERIC_CALIBRATE_DELAY=y
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CONFIG_PPC=y
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CONFIG_PPC32=y
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CONFIG_GENERIC_NVRAM=y
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CONFIG_GENERIC_FIND_NEXT_BIT=y
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CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
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CONFIG_ARCH_MAY_HAVE_PC_FDC=y
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CONFIG_GENERIC_BUG=y
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CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
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#
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# Code maturity level options
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#
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CONFIG_EXPERIMENTAL=y
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CONFIG_BROKEN_ON_SMP=y
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CONFIG_INIT_ENV_ARG_LIMIT=32
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#
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# General setup
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#
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CONFIG_LOCALVERSION=""
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CONFIG_LOCALVERSION_AUTO=y
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CONFIG_SWAP=y
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CONFIG_SYSVIPC=y
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# CONFIG_IPC_NS is not set
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CONFIG_SYSVIPC_SYSCTL=y
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# CONFIG_POSIX_MQUEUE is not set
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# CONFIG_BSD_PROCESS_ACCT is not set
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# CONFIG_TASKSTATS is not set
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# CONFIG_UTS_NS is not set
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# CONFIG_AUDIT is not set
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# CONFIG_IKCONFIG is not set
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CONFIG_SYSFS_DEPRECATED=y
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# CONFIG_RELAY is not set
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_INITRAMFS_SOURCE=""
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# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
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CONFIG_SYSCTL=y
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CONFIG_EMBEDDED=y
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CONFIG_SYSCTL_SYSCALL=y
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# CONFIG_KALLSYMS is not set
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# CONFIG_HOTPLUG is not set
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CONFIG_PRINTK=y
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CONFIG_BUG=y
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CONFIG_ELF_CORE=y
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CONFIG_BASE_FULL=y
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CONFIG_FUTEX=y
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# CONFIG_EPOLL is not set
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CONFIG_SHMEM=y
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CONFIG_SLAB=y
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CONFIG_VM_EVENT_COUNTERS=y
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CONFIG_RT_MUTEXES=y
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# CONFIG_TINY_SHMEM is not set
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CONFIG_BASE_SMALL=0
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# CONFIG_SLOB is not set
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#
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# Loadable module support
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#
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# CONFIG_MODULES is not set
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#
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# Block layer
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#
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CONFIG_BLOCK=y
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# CONFIG_LBD is not set
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# CONFIG_BLK_DEV_IO_TRACE is not set
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# CONFIG_LSF is not set
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#
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# IO Schedulers
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#
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CONFIG_IOSCHED_NOOP=y
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CONFIG_IOSCHED_AS=y
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CONFIG_IOSCHED_DEADLINE=y
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CONFIG_IOSCHED_CFQ=y
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# CONFIG_DEFAULT_AS is not set
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# CONFIG_DEFAULT_DEADLINE is not set
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CONFIG_DEFAULT_CFQ=y
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# CONFIG_DEFAULT_NOOP is not set
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CONFIG_DEFAULT_IOSCHED="cfq"
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#
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# Processor
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#
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CONFIG_6xx=y
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# CONFIG_40x is not set
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# CONFIG_44x is not set
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# CONFIG_8xx is not set
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# CONFIG_E200 is not set
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# CONFIG_E500 is not set
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CONFIG_PPC_FPU=y
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# CONFIG_PPC_DCR_NATIVE is not set
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# CONFIG_KEXEC is not set
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# CONFIG_CPU_FREQ is not set
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# CONFIG_WANT_EARLY_SERIAL is not set
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CONFIG_EMBEDDEDBOOT=y
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CONFIG_PPC_STD_MMU=y
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#
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# Platform options
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#
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#
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# Freescale Ethernet driver platform-specific options
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#
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# CONFIG_PPC_PREP is not set
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# CONFIG_APUS is not set
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# CONFIG_KATANA is not set
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# CONFIG_WILLOW is not set
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# CONFIG_CPCI690 is not set
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# CONFIG_POWERPMC250 is not set
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# CONFIG_CHESTNUT is not set
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# CONFIG_SPRUCE is not set
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# CONFIG_HDPU is not set
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# CONFIG_EV64260 is not set
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# CONFIG_LOPEC is not set
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# CONFIG_MVME5100 is not set
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# CONFIG_PPLUS is not set
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# CONFIG_PRPMC750 is not set
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# CONFIG_PRPMC800 is not set
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# CONFIG_SANDPOINT is not set
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# CONFIG_RADSTONE_PPC7D is not set
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# CONFIG_PAL4 is not set
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# CONFIG_EST8260 is not set
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# CONFIG_SBC82xx is not set
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# CONFIG_SBS8260 is not set
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# CONFIG_RPX8260 is not set
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# CONFIG_TQM8260 is not set
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CONFIG_ADS8272=y
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# CONFIG_PQ2FADS is not set
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# CONFIG_LITE5200 is not set
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# CONFIG_MPC834x_SYS is not set
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# CONFIG_EV64360 is not set
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CONFIG_PQ2ADS=y
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CONFIG_8260=y
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CONFIG_8272=y
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CONFIG_CPM2=y
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# CONFIG_PC_KEYBOARD is not set
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# CONFIG_SMP is not set
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# CONFIG_HIGHMEM is not set
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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# CONFIG_HZ_100 is not set
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CONFIG_HZ_250=y
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# CONFIG_HZ_300 is not set
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# CONFIG_HZ_1000 is not set
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CONFIG_HZ=250
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CONFIG_PREEMPT_NONE=y
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# CONFIG_PREEMPT_VOLUNTARY is not set
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# CONFIG_PREEMPT is not set
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CONFIG_SELECT_MEMORY_MODEL=y
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CONFIG_FLATMEM_MANUAL=y
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# CONFIG_DISCONTIGMEM_MANUAL is not set
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# CONFIG_SPARSEMEM_MANUAL is not set
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CONFIG_FLATMEM=y
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CONFIG_FLAT_NODE_MEM_MAP=y
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# CONFIG_SPARSEMEM_STATIC is not set
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CONFIG_SPLIT_PTLOCK_CPUS=4
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# CONFIG_RESOURCES_64BIT is not set
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CONFIG_ZONE_DMA_FLAG=1
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CONFIG_BINFMT_ELF=y
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# CONFIG_BINFMT_MISC is not set
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# CONFIG_CMDLINE_BOOL is not set
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# CONFIG_PM is not set
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CONFIG_SECCOMP=y
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CONFIG_ISA_DMA_API=y
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#
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# Bus options
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#
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CONFIG_ZONE_DMA=y
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# CONFIG_PPC_I8259 is not set
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CONFIG_PPC_INDIRECT_PCI=y
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CONFIG_PCI=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PCI_8260=y
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#
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# PCCARD (PCMCIA/CardBus) support
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#
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#
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# Advanced setup
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#
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# CONFIG_ADVANCED_OPTIONS is not set
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#
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# Default settings for advanced configuration options are used
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#
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CONFIG_HIGHMEM_START=0xfe000000
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CONFIG_LOWMEM_SIZE=0x30000000
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CONFIG_KERNEL_START=0xc0000000
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CONFIG_TASK_SIZE=0x80000000
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CONFIG_BOOT_LOAD=0x00400000
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#
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# Networking
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#
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CONFIG_NET=y
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#
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# Networking options
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#
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# CONFIG_NETDEBUG is not set
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CONFIG_PACKET=y
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# CONFIG_PACKET_MMAP is not set
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CONFIG_UNIX=y
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CONFIG_XFRM=y
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# CONFIG_XFRM_USER is not set
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# CONFIG_XFRM_SUB_POLICY is not set
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# CONFIG_XFRM_MIGRATE is not set
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# CONFIG_NET_KEY is not set
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CONFIG_INET=y
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CONFIG_IP_MULTICAST=y
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# CONFIG_IP_ADVANCED_ROUTER is not set
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CONFIG_IP_FIB_HASH=y
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CONFIG_IP_PNP=y
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CONFIG_IP_PNP_DHCP=y
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CONFIG_IP_PNP_BOOTP=y
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# CONFIG_IP_PNP_RARP is not set
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# CONFIG_NET_IPIP is not set
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# CONFIG_NET_IPGRE is not set
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# CONFIG_IP_MROUTE is not set
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# CONFIG_ARPD is not set
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CONFIG_SYN_COOKIES=y
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# CONFIG_INET_AH is not set
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# CONFIG_INET_ESP is not set
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# CONFIG_INET_IPCOMP is not set
|
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# CONFIG_INET_XFRM_TUNNEL is not set
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# CONFIG_INET_TUNNEL is not set
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CONFIG_INET_XFRM_MODE_TRANSPORT=y
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CONFIG_INET_XFRM_MODE_TUNNEL=y
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CONFIG_INET_XFRM_MODE_BEET=y
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CONFIG_INET_DIAG=y
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CONFIG_INET_TCP_DIAG=y
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# CONFIG_TCP_CONG_ADVANCED is not set
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CONFIG_TCP_CONG_CUBIC=y
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CONFIG_DEFAULT_TCP_CONG="cubic"
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# CONFIG_TCP_MD5SIG is not set
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# CONFIG_IPV6 is not set
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# CONFIG_INET6_XFRM_TUNNEL is not set
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# CONFIG_INET6_TUNNEL is not set
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# CONFIG_NETWORK_SECMARK is not set
|
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# CONFIG_NETFILTER is not set
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|
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#
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# DCCP Configuration (EXPERIMENTAL)
|
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#
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# CONFIG_IP_DCCP is not set
|
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|
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#
|
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# SCTP Configuration (EXPERIMENTAL)
|
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#
|
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# CONFIG_IP_SCTP is not set
|
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|
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#
|
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# TIPC Configuration (EXPERIMENTAL)
|
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#
|
||||
# CONFIG_TIPC is not set
|
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# CONFIG_ATM is not set
|
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# CONFIG_BRIDGE is not set
|
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# CONFIG_VLAN_8021Q is not set
|
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# CONFIG_DECNET is not set
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# CONFIG_LLC2 is not set
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# CONFIG_IPX is not set
|
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# CONFIG_ATALK is not set
|
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# CONFIG_X25 is not set
|
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# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
||||
#
|
||||
# Connector - unified userspace <-> kernelspace linker
|
||||
#
|
||||
# CONFIG_CONNECTOR is not set
|
||||
|
||||
#
|
||||
# Memory Technology Devices (MTD)
|
||||
#
|
||||
# CONFIG_MTD is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
# CONFIG_PNPACPI is not set
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
# CONFIG_BLK_DEV_FD is not set
|
||||
# CONFIG_BLK_CPQ_DA is not set
|
||||
# CONFIG_BLK_CPQ_CISS_DA is not set
|
||||
# CONFIG_BLK_DEV_DAC960 is not set
|
||||
# CONFIG_BLK_DEV_UMEM is not set
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
# CONFIG_BLK_DEV_SX8 is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=32768
|
||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
# CONFIG_SGI_IOC4 is not set
|
||||
# CONFIG_TIFM_CORE is not set
|
||||
|
||||
#
|
||||
# ATA/ATAPI/MFM/RLL support
|
||||
#
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
# CONFIG_SCSI is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
|
||||
#
|
||||
# Serial ATA (prod) and Parallel ATA (experimental) drivers
|
||||
#
|
||||
# CONFIG_ATA is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
# CONFIG_MD is not set
|
||||
|
||||
#
|
||||
# Fusion MPT device support
|
||||
#
|
||||
# CONFIG_FUSION is not set
|
||||
|
||||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
#
|
||||
# CONFIG_IEEE1394 is not set
|
||||
|
||||
#
|
||||
# I2O device support
|
||||
#
|
||||
# CONFIG_I2O is not set
|
||||
|
||||
#
|
||||
# Macintosh device drivers
|
||||
#
|
||||
# CONFIG_MAC_EMUMOUSEBTN is not set
|
||||
# CONFIG_WINDFARM is not set
|
||||
|
||||
#
|
||||
# Network device support
|
||||
#
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
|
||||
#
|
||||
# ARCnet devices
|
||||
#
|
||||
# CONFIG_ARCNET is not set
|
||||
|
||||
#
|
||||
# PHY device support
|
||||
#
|
||||
CONFIG_PHYLIB=y
|
||||
|
||||
#
|
||||
# MII PHY device drivers
|
||||
#
|
||||
# CONFIG_MARVELL_PHY is not set
|
||||
CONFIG_DAVICOM_PHY=y
|
||||
# CONFIG_QSEMI_PHY is not set
|
||||
# CONFIG_LXT_PHY is not set
|
||||
# CONFIG_CICADA_PHY is not set
|
||||
# CONFIG_VITESSE_PHY is not set
|
||||
# CONFIG_SMSC_PHY is not set
|
||||
# CONFIG_BROADCOM_PHY is not set
|
||||
# CONFIG_FIXED_PHY is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
# CONFIG_HAPPYMEAL is not set
|
||||
# CONFIG_SUNGEM is not set
|
||||
# CONFIG_CASSINI is not set
|
||||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
|
||||
#
|
||||
# Tulip family network device support
|
||||
#
|
||||
# CONFIG_NET_TULIP is not set
|
||||
# CONFIG_HP100 is not set
|
||||
# CONFIG_NET_PCI is not set
|
||||
CONFIG_FS_ENET=y
|
||||
# CONFIG_FS_ENET_HAS_SCC is not set
|
||||
CONFIG_FS_ENET_HAS_FCC=y
|
||||
|
||||
#
|
||||
# Ethernet (1000 Mbit)
|
||||
#
|
||||
# CONFIG_ACENIC is not set
|
||||
# CONFIG_DL2K is not set
|
||||
# CONFIG_E1000 is not set
|
||||
# CONFIG_NS83820 is not set
|
||||
# CONFIG_HAMACHI is not set
|
||||
# CONFIG_YELLOWFIN is not set
|
||||
# CONFIG_R8169 is not set
|
||||
# CONFIG_SIS190 is not set
|
||||
# CONFIG_SKGE is not set
|
||||
# CONFIG_SKY2 is not set
|
||||
# CONFIG_SK98LIN is not set
|
||||
# CONFIG_TIGON3 is not set
|
||||
# CONFIG_BNX2 is not set
|
||||
# CONFIG_QLA3XXX is not set
|
||||
# CONFIG_ATL1 is not set
|
||||
|
||||
#
|
||||
# Ethernet (10000 Mbit)
|
||||
#
|
||||
# CONFIG_CHELSIO_T1 is not set
|
||||
# CONFIG_CHELSIO_T3 is not set
|
||||
# CONFIG_IXGB is not set
|
||||
# CONFIG_S2IO is not set
|
||||
# CONFIG_MYRI10GE is not set
|
||||
# CONFIG_NETXEN_NIC is not set
|
||||
|
||||
#
|
||||
# Token Ring devices
|
||||
#
|
||||
# CONFIG_TR is not set
|
||||
|
||||
#
|
||||
# Wireless LAN (non-hamradio)
|
||||
#
|
||||
# CONFIG_NET_RADIO is not set
|
||||
|
||||
#
|
||||
# Wan interfaces
|
||||
#
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_FDDI is not set
|
||||
# CONFIG_HIPPI is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Telephony Support
|
||||
#
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
CONFIG_INPUT=y
|
||||
# CONFIG_INPUT_FF_MEMLESS is not set
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
#
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
# CONFIG_INPUT_JOYDEV is not set
|
||||
# CONFIG_INPUT_TSDEV is not set
|
||||
# CONFIG_INPUT_EVDEV is not set
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
#
|
||||
# Input Device Drivers
|
||||
#
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_INPUT_JOYSTICK is not set
|
||||
# CONFIG_INPUT_TOUCHSCREEN is not set
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
# CONFIG_SERIAL_UARTLITE is not set
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
CONFIG_SERIAL_CPM=y
|
||||
CONFIG_SERIAL_CPM_CONSOLE=y
|
||||
CONFIG_SERIAL_CPM_SCC1=y
|
||||
# CONFIG_SERIAL_CPM_SCC2 is not set
|
||||
# CONFIG_SERIAL_CPM_SCC3 is not set
|
||||
CONFIG_SERIAL_CPM_SCC4=y
|
||||
# CONFIG_SERIAL_CPM_SMC1 is not set
|
||||
# CONFIG_SERIAL_CPM_SMC2 is not set
|
||||
# CONFIG_SERIAL_JSM is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
|
||||
#
|
||||
# Watchdog Cards
|
||||
#
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_HW_RANDOM=y
|
||||
# CONFIG_NVRAM is not set
|
||||
CONFIG_GEN_RTC=y
|
||||
# CONFIG_GEN_RTC_X is not set
|
||||
# CONFIG_DTLK is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
# CONFIG_AGP is not set
|
||||
# CONFIG_DRM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
|
||||
#
|
||||
# I2C support
|
||||
#
|
||||
# CONFIG_I2C is not set
|
||||
|
||||
#
|
||||
# SPI support
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
|
||||
#
|
||||
# Dallas's 1-wire bus
|
||||
#
|
||||
# CONFIG_W1 is not set
|
||||
|
||||
#
|
||||
# Hardware Monitoring support
|
||||
#
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_SENSORS_ABITUGURU is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
|
||||
#
|
||||
# Digital Video Broadcasting Devices
|
||||
#
|
||||
# CONFIG_DVB is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
# CONFIG_FB is not set
|
||||
# CONFIG_FB_IBM_GXT4500 is not set
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# HID Devices
|
||||
#
|
||||
CONFIG_HID=y
|
||||
# CONFIG_HID_DEBUG is not set
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
CONFIG_USB_ARCH_HAS_EHCI=y
|
||||
# CONFIG_USB is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
#
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# MMC/SD Card support
|
||||
#
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# LED devices
|
||||
#
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
|
||||
#
|
||||
# LED drivers
|
||||
#
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
#
|
||||
|
||||
#
|
||||
# InfiniBand support
|
||||
#
|
||||
# CONFIG_INFINIBAND is not set
|
||||
|
||||
#
|
||||
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
|
||||
#
|
||||
|
||||
#
|
||||
# Real Time Clock
|
||||
#
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
|
||||
#
|
||||
# DMA Engine support
|
||||
#
|
||||
# CONFIG_DMA_ENGINE is not set
|
||||
|
||||
#
|
||||
# DMA Clients
|
||||
#
|
||||
|
||||
#
|
||||
# DMA Devices
|
||||
#
|
||||
|
||||
#
|
||||
# Auxiliary Display support
|
||||
#
|
||||
|
||||
#
|
||||
# Virtualization
|
||||
#
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
# CONFIG_EXT2_FS_XIP is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_XATTR=y
|
||||
# CONFIG_EXT3_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT3_FS_SECURITY is not set
|
||||
# CONFIG_EXT4DEV_FS is not set
|
||||
CONFIG_JBD=y
|
||||
# CONFIG_JBD_DEBUG is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_SYSFS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_POSIX_ACL is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NFS_V4=y
|
||||
# CONFIG_NFS_DIRECTIO is not set
|
||||
# CONFIG_NFSD is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_LOCKD=y
|
||||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_NFS_ACL_SUPPORT=y
|
||||
CONFIG_NFS_COMMON=y
|
||||
CONFIG_SUNRPC=y
|
||||
CONFIG_SUNRPC_GSS=y
|
||||
CONFIG_RPCSEC_GSS_KRB5=y
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
# CONFIG_9P_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
# CONFIG_ACORN_PARTITION is not set
|
||||
# CONFIG_OSF_PARTITION is not set
|
||||
# CONFIG_AMIGA_PARTITION is not set
|
||||
# CONFIG_ATARI_PARTITION is not set
|
||||
# CONFIG_MAC_PARTITION is not set
|
||||
# CONFIG_MSDOS_PARTITION is not set
|
||||
# CONFIG_LDM_PARTITION is not set
|
||||
# CONFIG_SGI_PARTITION is not set
|
||||
# CONFIG_ULTRIX_PARTITION is not set
|
||||
# CONFIG_SUN_PARTITION is not set
|
||||
# CONFIG_KARMA_PARTITION is not set
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
# CONFIG_NLS is not set
|
||||
|
||||
#
|
||||
# Distributed Lock Manager
|
||||
#
|
||||
# CONFIG_DLM is not set
|
||||
# CONFIG_SCC_ENET is not set
|
||||
# CONFIG_FEC_ENET is not set
|
||||
|
||||
#
|
||||
# CPM2 Options
|
||||
#
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC32 is not set
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
# CONFIG_PROFILING is not set
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
# CONFIG_MAGIC_SYSRQ is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
# CONFIG_KGDB_CONSOLE is not set
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
CONFIG_CRYPTO=y
|
||||
CONFIG_CRYPTO_ALGAPI=y
|
||||
CONFIG_CRYPTO_BLKCIPHER=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
# CONFIG_CRYPTO_HMAC is not set
|
||||
# CONFIG_CRYPTO_XCBC is not set
|
||||
# CONFIG_CRYPTO_NULL is not set
|
||||
# CONFIG_CRYPTO_MD4 is not set
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
# CONFIG_CRYPTO_SHA1 is not set
|
||||
# CONFIG_CRYPTO_SHA256 is not set
|
||||
# CONFIG_CRYPTO_SHA512 is not set
|
||||
# CONFIG_CRYPTO_WP512 is not set
|
||||
# CONFIG_CRYPTO_TGR192 is not set
|
||||
# CONFIG_CRYPTO_GF128MUL is not set
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
CONFIG_CRYPTO_PCBC=y
|
||||
# CONFIG_CRYPTO_LRW is not set
|
||||
CONFIG_CRYPTO_DES=y
|
||||
# CONFIG_CRYPTO_FCRYPT is not set
|
||||
# CONFIG_CRYPTO_BLOWFISH is not set
|
||||
# CONFIG_CRYPTO_TWOFISH is not set
|
||||
# CONFIG_CRYPTO_SERPENT is not set
|
||||
# CONFIG_CRYPTO_AES is not set
|
||||
# CONFIG_CRYPTO_CAST5 is not set
|
||||
# CONFIG_CRYPTO_CAST6 is not set
|
||||
# CONFIG_CRYPTO_TEA is not set
|
||||
# CONFIG_CRYPTO_ARC4 is not set
|
||||
# CONFIG_CRYPTO_KHAZAD is not set
|
||||
# CONFIG_CRYPTO_ANUBIS is not set
|
||||
# CONFIG_CRYPTO_DEFLATE is not set
|
||||
# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
||||
# CONFIG_CRYPTO_CRC32C is not set
|
||||
# CONFIG_CRYPTO_CAMELLIA is not set
|
||||
|
||||
#
|
||||
# Hardware crypto devices
|
||||
#
|
|
@ -4,7 +4,6 @@
|
|||
|
||||
obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o
|
||||
obj-$(CONFIG_PREP_RESIDUAL) += residual.o
|
||||
obj-$(CONFIG_PQ2ADS) += pq2ads.o
|
||||
obj-$(CONFIG_TQM8260) += tqm8260_setup.o
|
||||
obj-$(CONFIG_CPCI690) += cpci690.o
|
||||
obj-$(CONFIG_EV64260) += ev64260.o
|
||||
|
@ -26,4 +25,3 @@ obj-$(CONFIG_LITE5200) += lite5200.o
|
|||
obj-$(CONFIG_EV64360) += ev64360.o
|
||||
obj-$(CONFIG_MPC86XADS) += mpc866ads_setup.o
|
||||
obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
|
||||
obj-$(CONFIG_ADS8272) += mpc8272ads_setup.o
|
||||
|
|
|
@ -1,367 +0,0 @@
|
|||
/*
|
||||
* arch/ppc/platforms/mpc8272ads_setup.c
|
||||
*
|
||||
* MPC82xx Board-specific PlatformDevice descriptions
|
||||
*
|
||||
* 2005 (c) MontaVista Software, Inc.
|
||||
* Vitaly Bordug <vbordug@ru.mvista.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/fs_enet_pd.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/phy.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/mpc8260.h>
|
||||
#include <asm/cpm2.h>
|
||||
#include <asm/immap_cpm2.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/ppc_sys.h>
|
||||
#include <asm/ppcboot.h>
|
||||
#include <linux/fs_uart_pd.h>
|
||||
|
||||
#include "pq2ads_pd.h"
|
||||
|
||||
static void init_fcc1_ioports(struct fs_platform_info*);
|
||||
static void init_fcc2_ioports(struct fs_platform_info*);
|
||||
static void init_scc1_uart_ioports(struct fs_uart_platform_info*);
|
||||
static void init_scc4_uart_ioports(struct fs_uart_platform_info*);
|
||||
|
||||
static struct fs_uart_platform_info mpc8272_uart_pdata[] = {
|
||||
[fsid_scc1_uart] = {
|
||||
.init_ioports = init_scc1_uart_ioports,
|
||||
.fs_no = fsid_scc1_uart,
|
||||
.brg = 1,
|
||||
.tx_num_fifo = 4,
|
||||
.tx_buf_size = 32,
|
||||
.rx_num_fifo = 4,
|
||||
.rx_buf_size = 32,
|
||||
},
|
||||
[fsid_scc4_uart] = {
|
||||
.init_ioports = init_scc4_uart_ioports,
|
||||
.fs_no = fsid_scc4_uart,
|
||||
.brg = 4,
|
||||
.tx_num_fifo = 4,
|
||||
.tx_buf_size = 32,
|
||||
.rx_num_fifo = 4,
|
||||
.rx_buf_size = 32,
|
||||
},
|
||||
};
|
||||
|
||||
static struct fs_mii_bb_platform_info m82xx_mii_bb_pdata = {
|
||||
.mdio_dat.bit = 18,
|
||||
.mdio_dir.bit = 18,
|
||||
.mdc_dat.bit = 19,
|
||||
.delay = 1,
|
||||
};
|
||||
|
||||
static struct fs_platform_info mpc82xx_enet_pdata[] = {
|
||||
[fsid_fcc1] = {
|
||||
.fs_no = fsid_fcc1,
|
||||
.cp_page = CPM_CR_FCC1_PAGE,
|
||||
.cp_block = CPM_CR_FCC1_SBLOCK,
|
||||
|
||||
.clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
|
||||
.clk_route = CMX1_CLK_ROUTE,
|
||||
.clk_mask = CMX1_CLK_MASK,
|
||||
.init_ioports = init_fcc1_ioports,
|
||||
|
||||
.mem_offset = FCC1_MEM_OFFSET,
|
||||
|
||||
.rx_ring = 32,
|
||||
.tx_ring = 32,
|
||||
.rx_copybreak = 240,
|
||||
.use_napi = 0,
|
||||
.napi_weight = 17,
|
||||
.bus_id = "0:00",
|
||||
},
|
||||
[fsid_fcc2] = {
|
||||
.fs_no = fsid_fcc2,
|
||||
.cp_page = CPM_CR_FCC2_PAGE,
|
||||
.cp_block = CPM_CR_FCC2_SBLOCK,
|
||||
.clk_trx = (PC_F2RXCLK | PC_F2TXCLK),
|
||||
.clk_route = CMX2_CLK_ROUTE,
|
||||
.clk_mask = CMX2_CLK_MASK,
|
||||
.init_ioports = init_fcc2_ioports,
|
||||
|
||||
.mem_offset = FCC2_MEM_OFFSET,
|
||||
|
||||
.rx_ring = 32,
|
||||
.tx_ring = 32,
|
||||
.rx_copybreak = 240,
|
||||
.use_napi = 0,
|
||||
.napi_weight = 17,
|
||||
.bus_id = "0:03",
|
||||
},
|
||||
};
|
||||
|
||||
static void init_fcc1_ioports(struct fs_platform_info* pdata)
|
||||
{
|
||||
struct io_port *io;
|
||||
u32 tempval;
|
||||
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
|
||||
u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
|
||||
|
||||
io = &immap->im_ioport;
|
||||
|
||||
/* Enable the PHY */
|
||||
clrbits32(bcsr, BCSR1_FETHIEN);
|
||||
setbits32(bcsr, BCSR1_FETH_RST);
|
||||
|
||||
/* FCC1 pins are on port A/C. */
|
||||
/* Configure port A and C pins for FCC1 Ethernet. */
|
||||
|
||||
tempval = in_be32(&io->iop_pdira);
|
||||
tempval &= ~PA1_DIRA0;
|
||||
tempval |= PA1_DIRA1;
|
||||
out_be32(&io->iop_pdira, tempval);
|
||||
|
||||
tempval = in_be32(&io->iop_psora);
|
||||
tempval &= ~PA1_PSORA0;
|
||||
tempval |= PA1_PSORA1;
|
||||
out_be32(&io->iop_psora, tempval);
|
||||
|
||||
setbits32(&io->iop_ppara,PA1_DIRA0 | PA1_DIRA1);
|
||||
|
||||
/* Alter clocks */
|
||||
tempval = PC_F1TXCLK|PC_F1RXCLK;
|
||||
|
||||
clrbits32(&io->iop_psorc, tempval);
|
||||
clrbits32(&io->iop_pdirc, tempval);
|
||||
setbits32(&io->iop_pparc, tempval);
|
||||
|
||||
clrbits32(&immap->im_cpmux.cmx_fcr, CMX1_CLK_MASK);
|
||||
setbits32(&immap->im_cpmux.cmx_fcr, CMX1_CLK_ROUTE);
|
||||
iounmap(bcsr);
|
||||
iounmap(immap);
|
||||
}
|
||||
|
||||
static void init_fcc2_ioports(struct fs_platform_info* pdata)
|
||||
{
|
||||
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
|
||||
u32 *bcsr = ioremap(BCSR_ADDR+12, sizeof(u32));
|
||||
|
||||
struct io_port *io;
|
||||
u32 tempval;
|
||||
|
||||
immap = cpm2_immr;
|
||||
|
||||
io = &immap->im_ioport;
|
||||
|
||||
/* Enable the PHY */
|
||||
clrbits32(bcsr, BCSR3_FETHIEN2);
|
||||
setbits32(bcsr, BCSR3_FETH2_RST);
|
||||
|
||||
/* FCC2 are port B/C. */
|
||||
/* Configure port A and C pins for FCC2 Ethernet. */
|
||||
|
||||
tempval = in_be32(&io->iop_pdirb);
|
||||
tempval &= ~PB2_DIRB0;
|
||||
tempval |= PB2_DIRB1;
|
||||
out_be32(&io->iop_pdirb, tempval);
|
||||
|
||||
tempval = in_be32(&io->iop_psorb);
|
||||
tempval &= ~PB2_PSORB0;
|
||||
tempval |= PB2_PSORB1;
|
||||
out_be32(&io->iop_psorb, tempval);
|
||||
|
||||
setbits32(&io->iop_pparb,PB2_DIRB0 | PB2_DIRB1);
|
||||
|
||||
tempval = PC_F2RXCLK|PC_F2TXCLK;
|
||||
|
||||
/* Alter clocks */
|
||||
clrbits32(&io->iop_psorc,tempval);
|
||||
clrbits32(&io->iop_pdirc,tempval);
|
||||
setbits32(&io->iop_pparc,tempval);
|
||||
|
||||
clrbits32(&immap->im_cpmux.cmx_fcr, CMX2_CLK_MASK);
|
||||
setbits32(&immap->im_cpmux.cmx_fcr, CMX2_CLK_ROUTE);
|
||||
|
||||
iounmap(bcsr);
|
||||
iounmap(immap);
|
||||
}
|
||||
|
||||
|
||||
static void __init mpc8272ads_fixup_enet_pdata(struct platform_device *pdev,
|
||||
int idx)
|
||||
{
|
||||
bd_t* bi = (void*)__res;
|
||||
int fs_no = fsid_fcc1+pdev->id-1;
|
||||
|
||||
if(fs_no >= ARRAY_SIZE(mpc82xx_enet_pdata)) {
|
||||
return;
|
||||
}
|
||||
|
||||
mpc82xx_enet_pdata[fs_no].dpram_offset=
|
||||
(u32)cpm2_immr->im_dprambase;
|
||||
mpc82xx_enet_pdata[fs_no].fcc_regs_c =
|
||||
(u32)cpm2_immr->im_fcc_c;
|
||||
memcpy(&mpc82xx_enet_pdata[fs_no].macaddr,bi->bi_enetaddr,6);
|
||||
|
||||
/* prevent dup mac */
|
||||
if(fs_no == fsid_fcc2)
|
||||
mpc82xx_enet_pdata[fs_no].macaddr[5] ^= 1;
|
||||
|
||||
pdev->dev.platform_data = &mpc82xx_enet_pdata[fs_no];
|
||||
}
|
||||
|
||||
static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev,
|
||||
int idx)
|
||||
{
|
||||
bd_t *bd = (bd_t *) __res;
|
||||
struct fs_uart_platform_info *pinfo;
|
||||
int num = ARRAY_SIZE(mpc8272_uart_pdata);
|
||||
int id = fs_uart_id_scc2fsid(idx);
|
||||
|
||||
/* no need to alter anything if console */
|
||||
if ((id < num) && (!pdev->dev.platform_data)) {
|
||||
pinfo = &mpc8272_uart_pdata[id];
|
||||
pinfo->uart_clk = bd->bi_intfreq;
|
||||
pdev->dev.platform_data = pinfo;
|
||||
}
|
||||
}
|
||||
|
||||
static void init_scc1_uart_ioports(struct fs_uart_platform_info* pdata)
|
||||
{
|
||||
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
|
||||
|
||||
/* SCC1 is only on port D */
|
||||
setbits32(&immap->im_ioport.iop_ppard,0x00000003);
|
||||
clrbits32(&immap->im_ioport.iop_psord,0x00000001);
|
||||
setbits32(&immap->im_ioport.iop_psord,0x00000002);
|
||||
clrbits32(&immap->im_ioport.iop_pdird,0x00000001);
|
||||
setbits32(&immap->im_ioport.iop_pdird,0x00000002);
|
||||
|
||||
/* Wire BRG1 to SCC1 */
|
||||
clrbits32(&immap->im_cpmux.cmx_scr,0x00ffffff);
|
||||
|
||||
iounmap(immap);
|
||||
}
|
||||
|
||||
static void init_scc4_uart_ioports(struct fs_uart_platform_info* pdata)
|
||||
{
|
||||
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
|
||||
|
||||
setbits32(&immap->im_ioport.iop_ppard,0x00000600);
|
||||
clrbits32(&immap->im_ioport.iop_psord,0x00000600);
|
||||
clrbits32(&immap->im_ioport.iop_pdird,0x00000200);
|
||||
setbits32(&immap->im_ioport.iop_pdird,0x00000400);
|
||||
|
||||
/* Wire BRG4 to SCC4 */
|
||||
clrbits32(&immap->im_cpmux.cmx_scr,0x000000ff);
|
||||
setbits32(&immap->im_cpmux.cmx_scr,0x0000001b);
|
||||
|
||||
iounmap(immap);
|
||||
}
|
||||
|
||||
static void __init mpc8272ads_fixup_mdio_pdata(struct platform_device *pdev,
|
||||
int idx)
|
||||
{
|
||||
m82xx_mii_bb_pdata.irq[0] = PHY_INTERRUPT;
|
||||
m82xx_mii_bb_pdata.irq[1] = PHY_POLL;
|
||||
m82xx_mii_bb_pdata.irq[2] = PHY_POLL;
|
||||
m82xx_mii_bb_pdata.irq[3] = PHY_INTERRUPT;
|
||||
m82xx_mii_bb_pdata.irq[31] = PHY_POLL;
|
||||
|
||||
|
||||
m82xx_mii_bb_pdata.mdio_dat.offset =
|
||||
(u32)&cpm2_immr->im_ioport.iop_pdatc;
|
||||
|
||||
m82xx_mii_bb_pdata.mdio_dir.offset =
|
||||
(u32)&cpm2_immr->im_ioport.iop_pdirc;
|
||||
|
||||
m82xx_mii_bb_pdata.mdc_dat.offset =
|
||||
(u32)&cpm2_immr->im_ioport.iop_pdatc;
|
||||
|
||||
|
||||
pdev->dev.platform_data = &m82xx_mii_bb_pdata;
|
||||
}
|
||||
|
||||
static int mpc8272ads_platform_notify(struct device *dev)
|
||||
{
|
||||
static const struct platform_notify_dev_map dev_map[] = {
|
||||
{
|
||||
.bus_id = "fsl-cpm-fcc",
|
||||
.rtn = mpc8272ads_fixup_enet_pdata,
|
||||
},
|
||||
{
|
||||
.bus_id = "fsl-cpm-scc:uart",
|
||||
.rtn = mpc8272ads_fixup_uart_pdata,
|
||||
},
|
||||
{
|
||||
.bus_id = "fsl-bb-mdio",
|
||||
.rtn = mpc8272ads_fixup_mdio_pdata,
|
||||
},
|
||||
{
|
||||
.bus_id = NULL
|
||||
}
|
||||
};
|
||||
platform_notify_map(dev_map,dev);
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
int __init mpc8272ads_init(void)
|
||||
{
|
||||
printk(KERN_NOTICE "mpc8272ads: Init\n");
|
||||
|
||||
platform_notify = mpc8272ads_platform_notify;
|
||||
|
||||
ppc_sys_device_initfunc();
|
||||
|
||||
ppc_sys_device_disable_all();
|
||||
ppc_sys_device_enable(MPC82xx_CPM_FCC1);
|
||||
ppc_sys_device_enable(MPC82xx_CPM_FCC2);
|
||||
|
||||
/* to be ready for console, let's attach pdata here */
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC1
|
||||
ppc_sys_device_setfunc(MPC82xx_CPM_SCC1, PPC_SYS_FUNC_UART);
|
||||
ppc_sys_device_enable(MPC82xx_CPM_SCC1);
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC4
|
||||
ppc_sys_device_setfunc(MPC82xx_CPM_SCC4, PPC_SYS_FUNC_UART);
|
||||
ppc_sys_device_enable(MPC82xx_CPM_SCC4);
|
||||
#endif
|
||||
|
||||
ppc_sys_device_enable(MPC82xx_MDIO_BB);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
To prevent confusion, console selection is gross:
|
||||
by 0 assumed SCC1 and by 1 assumed SCC4
|
||||
*/
|
||||
struct platform_device* early_uart_get_pdev(int index)
|
||||
{
|
||||
bd_t *bd = (bd_t *) __res;
|
||||
struct fs_uart_platform_info *pinfo;
|
||||
|
||||
struct platform_device* pdev = NULL;
|
||||
if(index) { /*assume SCC4 here*/
|
||||
pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
|
||||
pinfo = &mpc8272_uart_pdata[fsid_scc4_uart];
|
||||
} else { /*over SCC1*/
|
||||
pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
|
||||
pinfo = &mpc8272_uart_pdata[fsid_scc1_uart];
|
||||
}
|
||||
|
||||
pinfo->uart_clk = bd->bi_intfreq;
|
||||
pdev->dev.platform_data = pinfo;
|
||||
ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
arch_initcall(mpc8272ads_init);
|
|
@ -1,53 +0,0 @@
|
|||
/*
|
||||
* PQ2ADS platform support
|
||||
*
|
||||
* Author: Kumar Gala <galak@kernel.crashing.org>
|
||||
* Derived from: est8260_setup.c by Allen Curtis
|
||||
*
|
||||
* Copyright 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/mpc8260.h>
|
||||
#include <asm/cpm2.h>
|
||||
#include <asm/immap_cpm2.h>
|
||||
|
||||
void __init
|
||||
m82xx_board_setup(void)
|
||||
{
|
||||
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
|
||||
u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
|
||||
|
||||
/* Enable the 2nd UART port */
|
||||
clrbits32(bcsr, BCSR1_RS232_EN2);
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC1
|
||||
clrbits32((u32*)&immap->im_scc[0].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
|
||||
clrbits32((u32*)&immap->im_scc[0].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC2
|
||||
clrbits32((u32*)&immap->im_scc[1].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
|
||||
clrbits32((u32*)&immap->im_scc[1].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC3
|
||||
clrbits32((u32*)&immap->im_scc[2].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
|
||||
clrbits32((u32*)&immap->im_scc[2].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC4
|
||||
clrbits32((u32*)&immap->im_scc[3].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
|
||||
clrbits32((u32*)&immap->im_scc[3].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
#endif
|
||||
|
||||
iounmap(bcsr);
|
||||
iounmap(immap);
|
||||
}
|
|
@ -1,94 +0,0 @@
|
|||
/*
|
||||
* A collection of structures, addresses, and values associated with
|
||||
* the Motorola MPC8260ADS/MPC8266ADS-PCI boards.
|
||||
* Copied from the RPX-Classic and SBS8260 stuff.
|
||||
*
|
||||
* Copyright (c) 2001 Dan Malek (dan@mvista.com)
|
||||
*/
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __MACH_ADS8260_DEFS
|
||||
#define __MACH_ADS8260_DEFS
|
||||
|
||||
|
||||
#include <asm/ppcboot.h>
|
||||
|
||||
#if defined(CONFIG_ADS8272)
|
||||
#define BOARD_CHIP_NAME "8272"
|
||||
#endif
|
||||
|
||||
/* Memory map is configured by the PROM startup.
|
||||
* We just map a few things we need. The CSR is actually 4 byte-wide
|
||||
* registers that can be accessed as 8-, 16-, or 32-bit values.
|
||||
*/
|
||||
#define CPM_MAP_ADDR ((uint)0xf0000000)
|
||||
#define BCSR_ADDR ((uint)0xf4500000)
|
||||
#define BCSR_SIZE ((uint)(32 * 1024))
|
||||
|
||||
#define BOOTROM_RESTART_ADDR ((uint)0xff000104)
|
||||
|
||||
/* For our show_cpuinfo hooks. */
|
||||
#define CPUINFO_VENDOR "Motorola"
|
||||
#define CPUINFO_MACHINE "PQ2 ADS PowerPC"
|
||||
|
||||
/* The ADS8260 has 16, 32-bit wide control/status registers, accessed
|
||||
* only on word boundaries.
|
||||
* Not all are used (yet), or are interesting to us (yet).
|
||||
*/
|
||||
|
||||
/* Things of interest in the CSR.
|
||||
*/
|
||||
#define BCSR0_LED0 ((uint)0x02000000) /* 0 == on */
|
||||
#define BCSR0_LED1 ((uint)0x01000000) /* 0 == on */
|
||||
#define BCSR1_FETHIEN ((uint)0x08000000) /* 0 == enable */
|
||||
#define BCSR1_FETH_RST ((uint)0x04000000) /* 0 == reset */
|
||||
#define BCSR1_RS232_EN1 ((uint)0x02000000) /* 0 == enable */
|
||||
#define BCSR1_RS232_EN2 ((uint)0x01000000) /* 0 == enable */
|
||||
#define BCSR3_FETHIEN2 ((uint)0x10000000) /* 0 == enable */
|
||||
#define BCSR3_FETH2_RST ((uint)0x80000000) /* 0 == reset */
|
||||
|
||||
#define PHY_INTERRUPT SIU_INT_IRQ7
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
/* PCI interrupt controller */
|
||||
#define PCI_INT_STAT_REG 0xF8200000
|
||||
#define PCI_INT_MASK_REG 0xF8200004
|
||||
#define PIRQA (NR_CPM_INTS + 0)
|
||||
#define PIRQB (NR_CPM_INTS + 1)
|
||||
#define PIRQC (NR_CPM_INTS + 2)
|
||||
#define PIRQD (NR_CPM_INTS + 3)
|
||||
|
||||
/*
|
||||
* PCI memory map definitions for MPC8266ADS-PCI.
|
||||
*
|
||||
* processor view
|
||||
* local address PCI address target
|
||||
* 0x80000000-0x9FFFFFFF 0x80000000-0x9FFFFFFF PCI mem with prefetch
|
||||
* 0xA0000000-0xBFFFFFFF 0xA0000000-0xBFFFFFFF PCI mem w/o prefetch
|
||||
* 0xF4000000-0xF7FFFFFF 0x00000000-0x03FFFFFF PCI IO
|
||||
*
|
||||
* PCI master view
|
||||
* local address PCI address target
|
||||
* 0x00000000-0x1FFFFFFF 0x00000000-0x1FFFFFFF MPC8266 local memory
|
||||
*/
|
||||
|
||||
/* All the other PCI memory map definitions reside at syslib/m82xx_pci.h
|
||||
Here we should redefine what is unique for this board */
|
||||
#define M82xx_PCI_SLAVE_MEM_LOCAL 0x00000000 /* Local base */
|
||||
#define M82xx_PCI_SLAVE_MEM_BUS 0x00000000 /* PCI base */
|
||||
#define M82xx_PCI_SLAVE_MEM_SIZE 0x10000000 /* 256 Mb */
|
||||
|
||||
#define M82xx_PCI_SLAVE_SEC_WND_SIZE ~(0x40000000 - 1U) /* 2 x 512Mb */
|
||||
#define M82xx_PCI_SLAVE_SEC_WND_BASE 0x80000000 /* PCI Memory base */
|
||||
|
||||
#if defined(CONFIG_ADS8272)
|
||||
#define PCI_INT_TO_SIU SIU_INT_IRQ2
|
||||
#elif defined(CONFIG_PQ2FADS)
|
||||
#define PCI_INT_TO_SIU SIU_INT_IRQ6
|
||||
#else
|
||||
#warning PCI Bridge will be without interrupts support
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
#endif /* __MACH_ADS8260_DEFS */
|
||||
#endif /* __KERNEL__ */
|
|
@ -1,32 +0,0 @@
|
|||
#ifndef __PQ2ADS_PD_H
|
||||
#define __PQ2ADS_PD_H
|
||||
/*
|
||||
* arch/ppc/platforms/82xx/pq2ads_pd.h
|
||||
*
|
||||
* Some defines for MPC82xx board-specific PlatformDevice descriptions
|
||||
*
|
||||
* 2005 (c) MontaVista Software, Inc.
|
||||
* Vitaly Bordug <vbordug@ru.mvista.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
/* FCC1 Clock Source Configuration. These can be redefined in the board specific file.
|
||||
Can only choose from CLK9-12 */
|
||||
|
||||
#define F1_RXCLK 11
|
||||
#define F1_TXCLK 10
|
||||
|
||||
/* FCC2 Clock Source Configuration. These can be redefined in the board specific file.
|
||||
Can only choose from CLK13-16 */
|
||||
#define F2_RXCLK 15
|
||||
#define F2_TXCLK 16
|
||||
|
||||
/* FCC3 Clock Source Configuration. These can be redefined in the board specific file.
|
||||
Can only choose from CLK13-16 */
|
||||
#define F3_RXCLK 13
|
||||
#define F3_TXCLK 14
|
||||
|
||||
#endif
|
|
@ -175,12 +175,6 @@ m8260_init_IRQ(void)
|
|||
* in case the boot rom changed something on us.
|
||||
*/
|
||||
cpm2_immr->im_intctl.ic_siprr = 0x05309770;
|
||||
|
||||
#if defined(CONFIG_PCI) && (defined(CONFIG_ADS8272) || defined(CONFIG_PQ2FADS))
|
||||
/* Initialize stuff for the 82xx CPLD IC and install demux */
|
||||
pq2pci_init_irq();
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -150,14 +150,6 @@ pq2pci_init_irq(void)
|
|||
{
|
||||
int irq;
|
||||
volatile cpm2_map_t *immap = cpm2_immr;
|
||||
#if defined CONFIG_ADS8272
|
||||
/* configure chip select for PCI interrupt controller */
|
||||
immap->im_memctl.memc_br3 = PCI_INT_STAT_REG | 0x00001801;
|
||||
immap->im_memctl.memc_or3 = 0xffff8010;
|
||||
#elif defined CONFIG_PQ2FADS
|
||||
immap->im_memctl.memc_br8 = PCI_INT_STAT_REG | 0x00001801;
|
||||
immap->im_memctl.memc_or8 = 0xffff8010;
|
||||
#endif
|
||||
for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++)
|
||||
irq_desc[irq].chip = &pq2pci_ic;
|
||||
|
||||
|
@ -222,26 +214,6 @@ pq2ads_setup_pci(struct pci_controller *hose)
|
|||
immap->im_memctl.memc_pcibr1 = M82xx_PCI_SEC_WND_BASE | PCIBR_ENABLE;
|
||||
#endif
|
||||
|
||||
#if defined CONFIG_ADS8272
|
||||
immap->im_siu_conf.siu_82xx.sc_siumcr =
|
||||
(immap->im_siu_conf.siu_82xx.sc_siumcr &
|
||||
~(SIUMCR_BBD | SIUMCR_ESE | SIUMCR_PBSE |
|
||||
SIUMCR_CDIS | SIUMCR_DPPC11 | SIUMCR_L2CPC11 |
|
||||
SIUMCR_LBPC11 | SIUMCR_APPC11 |
|
||||
SIUMCR_CS10PC11 | SIUMCR_BCTLC11 | SIUMCR_MMR11)) |
|
||||
SIUMCR_DPPC11 | SIUMCR_L2CPC01 | SIUMCR_LBPC00 |
|
||||
SIUMCR_APPC10 | SIUMCR_CS10PC00 |
|
||||
SIUMCR_BCTLC00 | SIUMCR_MMR11 ;
|
||||
|
||||
#elif defined CONFIG_PQ2FADS
|
||||
/*
|
||||
* Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
|
||||
* and local bus for PCI (SIUMCR [LBPC]).
|
||||
*/
|
||||
immap->im_siu_conf.siu_82xx.sc_siumcr = (immap->im_siu_conf.siu_82xx.sc_siumcr &
|
||||
~(SIUMCR_L2CPC11 | SIUMCR_LBPC11 | SIUMCR_CS10PC11 | SIUMCR_APPC11) |
|
||||
SIUMCR_BBD | SIUMCR_LBPC01 | SIUMCR_DPPC11 | SIUMCR_APPC10);
|
||||
#endif
|
||||
/* Enable PCI */
|
||||
immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN);
|
||||
|
||||
|
@ -284,12 +256,6 @@ pq2ads_setup_pci(struct pci_controller *hose)
|
|||
immap->im_pci.pci_pibar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_BUS >> PITA_ADDR_SHIFT);
|
||||
immap->im_pci.pci_pitar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_LOCAL>> PITA_ADDR_SHIFT);
|
||||
|
||||
#if defined CONFIG_ADS8272
|
||||
/* PCI int highest prio */
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x01236745;
|
||||
#elif defined CONFIG_PQ2FADS
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x03124567;
|
||||
#endif
|
||||
/* park bus on PCI */
|
||||
immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI;
|
||||
|
||||
|
@ -320,10 +286,6 @@ void __init pq2_find_bridges(void)
|
|||
hose->bus_offset = 0;
|
||||
hose->last_busno = 0xff;
|
||||
|
||||
#ifdef CONFIG_ADS8272
|
||||
hose->set_cfg_type = 1;
|
||||
#endif
|
||||
|
||||
setup_m8260_indirect_pci(hose,
|
||||
(unsigned long)&cpm2_immr->im_pci.pci_cfg_addr,
|
||||
(unsigned long)&cpm2_immr->im_pci.pci_cfg_data);
|
||||
|
|
|
@ -35,10 +35,6 @@
|
|||
#include <platforms/tqm8260.h>
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PQ2ADS) || defined (CONFIG_PQ2FADS)
|
||||
#include <platforms/pq2ads.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_8260
|
||||
#include <syslib/m82xx_pci.h>
|
||||
#endif
|
||||
|
|
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