ARM: at91: fix at91_extern_irq usage for non-dt boards
Since 4b68520dc0ec96153bc0d87bca5ffba508edfcf ARM: at91: add AIC5 support we allocate the at91_extern_irq. This patch makes it static and stores the non-dt extern irq in the soc structure. It is then possible to use a at91_get_extern_irq() function to get the value for outside of the irq driver. It is useful for passing its value to at91_aic_init(). Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> [nicolas.ferre@atmel.com: rework commit message] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD
Nicolas Ferre
Родитель
133e00116b
Коммит
546c830c90
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@ -332,10 +332,6 @@ static void __init at91rm9200_initialize(void)
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{
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arm_pm_idle = at91rm9200_idle;
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arm_pm_restart = at91rm9200_restart;
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at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
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| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
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| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
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| (1 << AT91RM9200_ID_IRQ6);
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/* Initialize GPIO subsystem */
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at91_gpio_init(at91rm9200_gpio,
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@ -388,6 +384,10 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
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AT91_SOC_START(at91rm9200)
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.map_io = at91rm9200_map_io,
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.default_irq_priority = at91rm9200_default_irq_priority,
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.extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
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| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
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| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
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| (1 << AT91RM9200_ID_IRQ6),
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.ioremap_registers = at91rm9200_ioremap_registers,
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.register_clocks = at91rm9200_register_clocks,
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.init = at91rm9200_initialize,
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@ -348,8 +348,6 @@ static void __init at91sam9260_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9_alt_restart;
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at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
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| (1 << AT91SAM9260_ID_IRQ2);
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/* Register GPIO subsystem */
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at91_gpio_init(at91sam9260_gpio, 3);
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@ -400,6 +398,8 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
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AT91_SOC_START(at91sam9260)
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.map_io = at91sam9260_map_io,
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.default_irq_priority = at91sam9260_default_irq_priority,
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.extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
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| (1 << AT91SAM9260_ID_IRQ2),
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.ioremap_registers = at91sam9260_ioremap_registers,
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.register_clocks = at91sam9260_register_clocks,
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.init = at91sam9260_initialize,
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@ -290,8 +290,6 @@ static void __init at91sam9261_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9_alt_restart;
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at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
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| (1 << AT91SAM9261_ID_IRQ2);
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/* Register GPIO subsystem */
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at91_gpio_init(at91sam9261_gpio, 3);
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@ -342,6 +340,8 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
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AT91_SOC_START(at91sam9261)
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.map_io = at91sam9261_map_io,
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.default_irq_priority = at91sam9261_default_irq_priority,
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.extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
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| (1 << AT91SAM9261_ID_IRQ2),
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.ioremap_registers = at91sam9261_ioremap_registers,
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.register_clocks = at91sam9261_register_clocks,
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.init = at91sam9261_initialize,
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@ -327,7 +327,6 @@ static void __init at91sam9263_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9_alt_restart;
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at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
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/* Register GPIO subsystem */
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at91_gpio_init(at91sam9263_gpio, 5);
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@ -378,6 +377,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
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AT91_SOC_START(at91sam9263)
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.map_io = at91sam9263_map_io,
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.default_irq_priority = at91sam9263_default_irq_priority,
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.extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1),
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.ioremap_registers = at91sam9263_ioremap_registers,
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.register_clocks = at91sam9263_register_clocks,
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.init = at91sam9263_initialize,
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@ -374,7 +374,6 @@ static void __init at91sam9g45_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9g45_restart;
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at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
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/* Register GPIO subsystem */
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at91_gpio_init(at91sam9g45_gpio, 5);
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@ -425,6 +424,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
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AT91_SOC_START(at91sam9g45)
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.map_io = at91sam9g45_map_io,
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.default_irq_priority = at91sam9g45_default_irq_priority,
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.extern_irq = (1 << AT91SAM9G45_ID_IRQ0),
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.ioremap_registers = at91sam9g45_ioremap_registers,
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.register_clocks = at91sam9g45_register_clocks,
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.init = at91sam9g45_initialize,
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@ -293,7 +293,6 @@ static void __init at91sam9rl_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9_alt_restart;
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at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
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/* Register GPIO subsystem */
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at91_gpio_init(at91sam9rl_gpio, 4);
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@ -344,6 +343,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
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AT91_SOC_START(at91sam9rl)
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.map_io = at91sam9rl_map_io,
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.default_irq_priority = at91sam9rl_default_irq_priority,
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.extern_irq = (1 << AT91SAM9RL_ID_IRQ0),
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.ioremap_registers = at91sam9rl_ioremap_registers,
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.register_clocks = at91sam9rl_register_clocks,
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.init = at91sam9rl_initialize,
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@ -55,8 +55,6 @@ static void at91x40_idle(void)
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void __init at91x40_initialize(unsigned long main_clock)
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{
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arm_pm_idle = at91x40_idle;
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at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
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| (1 << AT91X40_ID_IRQ2);
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}
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/*
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@ -86,9 +84,10 @@ static unsigned int at91x40_default_irq_priority[NR_AIC_IRQS] __initdata = {
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void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS])
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{
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u32 extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
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| (1 << AT91X40_ID_IRQ2);
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if (!priority)
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priority = at91x40_default_irq_priority;
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at91_aic_init(priority, at91_extern_irq);
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at91_aic_init(priority, extern_irq);
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}
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@ -85,4 +85,4 @@ extern void __init at91_gpio_irq_setup(void);
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extern int __init at91_gpio_of_irq_setup(struct device_node *node,
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struct device_node *parent);
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extern int at91_extern_irq;
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extern u32 at91_get_extern_irq(void);
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@ -232,7 +232,14 @@ static void __maybe_unused at91_aic5_eoi(struct irq_data *d)
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at91_aic_write(AT91_AIC5_EOICR, 0);
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}
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unsigned long *at91_extern_irq;
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static unsigned long *at91_extern_irq;
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u32 at91_get_extern_irq(void)
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{
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if (!at91_extern_irq)
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return 0;
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return *at91_extern_irq;
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}
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#define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq)
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@ -212,7 +212,7 @@ static int at91_pm_enter(suspend_state_t state)
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(at91_pmc_read(AT91_PMC_PCSR)
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| (1 << AT91_ID_FIQ)
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| (1 << AT91_ID_SYS)
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| (at91_extern_irq))
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| (at91_get_extern_irq()))
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& at91_aic_read(AT91_AIC_IMR),
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state);
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@ -48,7 +48,7 @@ void __init at91_init_irq_default(void)
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void __init at91_init_interrupts(unsigned int *priority)
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{
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/* Initialize the AIC interrupt controller */
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at91_aic_init(priority, at91_extern_irq);
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at91_aic_init(priority, at91_boot_soc.extern_irq);
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/* Enable GPIO interrupts */
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at91_gpio_irq_setup();
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@ -6,6 +6,7 @@
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struct at91_init_soc {
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int builtin;
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u32 extern_irq;
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unsigned int *default_irq_priority;
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void (*map_io)(void);
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void (*ioremap_registers)(void);
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