From 54b384634f7083bcacf9a9ed2e6f4c3d0a246e49 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 6 Dec 2010 00:12:45 +0000 Subject: [PATCH] mmc, sh: Remove sh_mmcif_boot_slurp() As the only caller of sh_mmcif_boot_do_read() is sh_mmcif_boot_slurp() the configuration portion of sh_mmcif_boot_slurp() can be merged into sh_mmcif_boot_do_read(). Once this is done sh_mmcif_boot_slurp() is only a call to sh_mmcif_boot_do_read() with platform specific information - the offset that images are stored on MMC. So make the sh_mmcif_boot_do_read() call directly from platform code and remove sh_mmcif_boot_slurp() altogether. Cc: Magnus Damm Signed-off-by: Simon Horman Signed-off-by: Paul Mundt --- arch/sh/boot/romimage/mmcif-sh7724.c | 4 +++- include/linux/mmc/sh_mmcif.h | 34 +++++++++------------------- 2 files changed, 14 insertions(+), 24 deletions(-) diff --git a/arch/sh/boot/romimage/mmcif-sh7724.c b/arch/sh/boot/romimage/mmcif-sh7724.c index 16b9c6fa7ded..c84e7831018d 100644 --- a/arch/sh/boot/romimage/mmcif-sh7724.c +++ b/arch/sh/boot/romimage/mmcif-sh7724.c @@ -60,7 +60,9 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes) mmcif_update_progress(MMCIF_PROGRESS_LOAD); /* load kernel via MMCIF interface */ - sh_mmcif_boot_slurp(MMCIF_BASE, buf, no_bytes); + sh_mmcif_boot_do_read(MMCIF_BASE, 512, + (no_bytes + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS, + buf); /* disable clock to the MMCIF hardware block */ __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2); diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h index 6a98e97c49f8..cfcc6e320e2f 100644 --- a/include/linux/mmc/sh_mmcif.h +++ b/include/linux/mmc/sh_mmcif.h @@ -162,6 +162,17 @@ static inline int sh_mmcif_boot_do_read(void __iomem *base, unsigned long k; int ret = 0; + /* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */ + sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL, + CLK_ENABLE | CLKDIV_4 | SRSPTO_256 | + SRBSYTO_29 | SRWDTO_29 | SCCSTO_29); + + /* CMD9 - Get CSD */ + sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000); + + /* CMD7 - Select the card */ + sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000); + /* CMD16 - Set the block size */ sh_mmcif_boot_cmd(base, 0x10400000, SH_MMCIF_BBS); @@ -205,27 +216,4 @@ static inline void sh_mmcif_boot_init(void __iomem *base) sh_mmcif_boot_cmd(base, 0x03400040, 0x00010000); } -static inline void sh_mmcif_boot_slurp(void __iomem *base, - unsigned char *buf, - unsigned long no_bytes) -{ - unsigned long tmp; - - /* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */ - sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL, - CLK_ENABLE | CLKDIV_4 | SRSPTO_256 | - SRBSYTO_29 | SRWDTO_29 | SCCSTO_29); - - /* CMD9 - Get CSD */ - sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000); - - /* CMD7 - Select the card */ - sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000); - - tmp = no_bytes / SH_MMCIF_BBS; - tmp += (no_bytes % SH_MMCIF_BBS) ? 1 : 0; - - sh_mmcif_boot_do_read(base, 512, tmp, buf); -} - #endif /* __SH_MMCIF_H__ */