i40e: Fix ethtool rx-flow-hash setting for X722
When enabling flow type for RSS hash via ethtool:
ethtool -N $pf rx-flow-hash tcp4|tcp6|udp4|udp6 s|d
the driver would fail to setup this setting on X722
device since it was using the mask on the register
dedicated for X710 devices.
Apply a different mask on the register when setting the
RSS hash for the X722 device.
When displaying the flow types enabled via ethtool:
ethtool -n $pf rx-flow-hash tcp4|tcp6|udp4|udp6
the driver would print wrong values for X722 device.
Fix this issue by testing masks for X722 device in
i40e_get_rss_hash_opts function.
Fixes: eb0dd6e4a3
("i40e: Allow RSS Hash set with less than four parameters")
Signed-off-by: Slawomir Laba <slawomirx.laba@intel.com>
Signed-off-by: Michal Jaron <michalx.jaron@intel.com>
Signed-off-by: Mateusz Palczewski <mateusz.palczewski@intel.com>
Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Link: https://lore.kernel.org/r/20221024100526.1874914-1-jacob.e.keller@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Родитель
d89d7ff012
Коммит
54b5af5a43
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@ -3185,10 +3185,17 @@ static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
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if (cmd->flow_type == TCP_V4_FLOW ||
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cmd->flow_type == UDP_V4_FLOW) {
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if (i_set & I40E_L3_SRC_MASK)
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cmd->data |= RXH_IP_SRC;
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if (i_set & I40E_L3_DST_MASK)
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cmd->data |= RXH_IP_DST;
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if (hw->mac.type == I40E_MAC_X722) {
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if (i_set & I40E_X722_L3_SRC_MASK)
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cmd->data |= RXH_IP_SRC;
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if (i_set & I40E_X722_L3_DST_MASK)
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cmd->data |= RXH_IP_DST;
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} else {
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if (i_set & I40E_L3_SRC_MASK)
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cmd->data |= RXH_IP_SRC;
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if (i_set & I40E_L3_DST_MASK)
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cmd->data |= RXH_IP_DST;
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}
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} else if (cmd->flow_type == TCP_V6_FLOW ||
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cmd->flow_type == UDP_V6_FLOW) {
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if (i_set & I40E_L3_V6_SRC_MASK)
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@ -3546,12 +3553,15 @@ static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
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/**
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* i40e_get_rss_hash_bits - Read RSS Hash bits from register
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* @hw: hw structure
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* @nfc: pointer to user request
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* @i_setc: bits currently set
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*
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* Returns value of bits to be set per user request
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**/
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static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)
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static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw,
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struct ethtool_rxnfc *nfc,
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u64 i_setc)
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{
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u64 i_set = i_setc;
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u64 src_l3 = 0, dst_l3 = 0;
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@ -3570,8 +3580,13 @@ static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)
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dst_l3 = I40E_L3_V6_DST_MASK;
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} else if (nfc->flow_type == TCP_V4_FLOW ||
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nfc->flow_type == UDP_V4_FLOW) {
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src_l3 = I40E_L3_SRC_MASK;
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dst_l3 = I40E_L3_DST_MASK;
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if (hw->mac.type == I40E_MAC_X722) {
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src_l3 = I40E_X722_L3_SRC_MASK;
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dst_l3 = I40E_X722_L3_DST_MASK;
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} else {
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src_l3 = I40E_L3_SRC_MASK;
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dst_l3 = I40E_L3_DST_MASK;
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}
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} else {
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/* Any other flow type are not supported here */
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return i_set;
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@ -3686,7 +3701,7 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
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flow_pctype)) |
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((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
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flow_pctype)) << 32);
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i_set = i40e_get_rss_hash_bits(nfc, i_setc);
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i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc);
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i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype),
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(u32)i_set);
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i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),
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@ -1404,6 +1404,10 @@ struct i40e_lldp_variables {
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#define I40E_PFQF_CTL_0_HASHLUTSIZE_512 0x00010000
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/* INPUT SET MASK for RSS, flow director, and flexible payload */
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#define I40E_X722_L3_SRC_SHIFT 49
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#define I40E_X722_L3_SRC_MASK (0x3ULL << I40E_X722_L3_SRC_SHIFT)
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#define I40E_X722_L3_DST_SHIFT 41
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#define I40E_X722_L3_DST_MASK (0x3ULL << I40E_X722_L3_DST_SHIFT)
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#define I40E_L3_SRC_SHIFT 47
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#define I40E_L3_SRC_MASK (0x3ULL << I40E_L3_SRC_SHIFT)
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#define I40E_L3_V6_SRC_SHIFT 43
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