ALSA: hda/realtek - Use tables for batch COEF writes/updtes
There are many codes doing writes or updates COEF verbs sequentially in a batch. Rewrite such open codes with tables for optimization. Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Takashi Iwai
Родитель
98b2488394
Коммит
54db6c3949
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@ -179,6 +179,32 @@ static unsigned int alc_get_coef0(struct hda_codec *codec)
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return spec->coef0;
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}
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/* coef writes/updates batch */
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struct coef_fw {
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unsigned char nid;
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unsigned char idx;
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unsigned short mask;
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unsigned short val;
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};
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#define UPDATE_COEFEX(_nid, _idx, _mask, _val) \
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{ .nid = (_nid), .idx = (_idx), .mask = (_mask), .val = (_val) }
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#define WRITE_COEFEX(_nid, _idx, _val) UPDATE_COEFEX(_nid, _idx, -1, _val)
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#define WRITE_COEF(_idx, _val) WRITE_COEFEX(0x20, _idx, _val)
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#define UPDATE_COEF(_idx, _mask, _val) UPDATE_COEFEX(0x20, _idx, _mask, _val)
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static void alc_process_coef_fw(struct hda_codec *codec,
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const struct coef_fw *fw)
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{
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for (; fw->nid; fw++) {
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if (fw->mask == (unsigned short)-1)
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alc_write_coefex_idx(codec, fw->nid, fw->idx, fw->val);
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else
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alc_update_coefex_idx(codec, fw->nid, fw->idx,
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fw->mask, fw->val);
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}
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}
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/*
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* Append the given mixer and verb elements for the later use
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* The mixer array is referred in build_controls(), and init_verbs are
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@ -2787,66 +2813,42 @@ static void alc269_shutup(struct hda_codec *codec)
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snd_hda_shutup_pins(codec);
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}
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static struct coef_fw alc282_coefs[] = {
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WRITE_COEF(0x03, 0x0002), /* Power Down Control */
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WRITE_COEF(0x05, 0x0700), /* FIFO and filter clock */
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WRITE_COEF(0x07, 0x0200), /* DMIC control */
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UPDATE_COEF(0x06, 0x00f0, 0), /* Analog clock */
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UPDATE_COEF(0x08, 0xfffc, 0x0c2c), /* JD */
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WRITE_COEF(0x0a, 0xcccc), /* JD offset1 */
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WRITE_COEF(0x0b, 0xcccc), /* JD offset2 */
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WRITE_COEF(0x0e, 0x6e00), /* LDO1/2/3, DAC/ADC */
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UPDATE_COEF(0x0f, 0xf800, 0x1000), /* JD */
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UPDATE_COEF(0x10, 0xfc00, 0x0c00), /* Capless */
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WRITE_COEF(0x6f, 0x0), /* Class D test 4 */
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UPDATE_COEF(0x0c, 0xfe00, 0), /* IO power down directly */
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WRITE_COEF(0x34, 0xa0c0), /* ANC */
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UPDATE_COEF(0x16, 0x0008, 0), /* AGC MUX */
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UPDATE_COEF(0x1d, 0x00e0, 0), /* DAC simple content protection */
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UPDATE_COEF(0x1f, 0x00e0, 0), /* ADC simple content protection */
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WRITE_COEF(0x21, 0x8804), /* DAC ADC Zero Detection */
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WRITE_COEF(0x63, 0x2902), /* PLL */
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WRITE_COEF(0x68, 0xa080), /* capless control 2 */
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WRITE_COEF(0x69, 0x3400), /* capless control 3 */
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WRITE_COEF(0x6a, 0x2f3e), /* capless control 4 */
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WRITE_COEF(0x6b, 0x0), /* capless control 5 */
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UPDATE_COEF(0x6d, 0x0fff, 0x0900), /* class D test 2 */
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WRITE_COEF(0x6e, 0x110a), /* class D test 3 */
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UPDATE_COEF(0x70, 0x00f8, 0x00d8), /* class D test 5 */
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WRITE_COEF(0x71, 0x0014), /* class D test 6 */
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WRITE_COEF(0x72, 0xc2ba), /* classD OCP */
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UPDATE_COEF(0x77, 0x0f80, 0), /* classD pure DC test */
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WRITE_COEF(0x6c, 0xfc06), /* Class D amp control */
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{}
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};
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static void alc282_restore_default_value(struct hda_codec *codec)
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{
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/* Power Down Control */
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alc_write_coef_idx(codec, 0x03, 0x0002);
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/* FIFO and filter clock */
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alc_write_coef_idx(codec, 0x05, 0x0700);
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/* DMIC control */
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alc_write_coef_idx(codec, 0x07, 0x0200);
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/* Analog clock */
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alc_update_coef_idx(codec, 0x06, 0x00f0, 0);
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/* JD */
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alc_update_coef_idx(codec, 0x08, 0xfffc, 0x0c2c);
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/* JD offset1 */
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alc_write_coef_idx(codec, 0x0a, 0xcccc);
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/* JD offset2 */
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alc_write_coef_idx(codec, 0x0b, 0xcccc);
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/* LDO1/2/3, DAC/ADC */
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alc_write_coef_idx(codec, 0x0e, 0x6e00);
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/* JD */
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alc_update_coef_idx(codec, 0x0f, 0xf800, 0x1000);
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/* Capless */
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alc_update_coef_idx(codec, 0x10, 0xfc00, 0x0c00);
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/* Class D test 4 */
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alc_write_coef_idx(codec, 0x6f, 0x0);
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/* IO power down directly */
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alc_update_coef_idx(codec, 0x0c, 0xfe00, 0);
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/* ANC */
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alc_write_coef_idx(codec, 0x34, 0xa0c0);
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/* AGC MUX */
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alc_update_coef_idx(codec, 0x16, 0x0008, 0);
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/* DAC simple content protection */
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alc_update_coef_idx(codec, 0x1d, 0x00e0, 0);
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/* ADC simple content protection */
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alc_update_coef_idx(codec, 0x1f, 0x00e0, 0);
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/* DAC ADC Zero Detection */
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alc_write_coef_idx(codec, 0x21, 0x8804);
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/* PLL */
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alc_write_coef_idx(codec, 0x63, 0x2902);
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/* capless control 2 */
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alc_write_coef_idx(codec, 0x68, 0xa080);
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/* capless control 3 */
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alc_write_coef_idx(codec, 0x69, 0x3400);
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/* capless control 4 */
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alc_write_coef_idx(codec, 0x6a, 0x2f3e);
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/* capless control 5 */
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alc_write_coef_idx(codec, 0x6b, 0x0);
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/* class D test 2 */
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alc_update_coef_idx(codec, 0x6d, 0x0fff, 0x0900);
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/* class D test 3 */
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alc_write_coef_idx(codec, 0x6e, 0x110a);
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/* class D test 5 */
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alc_update_coef_idx(codec, 0x70, 0x00f8, 0x00d8);
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/* class D test 6 */
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alc_write_coef_idx(codec, 0x71, 0x0014);
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/* classD OCP */
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alc_write_coef_idx(codec, 0x72, 0xc2ba);
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/* classD pure DC test */
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alc_update_coef_idx(codec, 0x77, 0x0f80, 0);
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/* Class D amp control */
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alc_write_coef_idx(codec, 0x6c, 0xfc06);
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alc_process_coef_fw(codec, alc282_coefs);
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}
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static void alc282_init(struct hda_codec *codec)
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@ -2922,72 +2924,45 @@ static void alc282_shutup(struct hda_codec *codec)
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alc_write_coef_idx(codec, 0x78, coef78);
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}
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static struct coef_fw alc283_coefs[] = {
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WRITE_COEF(0x03, 0x0002), /* Power Down Control */
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WRITE_COEF(0x05, 0x0700), /* FIFO and filter clock */
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WRITE_COEF(0x07, 0x0200), /* DMIC control */
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UPDATE_COEF(0x06, 0x00f0, 0), /* Analog clock */
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UPDATE_COEF(0x08, 0xfffc, 0x0c2c), /* JD */
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WRITE_COEF(0x0a, 0xcccc), /* JD offset1 */
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WRITE_COEF(0x0b, 0xcccc), /* JD offset2 */
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WRITE_COEF(0x0e, 0x6fc0), /* LDO1/2/3, DAC/ADC */
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UPDATE_COEF(0x0f, 0xf800, 0x1000), /* JD */
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UPDATE_COEF(0x10, 0xfc00, 0x0c00), /* Capless */
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WRITE_COEF(0x3a, 0x0), /* Class D test 4 */
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UPDATE_COEF(0x0c, 0xfe00, 0x0), /* IO power down directly */
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WRITE_COEF(0x22, 0xa0c0), /* ANC */
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UPDATE_COEFEX(0x53, 0x01, 0x000f, 0x0008), /* AGC MUX */
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UPDATE_COEF(0x1d, 0x00e0, 0), /* DAC simple content protection */
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UPDATE_COEF(0x1f, 0x00e0, 0), /* ADC simple content protection */
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WRITE_COEF(0x21, 0x8804), /* DAC ADC Zero Detection */
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WRITE_COEF(0x2e, 0x2902), /* PLL */
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WRITE_COEF(0x33, 0xa080), /* capless control 2 */
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WRITE_COEF(0x34, 0x3400), /* capless control 3 */
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WRITE_COEF(0x35, 0x2f3e), /* capless control 4 */
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WRITE_COEF(0x36, 0x0), /* capless control 5 */
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UPDATE_COEF(0x38, 0x0fff, 0x0900), /* class D test 2 */
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WRITE_COEF(0x39, 0x110a), /* class D test 3 */
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UPDATE_COEF(0x3b, 0x00f8, 0x00d8), /* class D test 5 */
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WRITE_COEF(0x3c, 0x0014), /* class D test 6 */
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WRITE_COEF(0x3d, 0xc2ba), /* classD OCP */
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UPDATE_COEF(0x42, 0x0f80, 0x0), /* classD pure DC test */
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WRITE_COEF(0x49, 0x0), /* test mode */
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UPDATE_COEF(0x40, 0xf800, 0x9800), /* Class D DC enable */
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UPDATE_COEF(0x42, 0xf000, 0x2000), /* DC offset */
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WRITE_COEF(0x37, 0xfc06), /* Class D amp control */
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{}
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};
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static void alc283_restore_default_value(struct hda_codec *codec)
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{
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/* Power Down Control */
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alc_write_coef_idx(codec, 0x03, 0x0002);
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/* FIFO and filter clock */
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alc_write_coef_idx(codec, 0x05, 0x0700);
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/* DMIC control */
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alc_write_coef_idx(codec, 0x07, 0x0200);
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/* Analog clock */
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alc_update_coef_idx(codec, 0x06, 0x00f0, 0);
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/* JD */
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alc_update_coef_idx(codec, 0x08, 0xfffc, 0x0c2c);
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/* JD offset1 */
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alc_write_coef_idx(codec, 0x0a, 0xcccc);
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/* JD offset2 */
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alc_write_coef_idx(codec, 0x0b, 0xcccc);
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/* LDO1/2/3, DAC/ADC */
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alc_write_coef_idx(codec, 0x0e, 0x6fc0);
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/* JD */
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alc_update_coef_idx(codec, 0x0f, 0xf800, 0x1000);
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/* Capless */
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alc_update_coef_idx(codec, 0x10, 0xfc00, 0x0c00);
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/* Class D test 4 */
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alc_write_coef_idx(codec, 0x3a, 0x0);
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/* IO power down directly */
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alc_update_coef_idx(codec, 0x0c, 0xfe00, 0x0);
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/* ANC */
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alc_write_coef_idx(codec, 0x22, 0xa0c0);
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/* AGC MUX */
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alc_update_coefex_idx(codec, 0x53, 0x01, 0x000f, 0x0008);
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/* DAC simple content protection */
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alc_update_coef_idx(codec, 0x1d, 0x00e0, 0x0);
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/* ADC simple content protection */
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alc_update_coef_idx(codec, 0x1f, 0x00e0, 0x0);
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/* DAC ADC Zero Detection */
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alc_write_coef_idx(codec, 0x21, 0x8804);
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/* PLL */
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alc_write_coef_idx(codec, 0x2e, 0x2902);
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/* capless control 2 */
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alc_write_coef_idx(codec, 0x33, 0xa080);
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/* capless control 3 */
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alc_write_coef_idx(codec, 0x34, 0x3400);
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/* capless control 4 */
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alc_write_coef_idx(codec, 0x35, 0x2f3e);
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/* capless control 5 */
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alc_write_coef_idx(codec, 0x36, 0x0);
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/* class D test 2 */
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alc_update_coef_idx(codec, 0x38, 0x0fff, 0x0900);
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/* class D test 3 */
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alc_write_coef_idx(codec, 0x39, 0x110a);
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/* class D test 5 */
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alc_update_coef_idx(codec, 0x3b, 0x00f8, 0x00d8);
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/* class D test 6 */
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alc_write_coef_idx(codec, 0x3c, 0x0014);
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/* classD OCP */
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alc_write_coef_idx(codec, 0x3d, 0xc2ba);
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/* classD pure DC test */
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alc_update_coef_idx(codec, 0x42, 0x0f80, 0x0);
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/* test mode */
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alc_write_coef_idx(codec, 0x49, 0x0);
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/* Class D DC enable */
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alc_update_coef_idx(codec, 0x40, 0xf800, 0x9800);
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/* DC offset */
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alc_update_coef_idx(codec, 0x42, 0xf000, 0x2000);
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/* Class D amp control */
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alc_write_coef_idx(codec, 0x37, 0xfc06);
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alc_process_coef_fw(codec, alc283_coefs);
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}
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static void alc283_init(struct hda_codec *codec)
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@ -3530,52 +3505,62 @@ static void alc269_fixup_hp_line1_mic1_led(struct hda_codec *codec,
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static void alc_headset_mode_unplugged(struct hda_codec *codec)
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{
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static struct coef_fw coef0255[] = {
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WRITE_COEF(0x1b, 0x0c0b), /* LDO and MISC control */
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WRITE_COEF(0x45, 0xd089), /* UAJ function set to menual mode */
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UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
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WRITE_COEF(0x06, 0x6104), /* Set MIC2 Vref gate with HP */
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WRITE_COEFEX(0x57, 0x03, 0x8aa6), /* Direct Drive HP Amp control */
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{}
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};
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static struct coef_fw coef0233[] = {
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WRITE_COEF(0x1b, 0x0c0b),
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WRITE_COEF(0x45, 0xc429),
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UPDATE_COEF(0x35, 0x4000, 0),
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WRITE_COEF(0x06, 0x2104),
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WRITE_COEF(0x1a, 0x0001),
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WRITE_COEF(0x26, 0x0004),
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WRITE_COEF(0x32, 0x42a3),
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{}
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};
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static struct coef_fw coef0292[] = {
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WRITE_COEF(0x76, 0x000e),
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WRITE_COEF(0x6c, 0x2400),
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WRITE_COEF(0x18, 0x7308),
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WRITE_COEF(0x6b, 0xc429),
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{}
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};
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static struct coef_fw coef0293[] = {
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UPDATE_COEF(0x10, 7<<8, 6<<8), /* SET Line1 JD to 0 */
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UPDATE_COEFEX(0x57, 0x05, 1<<15|1<<13, 0x0), /* SET charge pump by verb */
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UPDATE_COEFEX(0x57, 0x03, 1<<10, 1<<10), /* SET EN_OSW to 1 */
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UPDATE_COEF(0x1a, 1<<3, 1<<3), /* Combo JD gating with LINE1-VREFO */
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WRITE_COEF(0x45, 0xc429), /* Set to TRS type */
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UPDATE_COEF(0x4a, 0x000f, 0x000e), /* Combo Jack auto detect */
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{}
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};
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static struct coef_fw coef0668[] = {
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WRITE_COEF(0x15, 0x0d40),
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WRITE_COEF(0xb7, 0x802b),
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{}
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};
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switch (codec->vendor_id) {
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case 0x10ec0255:
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/* LDO and MISC control */
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alc_write_coef_idx(codec, 0x1b, 0x0c0b);
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/* UAJ function set to menual mode */
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alc_write_coef_idx(codec, 0x45, 0xd089);
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/* Direct Drive HP Amp control(Set to verb control)*/
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alc_update_coefex_idx(codec, 0x57, 0x05, 1<<14, 0);
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/* Set MIC2 Vref gate with HP */
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alc_write_coef_idx(codec, 0x06, 0x6104);
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/* Direct Drive HP Amp control */
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alc_write_coefex_idx(codec, 0x57, 0x03, 0x8aa6);
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alc_process_coef_fw(codec, coef0255);
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break;
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case 0x10ec0233:
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case 0x10ec0283:
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alc_write_coef_idx(codec, 0x1b, 0x0c0b);
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alc_write_coef_idx(codec, 0x45, 0xc429);
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alc_update_coef_idx(codec, 0x35, 0x4000, 0);
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alc_write_coef_idx(codec, 0x06, 0x2104);
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alc_write_coef_idx(codec, 0x1a, 0x0001);
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alc_write_coef_idx(codec, 0x26, 0x0004);
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alc_write_coef_idx(codec, 0x32, 0x42a3);
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alc_process_coef_fw(codec, coef0233);
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break;
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case 0x10ec0292:
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alc_write_coef_idx(codec, 0x76, 0x000e);
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alc_write_coef_idx(codec, 0x6c, 0x2400);
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alc_write_coef_idx(codec, 0x18, 0x7308);
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alc_write_coef_idx(codec, 0x6b, 0xc429);
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alc_process_coef_fw(codec, coef0292);
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break;
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case 0x10ec0293:
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/* SET Line1 JD to 0 */
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alc_update_coef_idx(codec, 0x10, 7<<8, 6<<8);
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/* SET charge pump by verb */
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alc_update_coefex_idx(codec, 0x57, 0x05, 1<<15|1<<13, 0x0);
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/* SET EN_OSW to 1 */
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alc_update_coefex_idx(codec, 0x57, 0x03, 1<<10, 1<<10);
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/* Combo JD gating with LINE1-VREFO */
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alc_update_coef_idx(codec, 0x1a, 1<<3, 1<<3);
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/* Set to TRS type */
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alc_write_coef_idx(codec, 0x45, 0xc429);
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/* Combo Jack auto detect */
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alc_update_coef_idx(codec, 0x4a, 0x000f, 0x000e);
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alc_process_coef_fw(codec, coef0293);
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break;
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case 0x10ec0668:
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alc_write_coef_idx(codec, 0x15, 0x0d40);
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alc_write_coef_idx(codec, 0xb7, 0x802b);
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alc_process_coef_fw(codec, coef0668);
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break;
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}
|
||||
codec_dbg(codec, "Headset jack set to unplugged mode.\n");
|
||||
|
|
@ -3585,48 +3570,65 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec)
|
|||
static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin,
|
||||
hda_nid_t mic_pin)
|
||||
{
|
||||
static struct coef_fw coef0255[] = {
|
||||
WRITE_COEFEX(0x57, 0x03, 0x8aa6),
|
||||
WRITE_COEF(0x06, 0x6100), /* Set MIC2 Vref gate to normal */
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0233[] = {
|
||||
UPDATE_COEF(0x35, 0, 1<<14),
|
||||
WRITE_COEF(0x06, 0x2100),
|
||||
WRITE_COEF(0x1a, 0x0021),
|
||||
WRITE_COEF(0x26, 0x008c),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0292[] = {
|
||||
WRITE_COEF(0x19, 0xa208),
|
||||
WRITE_COEF(0x2e, 0xacf0),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0293[] = {
|
||||
UPDATE_COEFEX(0x57, 0x05, 0, 1<<15|1<<13), /* SET charge pump by verb */
|
||||
UPDATE_COEFEX(0x57, 0x03, 1<<10, 0), /* SET EN_OSW to 0 */
|
||||
UPDATE_COEF(0x1a, 1<<3, 0), /* Combo JD gating without LINE1-VREFO */
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0688[] = {
|
||||
WRITE_COEF(0xb7, 0x802b),
|
||||
WRITE_COEF(0xb5, 0x1040),
|
||||
UPDATE_COEF(0xc3, 0, 1<<12),
|
||||
{}
|
||||
};
|
||||
|
||||
switch (codec->vendor_id) {
|
||||
case 0x10ec0255:
|
||||
alc_write_coef_idx(codec, 0x45, 0xc489);
|
||||
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
|
||||
alc_write_coefex_idx(codec, 0x57, 0x03, 0x8aa6);
|
||||
/* Set MIC2 Vref gate to normal */
|
||||
alc_write_coef_idx(codec, 0x06, 0x6100);
|
||||
alc_process_coef_fw(codec, coef0255);
|
||||
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
|
||||
break;
|
||||
case 0x10ec0233:
|
||||
case 0x10ec0283:
|
||||
alc_write_coef_idx(codec, 0x45, 0xc429);
|
||||
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
|
||||
alc_update_coef_idx(codec, 0x35, 0, 1<<14);
|
||||
alc_write_coef_idx(codec, 0x06, 0x2100);
|
||||
alc_write_coef_idx(codec, 0x1a, 0x0021);
|
||||
alc_write_coef_idx(codec, 0x26, 0x008c);
|
||||
alc_process_coef_fw(codec, coef0233);
|
||||
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
|
||||
break;
|
||||
case 0x10ec0292:
|
||||
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
|
||||
alc_write_coef_idx(codec, 0x19, 0xa208);
|
||||
alc_write_coef_idx(codec, 0x2e, 0xacf0);
|
||||
alc_process_coef_fw(codec, coef0292);
|
||||
break;
|
||||
case 0x10ec0293:
|
||||
/* Set to TRS mode */
|
||||
alc_write_coef_idx(codec, 0x45, 0xc429);
|
||||
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
|
||||
/* SET charge pump by verb */
|
||||
alc_update_coefex_idx(codec, 0x57, 0x05, 0, 1<<15|1<<13);
|
||||
/* SET EN_OSW to 0 */
|
||||
alc_update_coefex_idx(codec, 0x57, 0x03, 1<<10, 0);
|
||||
/* Combo JD gating without LINE1-VREFO */
|
||||
alc_update_coef_idx(codec, 0x1a, 1<<3, 0);
|
||||
alc_process_coef_fw(codec, coef0293);
|
||||
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
|
||||
break;
|
||||
case 0x10ec0668:
|
||||
alc_write_coef_idx(codec, 0x11, 0x0001);
|
||||
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
|
||||
alc_write_coef_idx(codec, 0xb7, 0x802b);
|
||||
alc_write_coef_idx(codec, 0xb5, 0x1040);
|
||||
alc_update_coef_idx(codec, 0xc3, 0, 1<<12);
|
||||
alc_process_coef_fw(codec, coef0688);
|
||||
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
|
||||
break;
|
||||
}
|
||||
|
|
@ -3635,36 +3637,54 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin,
|
|||
|
||||
static void alc_headset_mode_default(struct hda_codec *codec)
|
||||
{
|
||||
static struct coef_fw coef0255[] = {
|
||||
WRITE_COEF(0x45, 0xc089),
|
||||
WRITE_COEF(0x45, 0xc489),
|
||||
WRITE_COEFEX(0x57, 0x03, 0x8ea6),
|
||||
WRITE_COEF(0x49, 0x0049),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0233[] = {
|
||||
WRITE_COEF(0x06, 0x2100),
|
||||
WRITE_COEF(0x32, 0x4ea3),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0292[] = {
|
||||
WRITE_COEF(0x76, 0x000e),
|
||||
WRITE_COEF(0x6c, 0x2400),
|
||||
WRITE_COEF(0x6b, 0xc429),
|
||||
WRITE_COEF(0x18, 0x7308),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0293[] = {
|
||||
UPDATE_COEF(0x4a, 0x000f, 0x000e), /* Combo Jack auto detect */
|
||||
WRITE_COEF(0x45, 0xC429), /* Set to TRS type */
|
||||
UPDATE_COEF(0x1a, 1<<3, 0), /* Combo JD gating without LINE1-VREFO */
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0688[] = {
|
||||
WRITE_COEF(0x11, 0x0041),
|
||||
WRITE_COEF(0x15, 0x0d40),
|
||||
WRITE_COEF(0xb7, 0x802b),
|
||||
{}
|
||||
};
|
||||
|
||||
switch (codec->vendor_id) {
|
||||
case 0x10ec0255:
|
||||
alc_write_coef_idx(codec, 0x45, 0xc089);
|
||||
alc_write_coef_idx(codec, 0x45, 0xc489);
|
||||
alc_write_coefex_idx(codec, 0x57, 0x03, 0x8ea6);
|
||||
alc_write_coef_idx(codec, 0x49, 0x0049);
|
||||
alc_process_coef_fw(codec, coef0255);
|
||||
break;
|
||||
case 0x10ec0233:
|
||||
case 0x10ec0283:
|
||||
alc_write_coef_idx(codec, 0x06, 0x2100);
|
||||
alc_write_coef_idx(codec, 0x32, 0x4ea3);
|
||||
alc_process_coef_fw(codec, coef0233);
|
||||
break;
|
||||
case 0x10ec0292:
|
||||
alc_write_coef_idx(codec, 0x76, 0x000e);
|
||||
alc_write_coef_idx(codec, 0x6c, 0x2400);
|
||||
alc_write_coef_idx(codec, 0x6b, 0xc429);
|
||||
alc_write_coef_idx(codec, 0x18, 0x7308);
|
||||
alc_process_coef_fw(codec, coef0292);
|
||||
break;
|
||||
case 0x10ec0293:
|
||||
/* Combo Jack auto detect */
|
||||
alc_update_coef_idx(codec, 0x4a, 0x000f, 0x000e);
|
||||
/* Set to TRS type */
|
||||
alc_write_coef_idx(codec, 0x45, 0xC429);
|
||||
/* Combo JD gating without LINE1-VREFO */
|
||||
alc_update_coef_idx(codec, 0x1a, 1<<3, 0);
|
||||
alc_process_coef_fw(codec, coef0293);
|
||||
break;
|
||||
case 0x10ec0668:
|
||||
alc_write_coef_idx(codec, 0x11, 0x0041);
|
||||
alc_write_coef_idx(codec, 0x15, 0x0d40);
|
||||
alc_write_coef_idx(codec, 0xb7, 0x802b);
|
||||
alc_process_coef_fw(codec, coef0688);
|
||||
break;
|
||||
}
|
||||
codec_dbg(codec, "Headset jack set to headphone (default) mode.\n");
|
||||
|
|
@ -3673,34 +3693,52 @@ static void alc_headset_mode_default(struct hda_codec *codec)
|
|||
/* Iphone type */
|
||||
static void alc_headset_mode_ctia(struct hda_codec *codec)
|
||||
{
|
||||
static struct coef_fw coef0255[] = {
|
||||
WRITE_COEF(0x45, 0xd489), /* Set to CTIA type */
|
||||
WRITE_COEF(0x1b, 0x0c2b),
|
||||
WRITE_COEFEX(0x57, 0x03, 0x8ea6),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0233[] = {
|
||||
WRITE_COEF(0x45, 0xd429),
|
||||
WRITE_COEF(0x1b, 0x0c2b),
|
||||
WRITE_COEF(0x32, 0x4ea3),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0292[] = {
|
||||
WRITE_COEF(0x6b, 0xd429),
|
||||
WRITE_COEF(0x76, 0x0008),
|
||||
WRITE_COEF(0x18, 0x7388),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0293[] = {
|
||||
WRITE_COEF(0x45, 0xd429), /* Set to ctia type */
|
||||
UPDATE_COEF(0x10, 7<<8, 7<<8), /* SET Line1 JD to 1 */
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0688[] = {
|
||||
WRITE_COEF(0x11, 0x0001),
|
||||
WRITE_COEF(0x15, 0x0d60),
|
||||
WRITE_COEF(0xc3, 0x0000),
|
||||
{}
|
||||
};
|
||||
|
||||
switch (codec->vendor_id) {
|
||||
case 0x10ec0255:
|
||||
/* Set to CTIA type */
|
||||
alc_write_coef_idx(codec, 0x45, 0xd489);
|
||||
alc_write_coef_idx(codec, 0x1b, 0x0c2b);
|
||||
alc_write_coefex_idx(codec, 0x57, 0x03, 0x8ea6);
|
||||
alc_process_coef_fw(codec, coef0255);
|
||||
break;
|
||||
case 0x10ec0233:
|
||||
case 0x10ec0283:
|
||||
alc_write_coef_idx(codec, 0x45, 0xd429);
|
||||
alc_write_coef_idx(codec, 0x1b, 0x0c2b);
|
||||
alc_write_coef_idx(codec, 0x32, 0x4ea3);
|
||||
alc_process_coef_fw(codec, coef0233);
|
||||
break;
|
||||
case 0x10ec0292:
|
||||
alc_write_coef_idx(codec, 0x6b, 0xd429);
|
||||
alc_write_coef_idx(codec, 0x76, 0x0008);
|
||||
alc_write_coef_idx(codec, 0x18, 0x7388);
|
||||
alc_process_coef_fw(codec, coef0292);
|
||||
break;
|
||||
case 0x10ec0293:
|
||||
/* Set to ctia type */
|
||||
alc_write_coef_idx(codec, 0x45, 0xd429);
|
||||
/* SET Line1 JD to 1 */
|
||||
alc_update_coef_idx(codec, 0x10, 7<<8, 7<<8);
|
||||
alc_process_coef_fw(codec, coef0293);
|
||||
break;
|
||||
case 0x10ec0668:
|
||||
alc_write_coef_idx(codec, 0x11, 0x0001);
|
||||
alc_write_coef_idx(codec, 0x15, 0x0d60);
|
||||
alc_write_coef_idx(codec, 0xc3, 0x0000);
|
||||
alc_process_coef_fw(codec, coef0688);
|
||||
break;
|
||||
}
|
||||
codec_dbg(codec, "Headset jack set to iPhone-style headset mode.\n");
|
||||
|
|
@ -3709,34 +3747,52 @@ static void alc_headset_mode_ctia(struct hda_codec *codec)
|
|||
/* Nokia type */
|
||||
static void alc_headset_mode_omtp(struct hda_codec *codec)
|
||||
{
|
||||
static struct coef_fw coef0255[] = {
|
||||
WRITE_COEF(0x45, 0xe489), /* Set to OMTP Type */
|
||||
WRITE_COEF(0x1b, 0x0c2b),
|
||||
WRITE_COEFEX(0x57, 0x03, 0x8ea6),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0233[] = {
|
||||
WRITE_COEF(0x45, 0xe429),
|
||||
WRITE_COEF(0x1b, 0x0c2b),
|
||||
WRITE_COEF(0x32, 0x4ea3),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0292[] = {
|
||||
WRITE_COEF(0x6b, 0xe429),
|
||||
WRITE_COEF(0x76, 0x0008),
|
||||
WRITE_COEF(0x18, 0x7388),
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0293[] = {
|
||||
WRITE_COEF(0x45, 0xe429), /* Set to omtp type */
|
||||
UPDATE_COEF(0x10, 7<<8, 7<<8), /* SET Line1 JD to 1 */
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0688[] = {
|
||||
WRITE_COEF(0x11, 0x0001),
|
||||
WRITE_COEF(0x15, 0x0d50),
|
||||
WRITE_COEF(0xc3, 0x0000),
|
||||
{}
|
||||
};
|
||||
|
||||
switch (codec->vendor_id) {
|
||||
case 0x10ec0255:
|
||||
/* Set to OMTP Type */
|
||||
alc_write_coef_idx(codec, 0x45, 0xe489);
|
||||
alc_write_coef_idx(codec, 0x1b, 0x0c2b);
|
||||
alc_write_coefex_idx(codec, 0x57, 0x03, 0x8ea6);
|
||||
alc_process_coef_fw(codec, coef0255);
|
||||
break;
|
||||
case 0x10ec0233:
|
||||
case 0x10ec0283:
|
||||
alc_write_coef_idx(codec, 0x45, 0xe429);
|
||||
alc_write_coef_idx(codec, 0x1b, 0x0c2b);
|
||||
alc_write_coef_idx(codec, 0x32, 0x4ea3);
|
||||
alc_process_coef_fw(codec, coef0233);
|
||||
break;
|
||||
case 0x10ec0292:
|
||||
alc_write_coef_idx(codec, 0x6b, 0xe429);
|
||||
alc_write_coef_idx(codec, 0x76, 0x0008);
|
||||
alc_write_coef_idx(codec, 0x18, 0x7388);
|
||||
alc_process_coef_fw(codec, coef0292);
|
||||
break;
|
||||
case 0x10ec0293:
|
||||
/* Set to omtp type */
|
||||
alc_write_coef_idx(codec, 0x45, 0xe429);
|
||||
/* SET Line1 JD to 1 */
|
||||
alc_update_coef_idx(codec, 0x10, 7<<8, 7<<8);
|
||||
alc_process_coef_fw(codec, coef0293);
|
||||
break;
|
||||
case 0x10ec0668:
|
||||
alc_write_coef_idx(codec, 0x11, 0x0001);
|
||||
alc_write_coef_idx(codec, 0x15, 0x0d50);
|
||||
alc_write_coef_idx(codec, 0xc3, 0x0000);
|
||||
alc_process_coef_fw(codec, coef0688);
|
||||
break;
|
||||
}
|
||||
codec_dbg(codec, "Headset jack set to Nokia-style headset mode.\n");
|
||||
|
|
@ -3747,13 +3803,28 @@ static void alc_determine_headset_type(struct hda_codec *codec)
|
|||
int val;
|
||||
bool is_ctia = false;
|
||||
struct alc_spec *spec = codec->spec;
|
||||
static struct coef_fw coef0255[] = {
|
||||
WRITE_COEF(0x45, 0xd089), /* combo jack auto switch control(Check type)*/
|
||||
WRITE_COEF(0x49, 0x0149), /* combo jack auto switch control(Vref
|
||||
conteol) */
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0293[] = {
|
||||
UPDATE_COEF(0x4a, 0x000f, 0x0008), /* Combo Jack auto detect */
|
||||
WRITE_COEF(0x45, 0xD429), /* Set to ctia type */
|
||||
{}
|
||||
};
|
||||
static struct coef_fw coef0688[] = {
|
||||
WRITE_COEF(0x11, 0x0001),
|
||||
WRITE_COEF(0xb7, 0x802b),
|
||||
WRITE_COEF(0x15, 0x0d60),
|
||||
WRITE_COEF(0xc3, 0x0c00),
|
||||
{}
|
||||
};
|
||||
|
||||
switch (codec->vendor_id) {
|
||||
case 0x10ec0255:
|
||||
/* combo jack auto switch control(Check type)*/
|
||||
alc_write_coef_idx(codec, 0x45, 0xd089);
|
||||
/* combo jack auto switch control(Vref conteol) */
|
||||
alc_write_coef_idx(codec, 0x49, 0x0149);
|
||||
alc_process_coef_fw(codec, coef0255);
|
||||
msleep(300);
|
||||
val = alc_read_coef_idx(codec, 0x46);
|
||||
is_ctia = (val & 0x0070) == 0x0070;
|
||||
|
|
@ -3772,19 +3843,13 @@ static void alc_determine_headset_type(struct hda_codec *codec)
|
|||
is_ctia = (val & 0x001c) == 0x001c;
|
||||
break;
|
||||
case 0x10ec0293:
|
||||
/* Combo Jack auto detect */
|
||||
alc_update_coef_idx(codec, 0x4a, 0x000f, 0x0008);
|
||||
/* Set to ctia type */
|
||||
alc_write_coef_idx(codec, 0x45, 0xD429);
|
||||
alc_process_coef_fw(codec, coef0293);
|
||||
msleep(300);
|
||||
val = alc_read_coef_idx(codec, 0x46);
|
||||
is_ctia = (val & 0x0070) == 0x0070;
|
||||
break;
|
||||
case 0x10ec0668:
|
||||
alc_write_coef_idx(codec, 0x11, 0x0001);
|
||||
alc_write_coef_idx(codec, 0xb7, 0x802b);
|
||||
alc_write_coef_idx(codec, 0x15, 0x0d60);
|
||||
alc_write_coef_idx(codec, 0xc3, 0x0c00);
|
||||
alc_process_coef_fw(codec, coef0688);
|
||||
msleep(300);
|
||||
val = alc_read_coef_idx(codec, 0xbe);
|
||||
is_ctia = (val & 0x1c02) == 0x1c02;
|
||||
|
|
@ -3920,11 +3985,15 @@ static void alc_fixup_headset_mode_no_hp_mic(struct hda_codec *codec,
|
|||
static void alc255_set_default_jack_type(struct hda_codec *codec)
|
||||
{
|
||||
/* Set to iphone type */
|
||||
alc_write_coef_idx(codec, 0x1b, 0x880b);
|
||||
alc_write_coef_idx(codec, 0x45, 0xd089);
|
||||
alc_write_coef_idx(codec, 0x1b, 0x080b);
|
||||
alc_write_coef_idx(codec, 0x46, 0x0004);
|
||||
alc_write_coef_idx(codec, 0x1b, 0x0c0b);
|
||||
static struct coef_fw fw[] = {
|
||||
WRITE_COEF(0x1b, 0x880b),
|
||||
WRITE_COEF(0x45, 0xd089),
|
||||
WRITE_COEF(0x1b, 0x080b),
|
||||
WRITE_COEF(0x46, 0x0004),
|
||||
WRITE_COEF(0x1b, 0x0c0b),
|
||||
{}
|
||||
};
|
||||
alc_process_coef_fw(codec, fw);
|
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msleep(30);
|
||||
}
|
||||
|
||||
|
|
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