powerpc/64s: Report SLB multi-hit rather than parity error
When we take an SLB multi-hit on bare metal, we see both the multi-hit and parity error bits set in DSISR. The user manuals indicates this is expected to always happen on Power8, whereas on Power9 it says a multi-hit will "usually" also cause a parity error. We decide what to do based on the various error tables in mce_power.c, and because we process them in order and only report the first, we currently always report a parity error but not the multi-hit, eg: Severe Machine check interrupt [Recovered] Initiator: CPU Error type: SLB [Parity] Effective address: c000000ffffd4300 Although this is correct, it leaves the user wondering why they got a parity error. It would be clearer instead if we reported the multi-hit because that is more likely to be simply a software bug, whereas a true parity error is possibly an indication of a bad core. We can do that simply by reordering the error tables so that multi-hit appears before parity. That doesn't affect the error recovery at all, because we flush the SLB either way. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -257,12 +257,12 @@ static const struct mce_derror_table mce_p7_derror_table[] = {
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{ 0x00000400, true,
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MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT,
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000080, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000100, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY,
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000080, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT,
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000040, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_INDETERMINATE, /* BOTH */
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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@ -290,12 +290,12 @@ static const struct mce_derror_table mce_p8_derror_table[] = {
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{ 0x00000200, true,
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MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, /* SECONDARY ERAT */
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000080, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000100, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY,
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000080, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT,
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0, false, 0, 0, 0, 0 } };
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static const struct mce_derror_table mce_p9_derror_table[] = {
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@ -320,12 +320,12 @@ static const struct mce_derror_table mce_p9_derror_table[] = {
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{ 0x00000200, false,
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MCE_ERROR_TYPE_USER, MCE_USER_ERROR_TLBIE,
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000080, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000100, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY,
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000080, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT,
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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{ 0x00000040, true,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD,
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MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, },
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