x86: construct 32-bit boot time page tables in native format.
Specifically the boot time page tables in a CONFIG_X86_PAE=y enabled kernel are in PAE format. early_ioremap is updated to use the standard page table accessors. Clear any mappings beyond max_low_pfn from the boot page tables in native_pagetable_setup_start because the initial mappings can extend beyond the range of physical memory and into the vmalloc area. Derived from patches by Eric Biederman and H. Peter Anvin. [ jeremy@goop.org: PAE swapper_pg_dir needs to be page-sized fix ] Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Eric W. Biederman <ebiederm@xmission.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Mika Penttilä <mika.penttila@kolumbus.fi> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Родитель
185c045c24
Коммит
551889a6e2
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@ -19,6 +19,10 @@
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#include <asm/thread_info.h>
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#include <asm/asm-offsets.h>
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#include <asm/setup.h>
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#include <asm/processor-flags.h>
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/* Physical address */
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#define pa(X) ((X) - __PAGE_OFFSET)
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/*
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* References to members of the new_cpu_data structure.
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@ -80,10 +84,6 @@ INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_
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*/
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.section .text.head,"ax",@progbits
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ENTRY(startup_32)
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/* check to see if KEEP_SEGMENTS flag is meaningful */
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cmpw $0x207, BP_version(%esi)
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jb 1f
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/* test KEEP_SEGMENTS flag to see if the bootloader is asking
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us to not reload segments */
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testb $(1<<6), BP_loadflags(%esi)
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@ -92,7 +92,7 @@ ENTRY(startup_32)
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/*
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* Set segments to known values.
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*/
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1: lgdt boot_gdt_descr - __PAGE_OFFSET
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lgdt pa(boot_gdt_descr)
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movl $(__BOOT_DS),%eax
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movl %eax,%ds
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movl %eax,%es
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@ -105,8 +105,8 @@ ENTRY(startup_32)
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*/
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cld
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xorl %eax,%eax
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movl $__bss_start - __PAGE_OFFSET,%edi
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movl $__bss_stop - __PAGE_OFFSET,%ecx
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movl $pa(__bss_start),%edi
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movl $pa(__bss_stop),%ecx
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subl %edi,%ecx
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shrl $2,%ecx
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rep ; stosl
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@ -118,31 +118,32 @@ ENTRY(startup_32)
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* (kexec on panic case). Hence copy out the parameters before initializing
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* page tables.
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*/
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movl $(boot_params - __PAGE_OFFSET),%edi
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movl $pa(boot_params),%edi
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movl $(PARAM_SIZE/4),%ecx
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cld
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rep
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movsl
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movl boot_params - __PAGE_OFFSET + NEW_CL_POINTER,%esi
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movl pa(boot_params) + NEW_CL_POINTER,%esi
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andl %esi,%esi
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jz 1f # No comand line
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movl $(boot_command_line - __PAGE_OFFSET),%edi
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movl $pa(boot_command_line),%edi
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movl $(COMMAND_LINE_SIZE/4),%ecx
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rep
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movsl
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1:
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#ifdef CONFIG_PARAVIRT
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cmpw $0x207, (boot_params + BP_version - __PAGE_OFFSET)
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/* This is can only trip for a broken bootloader... */
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cmpw $0x207, pa(boot_params + BP_version)
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jb default_entry
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/* Paravirt-compatible boot parameters. Look to see what architecture
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we're booting under. */
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movl (boot_params + BP_hardware_subarch - __PAGE_OFFSET), %eax
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movl pa(boot_params + BP_hardware_subarch), %eax
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cmpl $num_subarch_entries, %eax
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jae bad_subarch
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movl subarch_entries - __PAGE_OFFSET(,%eax,4), %eax
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movl pa(subarch_entries)(,%eax,4), %eax
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subl $__PAGE_OFFSET, %eax
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jmp *%eax
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@ -170,17 +171,68 @@ num_subarch_entries = (. - subarch_entries) / 4
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* Mappings are created both at virtual address 0 (identity mapping)
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* and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
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*
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* Warning: don't use %esi or the stack in this code. However, %esp
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* can be used as a GPR if you really need it...
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* Note that the stack is not yet set up!
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*/
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page_pde_offset = (__PAGE_OFFSET >> 20);
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#define PTE_ATTR 0x007 /* PRESENT+RW+USER */
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#define PDE_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
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#define PGD_ATTR 0x001 /* PRESENT (no other attributes) */
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default_entry:
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movl $(pg0 - __PAGE_OFFSET), %edi
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movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
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movl $0x007, %eax /* 0x007 = PRESENT+RW+USER */
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#ifdef CONFIG_X86_PAE
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/*
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* In PAE mode swapper_pg_dir is statically defined to contain enough
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* entries to cover the VMSPLIT option (that is the top 1, 2 or 3
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* entries). The identity mapping is handled by pointing two PGD
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* entries to the first kernel PMD.
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*
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* Note the upper half of each PMD or PTE are always zero at
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* this stage.
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*/
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#define KPMDS ((0x100000000-__PAGE_OFFSET) >> 30) /* Number of kernel PMDs */
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xorl %ebx,%ebx /* %ebx is kept at zero */
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movl $pa(pg0), %edi
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movl $pa(swapper_pg_pmd), %edx
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movl $PTE_ATTR, %eax
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10:
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leal 0x007(%edi),%ecx /* Create PDE entry */
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leal PDE_ATTR(%edi),%ecx /* Create PMD entry */
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movl %ecx,(%edx) /* Store PMD entry */
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/* Upper half already zero */
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addl $8,%edx
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movl $512,%ecx
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11:
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stosl
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xchgl %eax,%ebx
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stosl
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xchgl %eax,%ebx
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addl $0x1000,%eax
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loop 11b
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/*
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* End condition: we must map up to and including INIT_MAP_BEYOND_END
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* bytes beyond the end of our own page tables.
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*/
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leal (INIT_MAP_BEYOND_END+PTE_ATTR)(%edi),%ebp
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cmpl %ebp,%eax
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jb 10b
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1:
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movl %edi,pa(init_pg_tables_end)
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/* Do early initialization of the fixmap area */
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movl $pa(swapper_pg_fixmap)+PDE_ATTR,%eax
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movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8)
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#else /* Not PAE */
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page_pde_offset = (__PAGE_OFFSET >> 20);
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movl $pa(pg0), %edi
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movl $pa(swapper_pg_dir), %edx
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movl $PTE_ATTR, %eax
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10:
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leal PDE_ATTR(%edi),%ecx /* Create PDE entry */
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movl %ecx,(%edx) /* Store identity PDE entry */
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movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
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addl $4,%edx
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@ -189,19 +241,20 @@ default_entry:
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stosl
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addl $0x1000,%eax
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loop 11b
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/* End condition: we must map up to and including INIT_MAP_BEYOND_END */
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/* bytes beyond the end of our own page tables; the +0x007 is the attribute bits */
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leal (INIT_MAP_BEYOND_END+0x007)(%edi),%ebp
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/*
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* End condition: we must map up to and including INIT_MAP_BEYOND_END
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* bytes beyond the end of our own page tables; the +0x007 is
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* the attribute bits
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*/
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leal (INIT_MAP_BEYOND_END+PTE_ATTR)(%edi),%ebp
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cmpl %ebp,%eax
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jb 10b
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movl %edi,(init_pg_tables_end - __PAGE_OFFSET)
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/* Do an early initialization of the fixmap area */
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movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
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movl $(swapper_pg_pmd - __PAGE_OFFSET), %eax
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addl $0x67, %eax /* 0x67 == _PAGE_TABLE */
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movl %eax, 4092(%edx)
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movl %edi,pa(init_pg_tables_end)
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/* Do early initialization of the fixmap area */
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movl $pa(swapper_pg_fixmap)+PDE_ATTR,%eax
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movl %eax,pa(swapper_pg_dir+0xffc)
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#endif
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jmp 3f
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/*
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* Non-boot CPU entry point; entered from trampoline.S
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@ -241,7 +294,7 @@ ENTRY(startup_32_smp)
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* NOTE! We have to correct for the fact that we're
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* not yet offset PAGE_OFFSET..
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*/
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#define cr4_bits mmu_cr4_features-__PAGE_OFFSET
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#define cr4_bits pa(mmu_cr4_features)
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movl cr4_bits,%edx
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andl %edx,%edx
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jz 6f
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@ -276,10 +329,10 @@ ENTRY(startup_32_smp)
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/*
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* Enable paging
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*/
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movl $swapper_pg_dir-__PAGE_OFFSET,%eax
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movl $pa(swapper_pg_dir),%eax
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movl %eax,%cr3 /* set the page table pointer.. */
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movl %cr0,%eax
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orl $0x80000000,%eax
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orl $X86_CR0_PG,%eax
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movl %eax,%cr0 /* ..and set paging (PG) bit */
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ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
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1:
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@ -552,16 +605,44 @@ ENTRY(_stext)
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*/
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.section ".bss.page_aligned","wa"
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.align PAGE_SIZE_asm
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#ifdef CONFIG_X86_PAE
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ENTRY(swapper_pg_pmd)
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.fill 1024*KPMDS,4,0
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#else
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ENTRY(swapper_pg_dir)
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.fill 1024,4,0
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ENTRY(swapper_pg_pmd)
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#endif
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ENTRY(swapper_pg_fixmap)
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.fill 1024,4,0
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ENTRY(empty_zero_page)
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.fill 4096,1,0
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/*
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* This starts the data section.
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*/
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#ifdef CONFIG_X86_PAE
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.section ".data.page_aligned","wa"
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/* Page-aligned for the benefit of paravirt? */
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.align PAGE_SIZE_asm
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ENTRY(swapper_pg_dir)
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.long pa(swapper_pg_pmd+PGD_ATTR),0 /* low identity map */
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# if KPMDS == 3
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.long pa(swapper_pg_pmd+PGD_ATTR),0
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.long pa(swapper_pg_pmd+PGD_ATTR+0x1000),0
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.long pa(swapper_pg_pmd+PGD_ATTR+0x2000),0
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# elif KPMDS == 2
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.long 0,0
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.long pa(swapper_pg_pmd+PGD_ATTR),0
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.long pa(swapper_pg_pmd+PGD_ATTR+0x1000),0
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# elif KPMDS == 1
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.long 0,0
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.long 0,0
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.long pa(swapper_pg_pmd+PGD_ATTR),0
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# else
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# error "Kernel PMDs should be 1, 2 or 3"
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# endif
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.align PAGE_SIZE_asm /* needs to be page-sized too */
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#endif
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.data
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ENTRY(stack_start)
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.long init_thread_union+THREAD_SIZE
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@ -154,7 +154,11 @@ struct cpuinfo_x86 new_cpu_data __cpuinitdata = { 0, 0, 0, 0, -1, 1, 0, 0, -1 };
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struct cpuinfo_x86 boot_cpu_data __read_mostly = { 0, 0, 0, 0, -1, 1, 0, 0, -1 };
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EXPORT_SYMBOL(boot_cpu_data);
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#ifndef CONFIG_X86_PAE
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unsigned long mmu_cr4_features;
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#else
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unsigned long mmu_cr4_features = X86_CR4_PAE;
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#endif
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/* for MCA, but anyone else can use it if they want */
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unsigned int machine_id;
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@ -46,6 +46,7 @@
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#include <asm/pgalloc.h>
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#include <asm/sections.h>
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#include <asm/paravirt.h>
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#include <asm/setup.h>
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unsigned int __VMALLOC_RESERVE = 128 << 20;
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@ -328,44 +329,38 @@ pteval_t __PAGE_KERNEL_EXEC = _PAGE_KERNEL_EXEC;
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void __init native_pagetable_setup_start(pgd_t *base)
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{
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#ifdef CONFIG_X86_PAE
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int i;
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unsigned long pfn, va;
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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/*
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* Init entries of the first-level page table to the
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* zero page, if they haven't already been set up.
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*
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* In a normal native boot, we'll be running on a
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* pagetable rooted in swapper_pg_dir, but not in PAE
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* mode, so this will end up clobbering the mappings
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* for the lower 24Mbytes of the address space,
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* without affecting the kernel address space.
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* Remove any mappings which extend past the end of physical
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* memory from the boot time page table:
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*/
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for (i = 0; i < USER_PTRS_PER_PGD; i++)
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set_pgd(&base[i],
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__pgd(__pa(empty_zero_page) | _PAGE_PRESENT));
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for (pfn = max_low_pfn + 1; pfn < 1<<(32-PAGE_SHIFT); pfn++) {
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va = PAGE_OFFSET + (pfn<<PAGE_SHIFT);
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pgd = base + pgd_index(va);
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if (!pgd_present(*pgd))
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break;
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/* Make sure kernel address space is empty so that a pagetable
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will be allocated for it. */
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memset(&base[USER_PTRS_PER_PGD], 0,
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KERNEL_PGD_PTRS * sizeof(pgd_t));
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#else
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pud = pud_offset(pgd, va);
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pmd = pmd_offset(pud, va);
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if (!pmd_present(*pmd))
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break;
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pte = pte_offset_kernel(pmd, va);
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if (!pte_present(*pte))
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break;
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pte_clear(NULL, va, pte);
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}
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paravirt_alloc_pd(&init_mm, __pa(base) >> PAGE_SHIFT);
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#endif
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}
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void __init native_pagetable_setup_done(pgd_t *base)
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{
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#ifdef CONFIG_X86_PAE
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/*
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* Add low memory identity-mappings - SMP needs it when
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* starting up on an AP from real-mode. In the non-PAE
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* case we already have these mappings through head.S.
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* All user-space mappings are explicitly cleared after
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* SMP startup.
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*/
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set_pgd(&base[0], base[USER_PTRS_PER_PGD]);
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#endif
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}
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/*
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@ -374,9 +369,8 @@ void __init native_pagetable_setup_done(pgd_t *base)
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* the boot process.
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*
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* If we're booting on native hardware, this will be a pagetable
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* constructed in arch/i386/kernel/head.S, and not running in PAE mode
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* (even if we'll end up running in PAE). The root of the pagetable
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* will be swapper_pg_dir.
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* constructed in arch/x86/kernel/head_32.S. The root of the
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* pagetable will be swapper_pg_dir.
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*
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* If we're booting paravirtualized under a hypervisor, then there are
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* more options: we may already be running PAE, and the pagetable may
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@ -537,14 +531,6 @@ void __init paging_init(void)
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load_cr3(swapper_pg_dir);
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#ifdef CONFIG_X86_PAE
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/*
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* We will bail out later - printk doesn't work right now so
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* the user would just see a hanging kernel.
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*/
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if (cpu_has_pae)
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set_in_cr4(X86_CR4_PAE);
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#endif
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__flush_tlb_all();
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kmap_init();
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@ -675,10 +661,6 @@ void __init mem_init(void)
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BUG_ON((unsigned long)high_memory > VMALLOC_START);
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#endif /* double-sanity-check paranoia */
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#ifdef CONFIG_X86_PAE
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if (!cpu_has_pae)
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panic("cannot execute a PAE-enabled kernel on a PAE-less CPU!");
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#endif
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if (boot_cpu_data.wp_works_ok < 0)
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test_wp_bit();
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|
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|
@ -260,41 +260,46 @@ static int __init early_ioremap_debug_setup(char *str)
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early_param("early_ioremap_debug", early_ioremap_debug_setup);
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static __initdata int after_paging_init;
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static __initdata unsigned long bm_pte[1024]
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static __initdata pte_t bm_pte[PAGE_SIZE/sizeof(pte_t)]
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__attribute__((aligned(PAGE_SIZE)));
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static inline unsigned long * __init early_ioremap_pgd(unsigned long addr)
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static inline pmd_t * __init early_ioremap_pmd(unsigned long addr)
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{
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return (unsigned long *)swapper_pg_dir + ((addr >> 22) & 1023);
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pgd_t *pgd = &swapper_pg_dir[pgd_index(addr)];
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pud_t *pud = pud_offset(pgd, addr);
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pmd_t *pmd = pmd_offset(pud, addr);
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return pmd;
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}
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static inline unsigned long * __init early_ioremap_pte(unsigned long addr)
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static inline pte_t * __init early_ioremap_pte(unsigned long addr)
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{
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return bm_pte + ((addr >> PAGE_SHIFT) & 1023);
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return &bm_pte[pte_index(addr)];
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}
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void __init early_ioremap_init(void)
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{
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unsigned long *pgd;
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pmd_t *pmd;
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if (early_ioremap_debug)
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printk(KERN_INFO "early_ioremap_init()\n");
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|
||||
pgd = early_ioremap_pgd(fix_to_virt(FIX_BTMAP_BEGIN));
|
||||
*pgd = __pa(bm_pte) | _PAGE_TABLE;
|
||||
pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN));
|
||||
memset(bm_pte, 0, sizeof(bm_pte));
|
||||
set_pmd(pmd, __pmd(__pa(bm_pte) | _PAGE_TABLE));
|
||||
|
||||
/*
|
||||
* The boot-ioremap range spans multiple pgds, for which
|
||||
* The boot-ioremap range spans multiple pmds, for which
|
||||
* we are not prepared:
|
||||
*/
|
||||
if (pgd != early_ioremap_pgd(fix_to_virt(FIX_BTMAP_END))) {
|
||||
if (pmd != early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END))) {
|
||||
WARN_ON(1);
|
||||
printk(KERN_WARNING "pgd %p != %p\n",
|
||||
pgd, early_ioremap_pgd(fix_to_virt(FIX_BTMAP_END)));
|
||||
printk(KERN_WARNING "pmd %p != %p\n",
|
||||
pmd, early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END)));
|
||||
printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
|
||||
fix_to_virt(FIX_BTMAP_BEGIN));
|
||||
fix_to_virt(FIX_BTMAP_BEGIN));
|
||||
printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_END): %08lx\n",
|
||||
fix_to_virt(FIX_BTMAP_END));
|
||||
fix_to_virt(FIX_BTMAP_END));
|
||||
|
||||
printk(KERN_WARNING "FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
|
||||
printk(KERN_WARNING "FIX_BTMAP_BEGIN: %d\n",
|
||||
|
@ -304,28 +309,29 @@ void __init early_ioremap_init(void)
|
|||
|
||||
void __init early_ioremap_clear(void)
|
||||
{
|
||||
unsigned long *pgd;
|
||||
pmd_t *pmd;
|
||||
|
||||
if (early_ioremap_debug)
|
||||
printk(KERN_INFO "early_ioremap_clear()\n");
|
||||
|
||||
pgd = early_ioremap_pgd(fix_to_virt(FIX_BTMAP_BEGIN));
|
||||
*pgd = 0;
|
||||
paravirt_release_pt(__pa(pgd) >> PAGE_SHIFT);
|
||||
pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN));
|
||||
pmd_clear(pmd);
|
||||
paravirt_release_pt(__pa(pmd) >> PAGE_SHIFT);
|
||||
__flush_tlb_all();
|
||||
}
|
||||
|
||||
void __init early_ioremap_reset(void)
|
||||
{
|
||||
enum fixed_addresses idx;
|
||||
unsigned long *pte, phys, addr;
|
||||
unsigned long addr, phys;
|
||||
pte_t *pte;
|
||||
|
||||
after_paging_init = 1;
|
||||
for (idx = FIX_BTMAP_BEGIN; idx >= FIX_BTMAP_END; idx--) {
|
||||
addr = fix_to_virt(idx);
|
||||
pte = early_ioremap_pte(addr);
|
||||
if (*pte & _PAGE_PRESENT) {
|
||||
phys = *pte & PAGE_MASK;
|
||||
if (pte_present(*pte)) {
|
||||
phys = pte_val(*pte) & PAGE_MASK;
|
||||
set_fixmap(idx, phys);
|
||||
}
|
||||
}
|
||||
|
@ -334,7 +340,8 @@ void __init early_ioremap_reset(void)
|
|||
static void __init __early_set_fixmap(enum fixed_addresses idx,
|
||||
unsigned long phys, pgprot_t flags)
|
||||
{
|
||||
unsigned long *pte, addr = __fix_to_virt(idx);
|
||||
unsigned long addr = __fix_to_virt(idx);
|
||||
pte_t *pte;
|
||||
|
||||
if (idx >= __end_of_fixed_addresses) {
|
||||
BUG();
|
||||
|
@ -342,9 +349,9 @@ static void __init __early_set_fixmap(enum fixed_addresses idx,
|
|||
}
|
||||
pte = early_ioremap_pte(addr);
|
||||
if (pgprot_val(flags))
|
||||
*pte = (phys & PAGE_MASK) | pgprot_val(flags);
|
||||
set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags));
|
||||
else
|
||||
*pte = 0;
|
||||
pte_clear(NULL, addr, pte);
|
||||
__flush_tlb_one(addr);
|
||||
}
|
||||
|
||||
|
|
|
@ -48,7 +48,6 @@ typedef unsigned long pgprotval_t;
|
|||
typedef unsigned long phys_addr_t;
|
||||
|
||||
typedef union { pteval_t pte, pte_low; } pte_t;
|
||||
typedef pte_t boot_pte_t;
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* CONFIG_X86_PAE */
|
||||
|
|
|
@ -52,10 +52,6 @@ void paging_init(void);
|
|||
#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
|
||||
#define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
|
||||
|
||||
#define TWOLEVEL_PGDIR_SHIFT 22
|
||||
#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
|
||||
#define BOOT_KERNEL_PGD_PTRS (1024-BOOT_USER_PGD_PTRS)
|
||||
|
||||
/* Just any arbitrary offset to the start of the vmalloc VM area: the
|
||||
* current 8MB value just means that there will be a 8MB "hole" after the
|
||||
* physical memory until the kernel virtual memory starts. That means that
|
||||
|
|
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Ссылка в новой задаче