usb: phy: Add RCAR Gen2 USB phy
This adds RCAR Gen2 USB phy support. The driver configures USB channels 0/2 which are shared between PCI USB hosts and USBHS/USBSS devices. It also controls internal USBHS phy. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Valentine Barshak
Felipe Balbi
Родитель
c5340bd143
Коммит
5578b266e9
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@ -214,6 +214,19 @@ config USB_RCAR_PHY
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To compile this driver as a module, choose M here: the
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module will be called phy-rcar-usb.
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config USB_RCAR_GEN2_PHY
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tristate "Renesas R-Car Gen2 USB PHY support"
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depends on ARCH_R8A7790 || ARCH_R8A7791 || COMPILE_TEST
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select USB_PHY
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help
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Say Y here to add support for the Renesas R-Car Gen2 USB PHY driver.
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It is typically used to control internal USB PHY for USBHS,
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and to configure shared USB channels 0 and 2.
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This driver supports R8A7790 and R8A7791.
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To compile this driver as a module, choose M here: the
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module will be called phy-rcar-gen2-usb.
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config USB_ULPI
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bool "Generic ULPI Transceiver Driver"
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depends on ARM
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@ -29,5 +29,6 @@ obj-$(CONFIG_USB_MSM_OTG) += phy-msm-usb.o
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obj-$(CONFIG_USB_MV_OTG) += phy-mv-usb.o
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obj-$(CONFIG_USB_MXS_PHY) += phy-mxs-usb.o
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obj-$(CONFIG_USB_RCAR_PHY) += phy-rcar-usb.o
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obj-$(CONFIG_USB_RCAR_GEN2_PHY) += phy-rcar-gen2-usb.o
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obj-$(CONFIG_USB_ULPI) += phy-ulpi.o
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obj-$(CONFIG_USB_ULPI_VIEWPORT) += phy-ulpi-viewport.o
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@ -0,0 +1,248 @@
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/*
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* Renesas R-Car Gen2 USB phy driver
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Cogent Embedded, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_data/usb-rcar-gen2-phy.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/usb/otg.h>
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struct rcar_gen2_usb_phy_priv {
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struct usb_phy phy;
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void __iomem *base;
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struct clk *clk;
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spinlock_t lock;
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int usecount;
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u32 ugctrl2;
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};
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#define usb_phy_to_priv(p) container_of(p, struct rcar_gen2_usb_phy_priv, phy)
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/* Low Power Status register */
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#define USBHS_LPSTS_REG 0x02
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#define USBHS_LPSTS_SUSPM (1 << 14)
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/* USB General control register */
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#define USBHS_UGCTRL_REG 0x80
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#define USBHS_UGCTRL_CONNECT (1 << 2)
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#define USBHS_UGCTRL_PLLRESET (1 << 0)
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/* USB General control register 2 */
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#define USBHS_UGCTRL2_REG 0x84
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#define USBHS_UGCTRL2_USB0_PCI (1 << 4)
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#define USBHS_UGCTRL2_USB0_HS (3 << 4)
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#define USBHS_UGCTRL2_USB2_PCI (0 << 31)
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#define USBHS_UGCTRL2_USB2_SS (1 << 31)
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/* USB General status register */
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#define USBHS_UGSTS_REG 0x88
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#define USBHS_UGSTS_LOCK (3 << 8)
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/* Enable USBHS internal phy */
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static int __rcar_gen2_usbhs_phy_enable(void __iomem *base)
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{
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u32 val;
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int i;
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/* USBHS PHY power on */
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val = ioread32(base + USBHS_UGCTRL_REG);
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val &= ~USBHS_UGCTRL_PLLRESET;
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iowrite32(val, base + USBHS_UGCTRL_REG);
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val = ioread16(base + USBHS_LPSTS_REG);
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val |= USBHS_LPSTS_SUSPM;
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iowrite16(val, base + USBHS_LPSTS_REG);
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for (i = 0; i < 20; i++) {
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val = ioread32(base + USBHS_UGSTS_REG);
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if ((val & USBHS_UGSTS_LOCK) == USBHS_UGSTS_LOCK) {
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val = ioread32(base + USBHS_UGCTRL_REG);
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val |= USBHS_UGCTRL_CONNECT;
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iowrite32(val, base + USBHS_UGCTRL_REG);
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return 0;
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}
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udelay(1);
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}
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/* Timed out waiting for the PLL lock */
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return -ETIMEDOUT;
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}
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/* Disable USBHS internal phy */
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static int __rcar_gen2_usbhs_phy_disable(void __iomem *base)
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{
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u32 val;
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/* USBHS PHY power off */
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val = ioread32(base + USBHS_UGCTRL_REG);
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val &= ~USBHS_UGCTRL_CONNECT;
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iowrite32(val, base + USBHS_UGCTRL_REG);
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val = ioread16(base + USBHS_LPSTS_REG);
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val &= ~USBHS_LPSTS_SUSPM;
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iowrite16(val, base + USBHS_LPSTS_REG);
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val = ioread32(base + USBHS_UGCTRL_REG);
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val |= USBHS_UGCTRL_PLLRESET;
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iowrite32(val, base + USBHS_UGCTRL_REG);
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return 0;
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}
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/* Setup USB channels */
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static void __rcar_gen2_usb_phy_init(struct rcar_gen2_usb_phy_priv *priv)
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{
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u32 val;
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clk_prepare_enable(priv->clk);
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/* Set USB channels in the USBHS UGCTRL2 register */
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val = ioread32(priv->base);
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val &= ~(USBHS_UGCTRL2_USB0_HS | USBHS_UGCTRL2_USB2_SS);
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val |= priv->ugctrl2;
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iowrite32(val, priv->base);
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}
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/* Shutdown USB channels */
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static void __rcar_gen2_usb_phy_shutdown(struct rcar_gen2_usb_phy_priv *priv)
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{
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__rcar_gen2_usbhs_phy_disable(priv->base);
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clk_disable_unprepare(priv->clk);
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}
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static int rcar_gen2_usb_phy_set_suspend(struct usb_phy *phy, int suspend)
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{
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struct rcar_gen2_usb_phy_priv *priv = usb_phy_to_priv(phy);
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unsigned long flags;
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int retval;
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spin_lock_irqsave(&priv->lock, flags);
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retval = suspend ? __rcar_gen2_usbhs_phy_disable(priv->base) :
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__rcar_gen2_usbhs_phy_enable(priv->base);
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spin_unlock_irqrestore(&priv->lock, flags);
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return retval;
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}
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static int rcar_gen2_usb_phy_init(struct usb_phy *phy)
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{
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struct rcar_gen2_usb_phy_priv *priv = usb_phy_to_priv(phy);
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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/*
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* Enable the clock and setup USB channels
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* if it's the first user
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*/
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if (!priv->usecount++)
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__rcar_gen2_usb_phy_init(priv);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static void rcar_gen2_usb_phy_shutdown(struct usb_phy *phy)
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{
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struct rcar_gen2_usb_phy_priv *priv = usb_phy_to_priv(phy);
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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if (!priv->usecount) {
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dev_warn(phy->dev, "Trying to disable phy with 0 usecount\n");
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goto out;
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}
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/* Disable everything if it's the last user */
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if (!--priv->usecount)
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__rcar_gen2_usb_phy_shutdown(priv);
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out:
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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static int rcar_gen2_usb_phy_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct rcar_gen2_phy_platform_data *pdata;
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struct rcar_gen2_usb_phy_priv *priv;
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struct resource *res;
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void __iomem *base;
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struct clk *clk;
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int retval;
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pdata = dev_get_platdata(&pdev->dev);
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if (!pdata) {
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dev_err(dev, "No platform data\n");
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return -EINVAL;
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}
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clk = devm_clk_get(&pdev->dev, "usbhs");
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "Can't get the clock\n");
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return PTR_ERR(clk);
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv) {
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dev_err(dev, "Memory allocation failed\n");
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return -ENOMEM;
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}
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spin_lock_init(&priv->lock);
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priv->clk = clk;
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priv->base = base;
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priv->ugctrl2 = pdata->chan0_pci ?
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USBHS_UGCTRL2_USB0_PCI : USBHS_UGCTRL2_USB0_HS;
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priv->ugctrl2 |= pdata->chan2_pci ?
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USBHS_UGCTRL2_USB2_PCI : USBHS_UGCTRL2_USB2_SS;
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priv->phy.dev = dev;
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priv->phy.label = dev_name(dev);
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priv->phy.init = rcar_gen2_usb_phy_init;
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priv->phy.shutdown = rcar_gen2_usb_phy_shutdown;
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priv->phy.set_suspend = rcar_gen2_usb_phy_set_suspend;
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retval = usb_add_phy(&priv->phy, USB_PHY_TYPE_USB2);
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if (retval < 0) {
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dev_err(dev, "Failed to add USB phy\n");
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return retval;
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}
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platform_set_drvdata(pdev, priv);
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return retval;
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}
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static int rcar_gen2_usb_phy_remove(struct platform_device *pdev)
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{
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struct rcar_gen2_usb_phy_priv *priv = platform_get_drvdata(pdev);
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usb_remove_phy(&priv->phy);
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return 0;
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}
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static struct platform_driver rcar_gen2_usb_phy_driver = {
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.driver = {
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.name = "usb_phy_rcar_gen2",
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},
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.probe = rcar_gen2_usb_phy_probe,
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.remove = rcar_gen2_usb_phy_remove,
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};
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module_platform_driver(rcar_gen2_usb_phy_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Renesas R-Car Gen2 USB phy");
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MODULE_AUTHOR("Valentine Barshak <valentine.barshak@cogentembedded.com>");
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@ -0,0 +1,22 @@
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/*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Cogent Embedded, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __USB_RCAR_GEN2_PHY_H
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#define __USB_RCAR_GEN2_PHY_H
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#include <linux/types.h>
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struct rcar_gen2_phy_platform_data {
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/* USB channel 0 configuration */
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bool chan0_pci:1; /* true: PCI USB host 0, false: USBHS */
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/* USB channel 2 configuration */
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bool chan2_pci:1; /* true: PCI USB host 2, false: USBSS */
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};
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#endif
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