interconnect: msm8939: add support for AP-owned nodes
Port support for AP-owned nodes from the downstream device tree. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210903232421.1384199-10-dmitry.baryshkov@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
This commit is contained in:
Dmitry Baryshkov
Georgi Djakov
Родитель
2427b06e4c
Коммит
55867ea29f
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@ -11,6 +11,7 @@
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/of_device.h>
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#include <dt-bindings/interconnect/qcom,msm8939.h>
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@ -120,6 +121,8 @@ static struct qcom_icc_node bimc_snoc_mas = {
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.buswidth = 8,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_INVALID,
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.num_links = ARRAY_SIZE(bimc_snoc_mas_links),
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.links = bimc_snoc_mas_links,
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};
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@ -151,6 +154,11 @@ static struct qcom_icc_node mas_apss = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_FIXED,
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.qos.areq_prio = 0,
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.qos.prio_level = 0,
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.qos.qos_port = 0,
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.num_links = ARRAY_SIZE(mas_apss_links),
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.links = mas_apss_links,
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};
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@ -209,6 +217,11 @@ static struct qcom_icc_node mas_gfx = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_FIXED,
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.qos.areq_prio = 0,
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.qos.prio_level = 0,
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.qos.qos_port = 2,
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.num_links = ARRAY_SIZE(mas_gfx_links),
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.links = mas_gfx_links,
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};
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@ -224,6 +237,11 @@ static struct qcom_icc_node mas_jpeg = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_BYPASS,
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.qos.areq_prio = 0,
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.qos.prio_level = 0,
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.qos.qos_port = 6,
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.num_links = ARRAY_SIZE(mas_jpeg_links),
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.links = mas_jpeg_links,
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};
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@ -239,6 +257,11 @@ static struct qcom_icc_node mas_mdp0 = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_BYPASS,
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.qos.areq_prio = 0,
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.qos.prio_level = 0,
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.qos.qos_port = 7,
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.num_links = ARRAY_SIZE(mas_mdp0_links),
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.links = mas_mdp0_links,
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};
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@ -254,6 +277,11 @@ static struct qcom_icc_node mas_mdp1 = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_BYPASS,
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.qos.areq_prio = 0,
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.qos.prio_level = 0,
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.qos.qos_port = 13,
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.num_links = ARRAY_SIZE(mas_mdp1_links),
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.links = mas_mdp1_links,
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};
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@ -269,6 +297,11 @@ static struct qcom_icc_node mas_cpp = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_BYPASS,
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.qos.areq_prio = 0,
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.qos.prio_level = 0,
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.qos.qos_port = 12,
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.num_links = ARRAY_SIZE(mas_cpp_links),
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.links = mas_cpp_links,
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};
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@ -325,6 +358,11 @@ static struct qcom_icc_node mas_qdss_bam = {
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.buswidth = 8,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_FIXED,
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.qos.areq_prio = 1,
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.qos.prio_level = 1,
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.qos.qos_port = 11,
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.num_links = ARRAY_SIZE(mas_qdss_bam_links),
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.links = mas_qdss_bam_links,
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};
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@ -339,6 +377,11 @@ static struct qcom_icc_node mas_qdss_etr = {
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.buswidth = 8,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_FIXED,
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.qos.areq_prio = 1,
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.qos.prio_level = 1,
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.qos.qos_port = 10,
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.num_links = ARRAY_SIZE(mas_qdss_etr_links),
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.links = mas_qdss_etr_links,
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};
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@ -383,6 +426,11 @@ static struct qcom_icc_node mas_tcu0 = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_FIXED,
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.qos.areq_prio = 2,
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.qos.prio_level = 2,
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.qos.qos_port = 6,
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.num_links = ARRAY_SIZE(mas_tcu0_links),
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.links = mas_tcu0_links,
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};
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@ -426,6 +474,11 @@ static struct qcom_icc_node mas_vfe = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_BYPASS,
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.qos.areq_prio = 0,
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.qos.prio_level = 0,
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.qos.qos_port = 9,
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.num_links = ARRAY_SIZE(mas_vfe_links),
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.links = mas_vfe_links,
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};
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@ -441,6 +494,11 @@ static struct qcom_icc_node mas_video = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_BYPASS,
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.qos.areq_prio = 0,
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.qos.prio_level = 0,
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.qos.qos_port = 8,
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.num_links = ARRAY_SIZE(mas_video_links),
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.links = mas_video_links,
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};
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@ -455,6 +513,8 @@ static struct qcom_icc_node mm_int_0 = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_INVALID,
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.num_links = ARRAY_SIZE(mm_int_0_links),
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.links = mm_int_0_links,
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};
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@ -469,6 +529,8 @@ static struct qcom_icc_node mm_int_1 = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_INVALID,
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.num_links = ARRAY_SIZE(mm_int_1_links),
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.links = mm_int_1_links,
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};
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@ -483,6 +545,8 @@ static struct qcom_icc_node mm_int_2 = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_INVALID,
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.num_links = ARRAY_SIZE(mm_int_2_links),
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.links = mm_int_2_links,
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};
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@ -711,6 +775,8 @@ static struct qcom_icc_node qdss_int = {
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.buswidth = 8,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_INVALID,
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.num_links = ARRAY_SIZE(qdss_int_links),
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.links = qdss_int_links,
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};
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@ -1029,6 +1095,8 @@ static struct qcom_icc_node snoc_bimc_0_mas = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_INVALID,
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.num_links = ARRAY_SIZE(snoc_bimc_0_mas_links),
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.links = snoc_bimc_0_mas_links,
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};
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@ -1043,6 +1111,8 @@ static struct qcom_icc_node snoc_bimc_0_slv = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_INVALID,
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.num_links = ARRAY_SIZE(snoc_bimc_0_slv_links),
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.links = snoc_bimc_0_slv_links,
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};
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@ -1085,6 +1155,8 @@ static struct qcom_icc_node snoc_bimc_2_mas = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_INVALID,
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.num_links = ARRAY_SIZE(snoc_bimc_2_mas_links),
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.links = snoc_bimc_2_mas_links,
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};
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@ -1099,6 +1171,8 @@ static struct qcom_icc_node snoc_bimc_2_slv = {
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.buswidth = 16,
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.mas_rpm_id = -1,
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.slv_rpm_id = -1,
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.qos.ap_owned = true,
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.qos.qos_mode = NOC_QOS_MODE_INVALID,
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.num_links = ARRAY_SIZE(snoc_bimc_2_slv_links),
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.links = snoc_bimc_2_slv_links,
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};
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@ -1199,9 +1273,19 @@ static struct qcom_icc_node *msm8939_snoc_nodes[] = {
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[SNOC_QDSS_INT] = &qdss_int,
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};
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static const struct regmap_config msm8939_snoc_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = 0x14080,
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.fast_io = true,
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};
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static struct qcom_icc_desc msm8939_snoc = {
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.nodes = msm8939_snoc_nodes,
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.num_nodes = ARRAY_SIZE(msm8939_snoc_nodes),
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.regmap_cfg = &msm8939_snoc_regmap_config,
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.qos_offset = 0x7000,
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};
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static struct qcom_icc_node *msm8939_snoc_mm_nodes[] = {
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@ -1216,9 +1300,19 @@ static struct qcom_icc_node *msm8939_snoc_mm_nodes[] = {
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[SNOC_MM_INT_2] = &mm_int_2,
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};
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static const struct regmap_config msm8939_snoc_mm_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = 0x14080,
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.fast_io = true,
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};
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static struct qcom_icc_desc msm8939_snoc_mm = {
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.nodes = msm8939_snoc_mm_nodes,
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.num_nodes = ARRAY_SIZE(msm8939_snoc_mm_nodes),
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.regmap_cfg = &msm8939_snoc_mm_regmap_config,
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.qos_offset = 0x7000,
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};
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static struct qcom_icc_node *msm8939_bimc_nodes[] = {
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@ -1233,9 +1327,20 @@ static struct qcom_icc_node *msm8939_bimc_nodes[] = {
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[SNOC_BIMC_2_SLV] = &snoc_bimc_2_slv,
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};
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static const struct regmap_config msm8939_bimc_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = 0x62000,
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.fast_io = true,
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};
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static struct qcom_icc_desc msm8939_bimc = {
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.nodes = msm8939_bimc_nodes,
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.num_nodes = ARRAY_SIZE(msm8939_bimc_nodes),
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.is_bimc_node = true,
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.regmap_cfg = &msm8939_bimc_regmap_config,
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.qos_offset = 0x8000,
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};
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static struct qcom_icc_node *msm8939_pcnoc_nodes[] = {
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@ -1293,9 +1398,19 @@ static struct qcom_icc_node *msm8939_pcnoc_nodes[] = {
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[SNOC_PCNOC_SLV] = &snoc_pcnoc_slv,
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};
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static const struct regmap_config msm8939_pcnoc_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = 0x11000,
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.fast_io = true,
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};
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static struct qcom_icc_desc msm8939_pcnoc = {
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.nodes = msm8939_pcnoc_nodes,
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.num_nodes = ARRAY_SIZE(msm8939_pcnoc_nodes),
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.regmap_cfg = &msm8939_pcnoc_regmap_config,
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.qos_offset = 0x7000,
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};
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static const struct of_device_id msm8939_noc_of_match[] = {
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