sh-pfc: sh7372: Add SDHCI and MMCIF pin groups and functions
Add pin groups for all three SDHI interfaces and two alternative pin groups for the MMCIF interface on the sh7372 SoC. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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Коммит
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@ -933,6 +933,207 @@ static struct sh_pfc_pin pinmux_pins[] = {
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GPIO_PORT_ALL(),
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};
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/* - MMCIF ------------------------------------------------------------------ */
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static const unsigned int mmc0_data1_0_pins[] = {
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/* D[0] */
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84,
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};
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static const unsigned int mmc0_data1_0_mux[] = {
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MMCD0_0_MARK,
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};
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static const unsigned int mmc0_data4_0_pins[] = {
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/* D[0:3] */
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84, 85, 86, 87,
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};
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static const unsigned int mmc0_data4_0_mux[] = {
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MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
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};
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static const unsigned int mmc0_data8_0_pins[] = {
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/* D[0:7] */
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84, 85, 86, 87, 88, 89, 90, 91,
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};
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static const unsigned int mmc0_data8_0_mux[] = {
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MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
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MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK,
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};
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static const unsigned int mmc0_ctrl_0_pins[] = {
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/* CMD, CLK */
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92, 99,
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};
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static const unsigned int mmc0_ctrl_0_mux[] = {
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MMCCMD0_MARK, MMCCLK0_MARK,
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};
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static const unsigned int mmc0_data1_1_pins[] = {
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/* D[0] */
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54,
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};
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static const unsigned int mmc0_data1_1_mux[] = {
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MMCD1_0_MARK,
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};
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static const unsigned int mmc0_data4_1_pins[] = {
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/* D[0:3] */
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54, 55, 56, 57,
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};
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static const unsigned int mmc0_data4_1_mux[] = {
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MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
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};
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static const unsigned int mmc0_data8_1_pins[] = {
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/* D[0:7] */
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54, 55, 56, 57, 58, 59, 60, 61,
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};
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static const unsigned int mmc0_data8_1_mux[] = {
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MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
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MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK,
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};
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static const unsigned int mmc0_ctrl_1_pins[] = {
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/* CMD, CLK */
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67, 66,
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};
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static const unsigned int mmc0_ctrl_1_mux[] = {
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MMCCMD1_MARK, MMCCLK1_MARK,
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};
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/* - SDHI0 ------------------------------------------------------------------ */
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static const unsigned int sdhi0_data1_pins[] = {
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/* D0 */
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173,
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};
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static const unsigned int sdhi0_data1_mux[] = {
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SDHID0_0_MARK,
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};
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static const unsigned int sdhi0_data4_pins[] = {
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/* D[0:3] */
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173, 174, 175, 176,
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};
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static const unsigned int sdhi0_data4_mux[] = {
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SDHID0_0_MARK, SDHID0_1_MARK, SDHID0_2_MARK, SDHID0_3_MARK,
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};
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static const unsigned int sdhi0_ctrl_pins[] = {
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/* CMD, CLK */
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177, 171,
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};
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static const unsigned int sdhi0_ctrl_mux[] = {
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SDHICMD0_MARK, SDHICLK0_MARK,
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};
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static const unsigned int sdhi0_cd_pins[] = {
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/* CD */
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172,
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};
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static const unsigned int sdhi0_cd_mux[] = {
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SDHICD0_MARK,
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};
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static const unsigned int sdhi0_wp_pins[] = {
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/* WP */
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178,
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};
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static const unsigned int sdhi0_wp_mux[] = {
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SDHIWP0_MARK,
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};
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/* - SDHI1 ------------------------------------------------------------------ */
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static const unsigned int sdhi1_data1_pins[] = {
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/* D0 */
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180,
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};
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static const unsigned int sdhi1_data1_mux[] = {
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SDHID1_0_MARK,
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};
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static const unsigned int sdhi1_data4_pins[] = {
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/* D[0:3] */
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180, 181, 182, 183,
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};
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static const unsigned int sdhi1_data4_mux[] = {
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SDHID1_0_MARK, SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK,
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};
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static const unsigned int sdhi1_ctrl_pins[] = {
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/* CMD, CLK */
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184, 179,
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};
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static const unsigned int sdhi1_ctrl_mux[] = {
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SDHICMD1_MARK, SDHICLK1_MARK,
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};
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static const unsigned int sdhi2_data1_pins[] = {
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/* D0 */
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186,
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};
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static const unsigned int sdhi2_data1_mux[] = {
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SDHID2_0_MARK,
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};
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static const unsigned int sdhi2_data4_pins[] = {
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/* D[0:3] */
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186, 187, 188, 189,
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};
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static const unsigned int sdhi2_data4_mux[] = {
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SDHID2_0_MARK, SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK,
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};
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static const unsigned int sdhi2_ctrl_pins[] = {
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/* CMD, CLK */
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190, 185,
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};
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static const unsigned int sdhi2_ctrl_mux[] = {
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SDHICMD2_MARK, SDHICLK2_MARK,
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};
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(mmc0_data1_0),
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SH_PFC_PIN_GROUP(mmc0_data4_0),
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SH_PFC_PIN_GROUP(mmc0_data8_0),
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SH_PFC_PIN_GROUP(mmc0_ctrl_0),
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SH_PFC_PIN_GROUP(mmc0_data1_1),
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SH_PFC_PIN_GROUP(mmc0_data4_1),
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SH_PFC_PIN_GROUP(mmc0_data8_1),
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SH_PFC_PIN_GROUP(mmc0_ctrl_1),
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SH_PFC_PIN_GROUP(sdhi0_data1),
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SH_PFC_PIN_GROUP(sdhi0_data4),
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SH_PFC_PIN_GROUP(sdhi0_ctrl),
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SH_PFC_PIN_GROUP(sdhi0_cd),
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SH_PFC_PIN_GROUP(sdhi0_wp),
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SH_PFC_PIN_GROUP(sdhi1_data1),
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SH_PFC_PIN_GROUP(sdhi1_data4),
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SH_PFC_PIN_GROUP(sdhi1_ctrl),
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SH_PFC_PIN_GROUP(sdhi2_data1),
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SH_PFC_PIN_GROUP(sdhi2_data4),
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SH_PFC_PIN_GROUP(sdhi2_ctrl),
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};
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static const char * const mmc0_groups[] = {
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"mmc0_data1_0",
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"mmc0_data4_0",
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"mmc0_data8_0",
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"mmc0_ctrl_0",
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"mmc0_data1_1",
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"mmc0_data4_1",
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"mmc0_data8_1",
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"mmc0_ctrl_1",
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};
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static const char * const sdhi0_groups[] = {
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"sdhi0_data1",
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"sdhi0_data4",
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"sdhi0_ctrl",
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"sdhi0_cd",
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"sdhi0_wp",
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};
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static const char * const sdhi1_groups[] = {
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"sdhi1_data1",
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"sdhi1_data4",
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"sdhi1_ctrl",
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};
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static const char * const sdhi2_groups[] = {
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"sdhi2_data1",
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"sdhi2_data4",
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"sdhi2_ctrl",
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};
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static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(mmc0),
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SH_PFC_FUNCTION(sdhi0),
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SH_PFC_FUNCTION(sdhi1),
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SH_PFC_FUNCTION(sdhi2),
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};
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#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
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static const struct pinmux_func pinmux_func_gpios[] = {
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@ -1644,6 +1845,11 @@ const struct sh_pfc_soc_info sh7372_pinmux_info = {
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.pins = pinmux_pins,
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.nr_pins = ARRAY_SIZE(pinmux_pins),
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.groups = pinmux_groups,
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.nr_groups = ARRAY_SIZE(pinmux_groups),
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.functions = pinmux_functions,
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.nr_functions = ARRAY_SIZE(pinmux_functions),
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.func_gpios = pinmux_func_gpios,
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.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
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