ARM: kill off __mem_pci
__mem_pci is only used to enable readl/writel and friends. Just condition this on readl being defined and remove all the __mem_pci defines. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Colin Cross <ccross@android.com> Cc: Olof Johansson <olof@lixom.net> Cc: Stephen Warren <swarren@nvidia.com>
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@ -118,7 +118,6 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
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#include <mach/io.h>
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#else
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#define __io(a) ({ (void)(a); __typesafe_io(0); })
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#define __mem_pci(a) (a)
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#endif
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/*
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@ -221,18 +220,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
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* Again, this are defined to perform little endian accesses. See the
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* IO port primitives for more information.
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*/
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#ifdef __mem_pci
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#define readb_relaxed(c) ({ u8 __r = __raw_readb(__mem_pci(c)); __r; })
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#ifndef readl
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#define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
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#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
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__raw_readw(__mem_pci(c))); __r; })
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__raw_readw(c)); __r; })
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#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
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__raw_readl(__mem_pci(c))); __r; })
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__raw_readl(c)); __r; })
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#define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c)))
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#define writeb_relaxed(v,c) ((void)__raw_writeb(v,c))
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#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \
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cpu_to_le16(v),__mem_pci(c)))
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cpu_to_le16(v),c))
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#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
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cpu_to_le32(v),__mem_pci(c)))
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cpu_to_le32(v),c))
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#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
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#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
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@ -242,30 +241,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
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#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
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#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
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#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l)
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#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l)
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#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l)
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#define readsb(p,d,l) __raw_readsb(p,d,l)
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#define readsw(p,d,l) __raw_readsw(p,d,l)
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#define readsl(p,d,l) __raw_readsl(p,d,l)
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#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l)
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#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l)
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#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l)
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#define writesb(p,d,l) __raw_writesb(p,d,l)
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#define writesw(p,d,l) __raw_writesw(p,d,l)
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#define writesl(p,d,l) __raw_writesl(p,d,l)
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#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
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#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
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#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
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#define memset_io(c,v,l) _memset_io(c,(v),(l))
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#define memcpy_fromio(a,c,l) _memcpy_fromio((a),c,(l))
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#define memcpy_toio(c,a,l) _memcpy_toio(c,(a),(l))
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#elif !defined(readb)
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#define readb(c) (__readwrite_bug("readb"),0)
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#define readw(c) (__readwrite_bug("readw"),0)
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#define readl(c) (__readwrite_bug("readl"),0)
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#define writeb(v,c) __readwrite_bug("writeb")
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#define writew(v,c) __readwrite_bug("writew")
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#define writel(v,c) __readwrite_bug("writel")
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#define check_signature(io,sig,len) (0)
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#endif /* __mem_pci */
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#endif /* readl */
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/*
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* ioremap and friends.
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@ -15,6 +15,5 @@
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#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \
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DOVE_PCIE0_IO_VIRT_BASE))
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#define __mem_pci(a) (a)
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#endif
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@ -27,18 +27,5 @@
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* Translation of various region addresses to virtual addresses
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*/
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#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
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#if 1
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#define __mem_pci(a) (a)
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#else
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static inline void __iomem *___mem_pci(void __iomem *p)
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{
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unsigned long a = (unsigned long)p;
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BUG_ON(a <= 0xc0000000 || a >= 0xe0000000);
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return p;
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}
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#define __mem_pci(a) ___mem_pci(a)
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#endif
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#endif
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@ -29,6 +29,5 @@
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#define PCI_IO_VADDR 0xee000000
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#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
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#define __mem_pci(a) (a)
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#endif
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@ -22,8 +22,6 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(a) __iop13xx_io(a)
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#define __mem_pci(a) (a)
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#define __mem_isa(a) (a)
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extern void __iomem * __iop13xx_io(unsigned long io_addr);
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@ -15,6 +15,5 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
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#define __mem_pci(a) (a)
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#endif
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@ -15,6 +15,5 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
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#define __mem_pci(a) (a)
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#endif
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@ -18,7 +18,6 @@
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#include <mach/hardware.h>
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#define IO_SPACE_LIMIT 0xffffffff
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#define __mem_pci(a) (a)
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/*
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* The A? revisions of the IXP2000s assert byte lanes for PCI I/O
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@ -18,6 +18,5 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
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#define __mem_pci(a) (a)
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#endif
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@ -39,11 +39,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
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* but in some cases the performance hit is acceptable. In addition, you
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* cannot mmap() PCI devices in this case.
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*/
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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#define __mem_pci(a) (a)
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#else
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#ifdef CONFIG_IXP4XX_INDIRECT_PCI
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/*
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* In the case of using indirect PCI, we simply return the actual PCI
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@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
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}
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#define __io(a) __io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
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}
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#define __io(a) __io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -28,9 +28,4 @@
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*/
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#define __io(a) (PCIO_BASE + ((a) << 2))
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/*
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* 1:1 mapping for ioremapped regions.
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*/
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#define __mem_pci(x) (x)
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#endif
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@ -208,9 +208,4 @@ DECLARE_IO(int,l,"")
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#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
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#define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l)
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/*
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* 1:1 mapping for ioremapped regions.
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*/
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#define __mem_pci(x) (x)
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#endif
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@ -15,6 +15,4 @@
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#define __io(a) ((void __iomem *)(0xe0000000 + (a)))
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#define __mem_pci(addr) (addr)
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#endif
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@ -40,7 +40,6 @@ static inline void __iomem *__io(unsigned long addr)
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#endif
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#define __io(a) __io(a)
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#define __mem_pci(a) (a)
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#endif
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