Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev: ahci: improve spurious SDB FIS handling ahci/pata_jmicron: match class not function number jmicron ATA: reimplement jmicron ATA quirk pata_jmicron: drop unnecessary device programming in [re]init libata: blacklist FUJITSU MHT2060BH for NCQ sata_sil24: kill unused local variable idx in sil24_fill_sg() libata: clear drvdata in ata_host_release(), take#2
This commit is contained in:
Коммит
562aa1d4c6
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@ -200,6 +200,7 @@ struct ahci_port_priv {
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/* for NCQ spurious interrupt analysis */
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/* for NCQ spurious interrupt analysis */
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unsigned int ncq_saw_d2h:1;
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unsigned int ncq_saw_d2h:1;
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unsigned int ncq_saw_dmas:1;
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unsigned int ncq_saw_dmas:1;
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unsigned int ncq_saw_sdb:1;
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};
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};
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static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg);
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static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg);
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@ -384,12 +385,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x294d), board_ahci_pi }, /* ICH9 */
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{ PCI_VDEVICE(INTEL, 0x294d), board_ahci_pi }, /* ICH9 */
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{ PCI_VDEVICE(INTEL, 0x294e), board_ahci_pi }, /* ICH9M */
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{ PCI_VDEVICE(INTEL, 0x294e), board_ahci_pi }, /* ICH9M */
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/* JMicron */
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/* JMicron 360/1/3/5/6, match class to avoid IDE function */
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{ PCI_VDEVICE(JMICRON, 0x2360), board_ahci_ign_iferr }, /* JMB360 */
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{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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{ PCI_VDEVICE(JMICRON, 0x2361), board_ahci_ign_iferr }, /* JMB361 */
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PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci_ign_iferr },
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{ PCI_VDEVICE(JMICRON, 0x2363), board_ahci_ign_iferr }, /* JMB363 */
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{ PCI_VDEVICE(JMICRON, 0x2365), board_ahci_ign_iferr }, /* JMB365 */
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{ PCI_VDEVICE(JMICRON, 0x2366), board_ahci_ign_iferr }, /* JMB366 */
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/* ATI */
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/* ATI */
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{ PCI_VDEVICE(ATI, 0x4380), board_ahci }, /* ATI SB600 non-raid */
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{ PCI_VDEVICE(ATI, 0x4380), board_ahci }, /* ATI SB600 non-raid */
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@ -1160,23 +1158,31 @@ static void ahci_host_intr(struct ata_port *ap)
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}
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}
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if (status & PORT_IRQ_SDB_FIS) {
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if (status & PORT_IRQ_SDB_FIS) {
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/* SDB FIS containing spurious completions might be
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* dangerous, whine and fail commands with HSM
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* violation. EH will turn off NCQ after several such
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* failures.
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*/
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const __le32 *f = pp->rx_fis + RX_FIS_SDB;
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const __le32 *f = pp->rx_fis + RX_FIS_SDB;
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ata_ehi_push_desc(ehi, "spurious completion during NCQ "
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if (le32_to_cpu(f[1])) {
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"issue=0x%x SAct=0x%x FIS=%08x:%08x",
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/* SDB FIS containing spurious completions
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readl(port_mmio + PORT_CMD_ISSUE),
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* might be dangerous, whine and fail commands
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readl(port_mmio + PORT_SCR_ACT),
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* with HSM violation. EH will turn off NCQ
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le32_to_cpu(f[0]), le32_to_cpu(f[1]));
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* after several such failures.
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*/
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ehi->err_mask |= AC_ERR_HSM;
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ata_ehi_push_desc(ehi,
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ehi->action |= ATA_EH_SOFTRESET;
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"spurious completions during NCQ "
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ata_port_freeze(ap);
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"issue=0x%x SAct=0x%x FIS=%08x:%08x",
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readl(port_mmio + PORT_CMD_ISSUE),
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readl(port_mmio + PORT_SCR_ACT),
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le32_to_cpu(f[0]), le32_to_cpu(f[1]));
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ehi->err_mask |= AC_ERR_HSM;
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ehi->action |= ATA_EH_SOFTRESET;
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ata_port_freeze(ap);
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} else {
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if (!pp->ncq_saw_sdb)
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ata_port_printk(ap, KERN_INFO,
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"spurious SDB FIS %08x:%08x during NCQ, "
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"this message won't be printed again\n",
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le32_to_cpu(f[0]), le32_to_cpu(f[1]));
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pp->ncq_saw_sdb = 1;
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}
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known_irq = 1;
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known_irq = 1;
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}
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}
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@ -1665,13 +1671,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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if (!printed_version++)
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if (!printed_version++)
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dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
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dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
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if (pdev->vendor == PCI_VENDOR_ID_JMICRON) {
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/* Function 1 is the PATA controller except on the 368, where
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we are not AHCI anyway */
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if (PCI_FUNC(pdev->devfn))
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return -ENODEV;
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}
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rc = pcim_enable_device(pdev);
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rc = pcim_enable_device(pdev);
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if (rc)
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if (rc)
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return rc;
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return rc;
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@ -3346,6 +3346,8 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
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/* Devices where NCQ should be avoided */
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/* Devices where NCQ should be avoided */
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/* NCQ is slow */
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/* NCQ is slow */
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{ "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
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{ "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
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/* http://thread.gmane.org/gmane.linux.ide/14907 */
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{ "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
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/* Devices with NCQ limits */
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/* Devices with NCQ limits */
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@ -5680,6 +5682,8 @@ static void ata_host_release(struct device *gendev, void *res)
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if (host->ops->host_stop)
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if (host->ops->host_stop)
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host->ops->host_stop(host);
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host->ops->host_stop(host);
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dev_set_drvdata(gendev, NULL);
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}
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}
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/**
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/**
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@ -5902,7 +5906,6 @@ int ata_device_add(const struct ata_probe_ent *ent)
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err_out:
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err_out:
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devres_release_group(dev, ata_device_add);
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devres_release_group(dev, ata_device_add);
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dev_set_drvdata(dev, NULL);
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VPRINTK("EXIT, returning %d\n", rc);
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VPRINTK("EXIT, returning %d\n", rc);
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return 0;
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return 0;
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}
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}
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@ -306,7 +306,6 @@ static void __devexit cs5520_remove_one(struct pci_dev *pdev)
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struct ata_host *host = dev_get_drvdata(dev);
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struct ata_host *host = dev_get_drvdata(dev);
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ata_host_detach(host);
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ata_host_detach(host);
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dev_set_drvdata(dev, NULL);
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}
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}
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/**
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/**
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@ -128,7 +128,6 @@ static void isapnp_remove_one(struct pnp_dev *idev)
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struct ata_host *host = dev_get_drvdata(dev);
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struct ata_host *host = dev_get_drvdata(dev);
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ata_host_detach(host);
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ata_host_detach(host);
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dev_set_drvdata(dev, NULL);
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}
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}
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static struct pnp_device_id isapnp_devices[] = {
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static struct pnp_device_id isapnp_devices[] = {
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@ -202,49 +202,20 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i
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};
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};
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struct ata_port_info *port_info[2] = { &info, &info };
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struct ata_port_info *port_info[2] = { &info, &info };
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u32 reg;
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/* PATA controller is fn 1, AHCI is fn 0 */
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if (id->driver_data != 368 && PCI_FUNC(pdev->devfn) != 1)
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return -ENODEV;
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/* The 365/66 have two PATA channels, redirect the second */
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if (id->driver_data == 365 || id->driver_data == 366) {
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pci_read_config_dword(pdev, 0x80, ®);
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reg |= (1 << 24); /* IDE1 to PATA IDE secondary */
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pci_write_config_dword(pdev, 0x80, reg);
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}
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return ata_pci_init_one(pdev, port_info, 2);
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return ata_pci_init_one(pdev, port_info, 2);
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}
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}
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static int jmicron_reinit_one(struct pci_dev *pdev)
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{
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u32 reg;
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switch(pdev->device) {
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case PCI_DEVICE_ID_JMICRON_JMB368:
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break;
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case PCI_DEVICE_ID_JMICRON_JMB365:
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case PCI_DEVICE_ID_JMICRON_JMB366:
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/* Restore mapping or disks swap and boy does it get ugly */
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pci_read_config_dword(pdev, 0x80, ®);
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reg |= (1 << 24); /* IDE1 to PATA IDE secondary */
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pci_write_config_dword(pdev, 0x80, reg);
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/* Fall through */
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default:
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/* Make sure AHCI is turned back on */
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pci_write_config_byte(pdev, 0x41, 0xa1);
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}
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return ata_pci_device_resume(pdev);
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}
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static const struct pci_device_id jmicron_pci_tbl[] = {
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static const struct pci_device_id jmicron_pci_tbl[] = {
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{ PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB361), 361},
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{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361,
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{ PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB363), 363},
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PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 361 },
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{ PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB365), 365},
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{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363,
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{ PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB366), 366},
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PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 363 },
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{ PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB368), 368},
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{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365,
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PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 365 },
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{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366,
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PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 366 },
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{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368,
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PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 368 },
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{ } /* terminate list */
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{ } /* terminate list */
|
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};
|
};
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@ -255,7 +226,7 @@ static struct pci_driver jmicron_pci_driver = {
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.probe = jmicron_init_one,
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.probe = jmicron_init_one,
|
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.remove = ata_pci_remove_one,
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.remove = ata_pci_remove_one,
|
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.suspend = ata_pci_device_suspend,
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.suspend = ata_pci_device_suspend,
|
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.resume = jmicron_reinit_one,
|
.resume = ata_pci_device_resume,
|
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};
|
};
|
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|
|
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static int __init jmicron_init(void)
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static int __init jmicron_init(void)
|
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|
|
|
@ -228,7 +228,6 @@ static int __devexit pata_platform_remove(struct platform_device *pdev)
|
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struct ata_host *host = dev_get_drvdata(dev);
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struct ata_host *host = dev_get_drvdata(dev);
|
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|
|
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ata_host_detach(host);
|
ata_host_detach(host);
|
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dev_set_drvdata(dev, NULL);
|
|
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|
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return 0;
|
return 0;
|
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}
|
}
|
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|
|
|
@ -647,7 +647,6 @@ static inline void sil24_fill_sg(struct ata_queued_cmd *qc,
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struct sil24_sge *sge)
|
struct sil24_sge *sge)
|
||||||
{
|
{
|
||||||
struct scatterlist *sg;
|
struct scatterlist *sg;
|
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unsigned int idx = 0;
|
|
||||||
|
|
||||||
ata_for_each_sg(sg, qc) {
|
ata_for_each_sg(sg, qc) {
|
||||||
sge->addr = cpu_to_le64(sg_dma_address(sg));
|
sge->addr = cpu_to_le64(sg_dma_address(sg));
|
||||||
|
@ -656,9 +655,7 @@ static inline void sil24_fill_sg(struct ata_queued_cmd *qc,
|
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sge->flags = cpu_to_le32(SGE_TRM);
|
sge->flags = cpu_to_le32(SGE_TRM);
|
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else
|
else
|
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sge->flags = 0;
|
sge->flags = 0;
|
||||||
|
|
||||||
sge++;
|
sge++;
|
||||||
idx++;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1218,45 +1218,68 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, asus_hides_a
|
||||||
* do this early on to make the additional device appear during
|
* do this early on to make the additional device appear during
|
||||||
* the PCI scanning.
|
* the PCI scanning.
|
||||||
*/
|
*/
|
||||||
|
static void quirk_jmicron_ata(struct pci_dev *pdev)
|
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static void quirk_jmicron_dualfn(struct pci_dev *pdev)
|
|
||||||
{
|
{
|
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u32 conf;
|
u32 conf1, conf5, class;
|
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u8 hdr;
|
u8 hdr;
|
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|
|
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/* Only poke fn 0 */
|
/* Only poke fn 0 */
|
||||||
if (PCI_FUNC(pdev->devfn))
|
if (PCI_FUNC(pdev->devfn))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
switch(pdev->device) {
|
pci_read_config_dword(pdev, 0x40, &conf1);
|
||||||
case PCI_DEVICE_ID_JMICRON_JMB365:
|
pci_read_config_dword(pdev, 0x80, &conf5);
|
||||||
case PCI_DEVICE_ID_JMICRON_JMB366:
|
|
||||||
/* Redirect IDE second PATA port to the right spot */
|
|
||||||
pci_read_config_dword(pdev, 0x80, &conf);
|
|
||||||
conf |= (1 << 24);
|
|
||||||
/* Fall through */
|
|
||||||
pci_write_config_dword(pdev, 0x80, conf);
|
|
||||||
case PCI_DEVICE_ID_JMICRON_JMB361:
|
|
||||||
case PCI_DEVICE_ID_JMICRON_JMB363:
|
|
||||||
pci_read_config_dword(pdev, 0x40, &conf);
|
|
||||||
/* Enable dual function mode, AHCI on fn 0, IDE fn1 */
|
|
||||||
/* Set the class codes correctly and then direct IDE 0 */
|
|
||||||
conf &= ~0x000FF200; /* Clear bit 9 and 12-19 */
|
|
||||||
conf |= 0x00C2A102; /* Set 1, 8, 13, 15, 17, 22, 23 */
|
|
||||||
pci_write_config_dword(pdev, 0x40, conf);
|
|
||||||
|
|
||||||
/* Reconfigure so that the PCI scanner discovers the
|
conf1 &= ~0x00CFF302; /* Clear bit 1, 8, 9, 12-19, 22, 23 */
|
||||||
device is now multifunction */
|
conf5 &= ~(1 << 24); /* Clear bit 24 */
|
||||||
|
|
||||||
pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr);
|
switch (pdev->device) {
|
||||||
pdev->hdr_type = hdr & 0x7f;
|
case PCI_DEVICE_ID_JMICRON_JMB360:
|
||||||
pdev->multifunction = !!(hdr & 0x80);
|
/* The controller should be in single function ahci mode */
|
||||||
|
conf1 |= 0x0002A100; /* Set 8, 13, 15, 17 */
|
||||||
|
break;
|
||||||
|
|
||||||
break;
|
case PCI_DEVICE_ID_JMICRON_JMB365:
|
||||||
|
case PCI_DEVICE_ID_JMICRON_JMB366:
|
||||||
|
/* Redirect IDE second PATA port to the right spot */
|
||||||
|
conf5 |= (1 << 24);
|
||||||
|
/* Fall through */
|
||||||
|
case PCI_DEVICE_ID_JMICRON_JMB361:
|
||||||
|
case PCI_DEVICE_ID_JMICRON_JMB363:
|
||||||
|
/* Enable dual function mode, AHCI on fn 0, IDE fn1 */
|
||||||
|
/* Set the class codes correctly and then direct IDE 0 */
|
||||||
|
conf1 |= 0x00C2A102; /* Set 1, 8, 13, 15, 17, 22, 23 */
|
||||||
|
break;
|
||||||
|
|
||||||
|
case PCI_DEVICE_ID_JMICRON_JMB368:
|
||||||
|
/* The controller should be in single function IDE mode */
|
||||||
|
conf1 |= 0x00C00000; /* Set 22, 23 */
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pci_write_config_dword(pdev, 0x40, conf1);
|
||||||
|
pci_write_config_dword(pdev, 0x80, conf5);
|
||||||
|
|
||||||
|
/* Update pdev accordingly */
|
||||||
|
pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr);
|
||||||
|
pdev->hdr_type = hdr & 0x7f;
|
||||||
|
pdev->multifunction = !!(hdr & 0x80);
|
||||||
|
|
||||||
|
pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class);
|
||||||
|
pdev->class = class >> 8;
|
||||||
}
|
}
|
||||||
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, quirk_jmicron_dualfn);
|
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata);
|
||||||
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, quirk_jmicron_dualfn);
|
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata);
|
||||||
|
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata);
|
||||||
|
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata);
|
||||||
|
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata);
|
||||||
|
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, quirk_jmicron_ata);
|
||||||
|
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata);
|
||||||
|
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata);
|
||||||
|
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata);
|
||||||
|
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata);
|
||||||
|
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata);
|
||||||
|
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, quirk_jmicron_ata);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
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