[PATCH] powerpc: Move arch/ppc*/kernel/vecemu.c to arch/powerpc
This file is the same in both architectures so create arch/powerpc/kernel and move it there. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Stephen Rothwell
Paul Mackerras
Родитель
17b1dc07ae
Коммит
564ee7a566
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@ -36,3 +36,5 @@ ifndef CONFIG_MATH_EMULATION
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obj-$(CONFIG_8xx) += softemu8xx.o
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endif
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# These are here while we do the architecture merge
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vecemu-y += ../../powerpc/kernel/vecemu.o
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@ -83,3 +83,6 @@ ifeq ($(CONFIG_PPC_ISERIES),y)
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arch/ppc64/kernel/head.o: arch/ppc64/kernel/lparmap.s
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AFLAGS_head.o += -Iarch/ppc64/kernel
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endif
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# These are here while we do the architecture merge
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vecemu-y += ../../powerpc/kernel/vecemu.o
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@ -1,346 +0,0 @@
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/*
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* Routines to emulate some Altivec/VMX instructions, specifically
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* those that can trap when given denormalized operands in Java mode.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <asm/ptrace.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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/* Functions in vector.S */
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extern void vaddfp(vector128 *dst, vector128 *a, vector128 *b);
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extern void vsubfp(vector128 *dst, vector128 *a, vector128 *b);
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extern void vmaddfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
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extern void vnmsubfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
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extern void vrefp(vector128 *dst, vector128 *src);
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extern void vrsqrtefp(vector128 *dst, vector128 *src);
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extern void vexptep(vector128 *dst, vector128 *src);
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static unsigned int exp2s[8] = {
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0x800000,
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0x8b95c2,
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0x9837f0,
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0xa5fed7,
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0xb504f3,
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0xc5672a,
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0xd744fd,
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0xeac0c7
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};
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/*
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* Computes an estimate of 2^x. The `s' argument is the 32-bit
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* single-precision floating-point representation of x.
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*/
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static unsigned int eexp2(unsigned int s)
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{
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int exp, pwr;
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unsigned int mant, frac;
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/* extract exponent field from input */
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exp = ((s >> 23) & 0xff) - 127;
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if (exp > 7) {
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/* check for NaN input */
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if (exp == 128 && (s & 0x7fffff) != 0)
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return s | 0x400000; /* return QNaN */
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/* 2^-big = 0, 2^+big = +Inf */
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return (s & 0x80000000)? 0: 0x7f800000; /* 0 or +Inf */
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}
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if (exp < -23)
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return 0x3f800000; /* 1.0 */
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/* convert to fixed point integer in 9.23 representation */
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pwr = (s & 0x7fffff) | 0x800000;
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if (exp > 0)
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pwr <<= exp;
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else
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pwr >>= -exp;
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if (s & 0x80000000)
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pwr = -pwr;
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/* extract integer part, which becomes exponent part of result */
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exp = (pwr >> 23) + 126;
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if (exp >= 254)
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return 0x7f800000;
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if (exp < -23)
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return 0;
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/* table lookup on top 3 bits of fraction to get mantissa */
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mant = exp2s[(pwr >> 20) & 7];
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/* linear interpolation using remaining 20 bits of fraction */
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asm("mulhwu %0,%1,%2" : "=r" (frac)
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: "r" (pwr << 12), "r" (0x172b83ff));
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asm("mulhwu %0,%1,%2" : "=r" (frac) : "r" (frac), "r" (mant));
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mant += frac;
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if (exp >= 0)
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return mant + (exp << 23);
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/* denormalized result */
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exp = -exp;
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mant += 1 << (exp - 1);
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return mant >> exp;
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}
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/*
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* Computes an estimate of log_2(x). The `s' argument is the 32-bit
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* single-precision floating-point representation of x.
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*/
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static unsigned int elog2(unsigned int s)
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{
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int exp, mant, lz, frac;
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exp = s & 0x7f800000;
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mant = s & 0x7fffff;
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if (exp == 0x7f800000) { /* Inf or NaN */
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if (mant != 0)
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s |= 0x400000; /* turn NaN into QNaN */
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return s;
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}
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if ((exp | mant) == 0) /* +0 or -0 */
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return 0xff800000; /* return -Inf */
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if (exp == 0) {
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/* denormalized */
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asm("cntlzw %0,%1" : "=r" (lz) : "r" (mant));
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mant <<= lz - 8;
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exp = (-118 - lz) << 23;
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} else {
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mant |= 0x800000;
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exp -= 127 << 23;
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}
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if (mant >= 0xb504f3) { /* 2^0.5 * 2^23 */
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exp |= 0x400000; /* 0.5 * 2^23 */
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asm("mulhwu %0,%1,%2" : "=r" (mant)
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: "r" (mant), "r" (0xb504f334)); /* 2^-0.5 * 2^32 */
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}
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if (mant >= 0x9837f0) { /* 2^0.25 * 2^23 */
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exp |= 0x200000; /* 0.25 * 2^23 */
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asm("mulhwu %0,%1,%2" : "=r" (mant)
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: "r" (mant), "r" (0xd744fccb)); /* 2^-0.25 * 2^32 */
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}
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if (mant >= 0x8b95c2) { /* 2^0.125 * 2^23 */
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exp |= 0x100000; /* 0.125 * 2^23 */
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asm("mulhwu %0,%1,%2" : "=r" (mant)
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: "r" (mant), "r" (0xeac0c6e8)); /* 2^-0.125 * 2^32 */
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}
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if (mant > 0x800000) { /* 1.0 * 2^23 */
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/* calculate (mant - 1) * 1.381097463 */
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/* 1.381097463 == 0.125 / (2^0.125 - 1) */
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asm("mulhwu %0,%1,%2" : "=r" (frac)
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: "r" ((mant - 0x800000) << 1), "r" (0xb0c7cd3a));
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exp += frac;
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}
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s = exp & 0x80000000;
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if (exp != 0) {
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if (s)
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exp = -exp;
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asm("cntlzw %0,%1" : "=r" (lz) : "r" (exp));
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lz = 8 - lz;
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if (lz > 0)
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exp >>= lz;
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else if (lz < 0)
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exp <<= -lz;
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s += ((lz + 126) << 23) + exp;
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}
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return s;
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}
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#define VSCR_SAT 1
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static int ctsxs(unsigned int x, int scale, unsigned int *vscrp)
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{
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int exp, mant;
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exp = (x >> 23) & 0xff;
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mant = x & 0x7fffff;
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if (exp == 255 && mant != 0)
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return 0; /* NaN -> 0 */
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exp = exp - 127 + scale;
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if (exp < 0)
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return 0; /* round towards zero */
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if (exp >= 31) {
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/* saturate, unless the result would be -2^31 */
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if (x + (scale << 23) != 0xcf000000)
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*vscrp |= VSCR_SAT;
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return (x & 0x80000000)? 0x80000000: 0x7fffffff;
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}
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mant |= 0x800000;
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mant = (mant << 7) >> (30 - exp);
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return (x & 0x80000000)? -mant: mant;
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}
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static unsigned int ctuxs(unsigned int x, int scale, unsigned int *vscrp)
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{
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int exp;
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unsigned int mant;
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exp = (x >> 23) & 0xff;
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mant = x & 0x7fffff;
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if (exp == 255 && mant != 0)
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return 0; /* NaN -> 0 */
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exp = exp - 127 + scale;
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if (exp < 0)
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return 0; /* round towards zero */
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if (x & 0x80000000) {
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/* negative => saturate to 0 */
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*vscrp |= VSCR_SAT;
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return 0;
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}
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if (exp >= 32) {
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/* saturate */
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*vscrp |= VSCR_SAT;
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return 0xffffffff;
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}
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mant |= 0x800000;
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mant = (mant << 8) >> (31 - exp);
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return mant;
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}
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/* Round to floating integer, towards 0 */
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static unsigned int rfiz(unsigned int x)
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{
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int exp;
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exp = ((x >> 23) & 0xff) - 127;
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if (exp == 128 && (x & 0x7fffff) != 0)
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return x | 0x400000; /* NaN -> make it a QNaN */
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if (exp >= 23)
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return x; /* it's an integer already (or Inf) */
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if (exp < 0)
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return x & 0x80000000; /* |x| < 1.0 rounds to 0 */
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return x & ~(0x7fffff >> exp);
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}
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/* Round to floating integer, towards +/- Inf */
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static unsigned int rfii(unsigned int x)
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{
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int exp, mask;
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exp = ((x >> 23) & 0xff) - 127;
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if (exp == 128 && (x & 0x7fffff) != 0)
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return x | 0x400000; /* NaN -> make it a QNaN */
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if (exp >= 23)
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return x; /* it's an integer already (or Inf) */
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if ((x & 0x7fffffff) == 0)
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return x; /* +/-0 -> +/-0 */
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if (exp < 0)
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/* 0 < |x| < 1.0 rounds to +/- 1.0 */
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return (x & 0x80000000) | 0x3f800000;
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mask = 0x7fffff >> exp;
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/* mantissa overflows into exponent - that's OK,
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it can't overflow into the sign bit */
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return (x + mask) & ~mask;
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}
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/* Round to floating integer, to nearest */
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static unsigned int rfin(unsigned int x)
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{
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int exp, half;
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exp = ((x >> 23) & 0xff) - 127;
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if (exp == 128 && (x & 0x7fffff) != 0)
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return x | 0x400000; /* NaN -> make it a QNaN */
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if (exp >= 23)
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return x; /* it's an integer already (or Inf) */
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if (exp < -1)
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return x & 0x80000000; /* |x| < 0.5 -> +/-0 */
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if (exp == -1)
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/* 0.5 <= |x| < 1.0 rounds to +/- 1.0 */
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return (x & 0x80000000) | 0x3f800000;
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half = 0x400000 >> exp;
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/* add 0.5 to the magnitude and chop off the fraction bits */
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return (x + half) & ~(0x7fffff >> exp);
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}
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int
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emulate_altivec(struct pt_regs *regs)
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{
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unsigned int instr, i;
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unsigned int va, vb, vc, vd;
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vector128 *vrs;
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if (get_user(instr, (unsigned int __user *) regs->nip))
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return -EFAULT;
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if ((instr >> 26) != 4)
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return -EINVAL; /* not an altivec instruction */
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vd = (instr >> 21) & 0x1f;
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va = (instr >> 16) & 0x1f;
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vb = (instr >> 11) & 0x1f;
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vc = (instr >> 6) & 0x1f;
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vrs = current->thread.vr;
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switch (instr & 0x3f) {
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case 10:
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switch (vc) {
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case 0: /* vaddfp */
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vaddfp(&vrs[vd], &vrs[va], &vrs[vb]);
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break;
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case 1: /* vsubfp */
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vsubfp(&vrs[vd], &vrs[va], &vrs[vb]);
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break;
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case 4: /* vrefp */
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vrefp(&vrs[vd], &vrs[vb]);
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break;
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case 5: /* vrsqrtefp */
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vrsqrtefp(&vrs[vd], &vrs[vb]);
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break;
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case 6: /* vexptefp */
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for (i = 0; i < 4; ++i)
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vrs[vd].u[i] = eexp2(vrs[vb].u[i]);
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break;
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case 7: /* vlogefp */
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for (i = 0; i < 4; ++i)
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vrs[vd].u[i] = elog2(vrs[vb].u[i]);
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break;
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case 8: /* vrfin */
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for (i = 0; i < 4; ++i)
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vrs[vd].u[i] = rfin(vrs[vb].u[i]);
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break;
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case 9: /* vrfiz */
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for (i = 0; i < 4; ++i)
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vrs[vd].u[i] = rfiz(vrs[vb].u[i]);
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break;
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case 10: /* vrfip */
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for (i = 0; i < 4; ++i) {
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u32 x = vrs[vb].u[i];
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x = (x & 0x80000000)? rfiz(x): rfii(x);
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vrs[vd].u[i] = x;
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}
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break;
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case 11: /* vrfim */
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for (i = 0; i < 4; ++i) {
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u32 x = vrs[vb].u[i];
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x = (x & 0x80000000)? rfii(x): rfiz(x);
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vrs[vd].u[i] = x;
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}
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break;
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case 14: /* vctuxs */
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for (i = 0; i < 4; ++i)
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vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va,
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¤t->thread.vscr.u[3]);
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break;
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case 15: /* vctsxs */
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for (i = 0; i < 4; ++i)
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vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va,
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¤t->thread.vscr.u[3]);
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break;
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default:
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return -EINVAL;
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}
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break;
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case 46: /* vmaddfp */
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vmaddfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
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break;
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case 47: /* vnmsubfp */
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vnmsubfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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