ARM i.MX25: Add devicetree
This adds a i.MX25 dtsi file along with the i.MX25 clock tree documentation. The devicetree should be fairly complete for: - uart - fec - i2c - spi - pwm - nand - gpio - wdog - esdhc - flexcan The more exotic devices currently miss clock bindings. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Sascha Hauer
Родитель
ef4bac5532
Коммит
5658a68fb5
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* Clock bindings for Freescale i.MX25
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Required properties:
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- compatible: Should be "fsl,imx25-ccm"
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- reg: Address and length of the register set
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- interrupts: Should contain CCM interrupt
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- #clock-cells: Should be <1>
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The clock consumer should specify the desired clock by having the clock
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ID in its "clocks" phandle cell. The following is a full list of i.MX25
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clocks and IDs.
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Clock ID
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---------------------------
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dummy 0
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osc 1
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mpll 2
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upll 3
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mpll_cpu_3_4 4
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cpu_sel 5
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cpu 6
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ahb 7
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usb_div 8
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ipg 9
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per0_sel 10
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per1_sel 11
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per2_sel 12
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per3_sel 13
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per4_sel 14
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per5_sel 15
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per6_sel 16
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per7_sel 17
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per8_sel 18
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per9_sel 19
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per10_sel 20
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per11_sel 21
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per12_sel 22
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per13_sel 23
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per14_sel 24
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per15_sel 25
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per0 26
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per1 27
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per2 28
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per3 29
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per4 30
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per5 31
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per6 32
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per7 33
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per8 34
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per9 35
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per10 36
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per11 37
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per12 38
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per13 39
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per14 40
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per15 41
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csi_ipg_per 42
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epit_ipg_per 43
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esai_ipg_per 44
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esdhc1_ipg_per 45
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esdhc2_ipg_per 46
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gpt_ipg_per 47
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i2c_ipg_per 48
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lcdc_ipg_per 49
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nfc_ipg_per 50
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owire_ipg_per 51
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pwm_ipg_per 52
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sim1_ipg_per 53
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sim2_ipg_per 54
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ssi1_ipg_per 55
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ssi2_ipg_per 56
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uart_ipg_per 57
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ata_ahb 58
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reserved 59
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csi_ahb 60
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emi_ahb 61
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esai_ahb 62
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esdhc1_ahb 63
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esdhc2_ahb 64
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fec_ahb 65
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lcdc_ahb 66
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rtic_ahb 67
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sdma_ahb 68
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slcdc_ahb 69
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usbotg_ahb 70
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reserved 71
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reserved 72
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reserved 73
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reserved 74
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can1_ipg 75
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can2_ipg 76
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csi_ipg 77
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cspi1_ipg 78
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cspi2_ipg 79
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cspi3_ipg 80
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dryice_ipg 81
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ect_ipg 82
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epit1_ipg 83
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epit2_ipg 84
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reserved 85
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esdhc1_ipg 86
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esdhc2_ipg 87
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fec_ipg 88
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reserved 89
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reserved 90
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reserved 91
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gpt1_ipg 92
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gpt2_ipg 93
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gpt3_ipg 94
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gpt4_ipg 95
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reserved 96
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reserved 97
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reserved 98
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iim_ipg 99
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reserved 100
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reserved 101
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kpp_ipg 102
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lcdc_ipg 103
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reserved 104
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pwm1_ipg 105
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pwm2_ipg 106
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pwm3_ipg 107
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pwm4_ipg 108
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rngb_ipg 109
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reserved 110
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scc_ipg 111
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sdma_ipg 112
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sim1_ipg 113
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sim2_ipg 114
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slcdc_ipg 115
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spba_ipg 116
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ssi1_ipg 117
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ssi2_ipg 118
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tsc_ipg 119
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uart1_ipg 120
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uart2_ipg 121
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uart3_ipg 122
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uart4_ipg 123
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uart5_ipg 124
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reserved 125
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wdt_ipg 126
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Examples:
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clks: ccm@53f80000 {
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compatible = "fsl,imx25-ccm";
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reg = <0x53f80000 0x4000>;
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interrupts = <31>;
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clock-output-names = ...
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"uart_ipg",
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"uart_serial",
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...;
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};
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uart1: serial@43f90000 {
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compatible = "fsl,imx25-uart", "fsl,imx21-uart";
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reg = <0x43f90000 0x4000>;
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interrupts = <45>;
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clocks = <&clks 79>, <&clks 50>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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@ -0,0 +1,515 @@
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/*
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* Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "skeleton.dtsi"
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/ {
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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gpio3 = &gpio4;
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usb0 = &usbotg;
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usb1 = &usbhost1;
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};
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asic: asic-interrupt-controller@68000000 {
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compatible = "fsl,imx25-asic", "fsl,avic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x68000000 0x8000000>;
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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osc {
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compatible = "fsl,imx-osc", "fixed-clock";
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clock-frequency = <24000000>;
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&asic>;
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ranges;
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aips@43f00000 { /* AIPS1 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x43f00000 0x100000>;
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ranges;
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i2c1: i2c@43f80000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
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reg = <0x43f80000 0x4000>;
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clocks = <&clks 48>;
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clock-names = "";
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interrupts = <3>;
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status = "disabled";
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};
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i2c3: i2c@43f84000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
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reg = <0x43f84000 0x4000>;
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clocks = <&clks 48>;
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clock-names = "";
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interrupts = <10>;
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status = "disabled";
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};
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can1: can@43f88000 {
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compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
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reg = <0x43f88000 0x4000>;
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interrupts = <43>;
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clocks = <&clks 75>, <&clks 75>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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can2: can@43f8c000 {
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compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
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reg = <0x43f8c000 0x4000>;
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interrupts = <44>;
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clocks = <&clks 76>, <&clks 76>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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uart1: serial@43f90000 {
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compatible = "fsl,imx25-uart", "fsl,imx21-uart";
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reg = <0x43f90000 0x4000>;
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interrupts = <45>;
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clocks = <&clks 120>, <&clks 57>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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uart2: serial@43f94000 {
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compatible = "fsl,imx25-uart", "fsl,imx21-uart";
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reg = <0x43f94000 0x4000>;
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interrupts = <32>;
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clocks = <&clks 121>, <&clks 57>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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i2c2: i2c@43f98000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
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reg = <0x43f98000 0x4000>;
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clocks = <&clks 48>;
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clock-names = "";
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interrupts = <4>;
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status = "disabled";
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};
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owire@43f9c000 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x43f9c000 0x4000>;
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clocks = <&clks 51>;
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clock-names = "";
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interrupts = <2>;
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status = "disabled";
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};
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spi1: cspi@43fa4000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
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reg = <0x43fa4000 0x4000>;
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clocks = <&clks 62>;
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clock-names = "ipg";
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interrupts = <14>;
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status = "disabled";
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};
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kpp@43fa8000 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x43fa8000 0x4000>;
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clocks = <&clks 102>;
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clock-names = "";
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interrupts = <24>;
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status = "disabled";
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};
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iomuxc@43fac000{
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compatible = "fsl,imx25-iomuxc";
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reg = <0x43fac000 0x4000>;
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};
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audmux@43fb0000 {
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compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
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reg = <0x43fb0000 0x4000>;
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status = "disabled";
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};
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};
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spba@50000000 {
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compatible = "fsl,spba-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x50000000 0x40000>;
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ranges;
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spi3: cspi@50004000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
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reg = <0x50004000 0x4000>;
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interrupts = <0>;
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clocks = <&clks 80>;
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clock-names = "ipg";
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status = "disabled";
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};
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uart4: serial@50008000 {
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compatible = "fsl,imx25-uart", "fsl,imx21-uart";
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reg = <0x50008000 0x4000>;
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interrupts = <5>;
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clocks = <&clks 123>, <&clks 57>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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uart3: serial@5000c000 {
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compatible = "fsl,imx25-uart", "fsl,imx21-uart";
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reg = <0x5000c000 0x4000>;
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interrupts = <18>;
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clocks = <&clks 122>, <&clks 57>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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spi2: cspi@50010000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
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reg = <0x50010000 0x4000>;
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clocks = <&clks 79>;
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clock-names = "ipg";
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interrupts = <13>;
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status = "disabled";
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};
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ssi2: ssi@50014000 {
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compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
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reg = <0x50014000 0x4000>;
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interrupts = <11>;
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status = "disabled";
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};
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esai@50018000 {
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reg = <0x50018000 0x4000>;
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interrupts = <7>;
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};
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uart5: serial@5002c000 {
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compatible = "fsl,imx25-uart", "fsl,imx21-uart";
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reg = <0x5002c000 0x4000>;
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interrupts = <40>;
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clocks = <&clks 124>, <&clks 57>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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tsc: tsc@50030000 {
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compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
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reg = <0x50030000 0x4000>;
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interrupts = <46>;
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clocks = <&clks 119>;
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clock-names = "ipg";
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status = "disabled";
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};
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ssi1: ssi@50034000 {
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compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
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reg = <0x50034000 0x4000>;
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interrupts = <12>;
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status = "disabled";
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};
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fec: ethernet@50038000 {
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compatible = "fsl,imx25-fec";
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reg = <0x50038000 0x4000>;
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interrupts = <57>;
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clocks = <&clks 88>, <&clks 65>;
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clock-names = "ipg", "ahb";
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status = "disabled";
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};
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};
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aips@53f00000 { /* AIPS2 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
|
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#size-cells = <1>;
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reg = <0x53f00000 0x100000>;
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ranges;
|
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|
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clks: ccm@53f80000 {
|
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compatible = "fsl,imx25-ccm";
|
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reg = <0x53f80000 0x4000>;
|
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interrupts = <31>;
|
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#clock-cells = <1>;
|
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};
|
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|
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gpt4: timer@53f84000 {
|
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compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
|
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reg = <0x53f84000 0x4000>;
|
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clocks = <&clks 9>, <&clks 45>;
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clock-names = "ipg", "per";
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interrupts = <1>;
|
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};
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gpt3: timer@53f88000 {
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compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
|
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reg = <0x53f88000 0x4000>;
|
||||
clocks = <&clks 9>, <&clks 47>;
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clock-names = "ipg", "per";
|
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interrupts = <29>;
|
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};
|
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|
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gpt2: timer@53f8c000 {
|
||||
compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
|
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reg = <0x53f8c000 0x4000>;
|
||||
clocks = <&clks 9>, <&clks 47>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <53>;
|
||||
};
|
||||
|
||||
gpt1: timer@53f90000 {
|
||||
compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
|
||||
reg = <0x53f90000 0x4000>;
|
||||
clocks = <&clks 9>, <&clks 47>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <54>;
|
||||
};
|
||||
|
||||
epit1: timer@53f94000 {
|
||||
compatible = "fsl,imx25-epit";
|
||||
reg = <0x53f94000 0x4000>;
|
||||
interrupts = <28>;
|
||||
};
|
||||
|
||||
epit2: timer@53f98000 {
|
||||
compatible = "fsl,imx25-epit";
|
||||
reg = <0x53f98000 0x4000>;
|
||||
interrupts = <27>;
|
||||
};
|
||||
|
||||
gpio4: gpio@53f9c000 {
|
||||
compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
|
||||
reg = <0x53f9c000 0x4000>;
|
||||
interrupts = <23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pwm2: pwm@53fa0000 {
|
||||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0x53fa0000 0x4000>;
|
||||
clocks = <&clks 106>, <&clks 36>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <36>;
|
||||
};
|
||||
|
||||
gpio3: gpio@53fa4000 {
|
||||
compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
|
||||
reg = <0x53fa4000 0x4000>;
|
||||
interrupts = <16>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pwm3: pwm@53fa8000 {
|
||||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0x53fa8000 0x4000>;
|
||||
clocks = <&clks 107>, <&clks 36>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <41>;
|
||||
};
|
||||
|
||||
esdhc1: esdhc@53fb4000 {
|
||||
compatible = "fsl,imx25-esdhc";
|
||||
reg = <0x53fb4000 0x4000>;
|
||||
interrupts = <9>;
|
||||
clocks = <&clks 86>, <&clks 63>, <&clks 45>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
esdhc2: esdhc@53fb8000 {
|
||||
compatible = "fsl,imx25-esdhc";
|
||||
reg = <0x53fb8000 0x4000>;
|
||||
interrupts = <8>;
|
||||
clocks = <&clks 87>, <&clks 64>, <&clks 46>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lcdc@53fbc000 {
|
||||
reg = <0x53fbc000 0x4000>;
|
||||
interrupts = <39>;
|
||||
clocks = <&clks 103>, <&clks 66>, <&clks 49>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
slcdc@53fc0000 {
|
||||
reg = <0x53fc0000 0x4000>;
|
||||
interrupts = <38>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm4: pwm@53fc8000 {
|
||||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
reg = <0x53fc8000 0x4000>;
|
||||
clocks = <&clks 108>, <&clks 36>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <42>;
|
||||
};
|
||||
|
||||
gpio1: gpio@53fcc000 {
|
||||
compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
|
||||
reg = <0x53fcc000 0x4000>;
|
||||
interrupts = <52>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio2: gpio@53fd0000 {
|
||||
compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
|
||||
reg = <0x53fd0000 0x4000>;
|
||||
interrupts = <51>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
sdma@53fd4000 {
|
||||
compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
|
||||
reg = <0x53fd4000 0x4000>;
|
||||
clocks = <&clks 112>, <&clks 68>;
|
||||
clock-names = "ipg", "ahb";
|
||||
interrupts = <34>;
|
||||
};
|
||||
|
||||
wdog@53fdc000 {
|
||||
compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
|
||||
reg = <0x53fdc000 0x4000>;
|
||||
clocks = <&clks 126>;
|
||||
clock-names = "";
|
||||
interrupts = <55>;
|
||||
};
|
||||
|
||||
pwm1: pwm@53fe0000 {
|
||||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0x53fe0000 0x4000>;
|
||||
clocks = <&clks 105>, <&clks 36>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <26>;
|
||||
};
|
||||
|
||||
usbphy1: usbphy@1 {
|
||||
compatible = "nop-usbphy";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy2: usbphy@2 {
|
||||
compatible = "nop-usbphy";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbotg: usb@53ff4000 {
|
||||
compatible = "fsl,imx25-usb", "fsl,imx27-usb";
|
||||
reg = <0x53ff4000 0x0200>;
|
||||
interrupts = <37>;
|
||||
clocks = <&clks 9>, <&clks 70>, <&clks 8>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
fsl,usbmisc = <&usbmisc 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbhost1: usb@53ff4400 {
|
||||
compatible = "fsl,imx25-usb", "fsl,imx27-usb";
|
||||
reg = <0x53ff4400 0x0200>;
|
||||
interrupts = <35>;
|
||||
clocks = <&clks 9>, <&clks 70>, <&clks 8>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
fsl,usbmisc = <&usbmisc 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbmisc: usbmisc@53ff4600 {
|
||||
#index-cells = <1>;
|
||||
compatible = "fsl,imx25-usbmisc";
|
||||
clocks = <&clks 9>, <&clks 70>, <&clks 8>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
reg = <0x53ff4600 0x00f>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dryice@53ffc000 {
|
||||
compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
|
||||
reg = <0x53ffc000 0x4000>;
|
||||
clocks = <&clks 81>;
|
||||
clock-names = "ipg";
|
||||
interrupts = <25>;
|
||||
};
|
||||
};
|
||||
|
||||
emi@80000000 {
|
||||
compatible = "fsl,emi-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x80000000 0x3b002000>;
|
||||
ranges;
|
||||
|
||||
nand@bb000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
compatible = "fsl,imx25-nand";
|
||||
reg = <0xbb000000 0x2000>;
|
||||
clocks = <&clks 50>;
|
||||
clock-names = "";
|
||||
interrupts = <33>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
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