From b1059186299df841a8774b5cd76bdd06dbc566f3 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Mon, 12 May 2014 16:22:12 +0200 Subject: [PATCH 1/7] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors Argument 3 (OUT) and 4 (ICPLL) of the atmel,pll-clk-output-ranges were missing. Also, the at91sam9261 doesn't really have a by 3 divisor. Signed-off-by: Alexandre Belloni Acked-by: Boris Brezillon Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/at91sam9261.dtsi | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi index e21dda0e8986..81f22476b024 100644 --- a/arch/arm/boot/dts/at91sam9261.dtsi +++ b/arch/arm/boot/dts/at91sam9261.dtsi @@ -545,7 +545,8 @@ reg = <0>; atmel,clk-input-range = <1000000 32000000>; #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>; + atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, + <190000000 240000000 2 1>; }; pllb: pllbck { @@ -554,9 +555,9 @@ interrupts-extended = <&pmc AT91_PMC_LOCKB>; clocks = <&main>; reg = <1>; - atmel,clk-input-range = <1000000 32000000>; + atmel,clk-input-range = <1000000 5000000>; #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>; + atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; }; mck: masterck { @@ -565,13 +566,13 @@ interrupts-extended = <&pmc AT91_PMC_MCKRDY>; clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; atmel,clk-output-range = <0 94000000>; - atmel,clk-divisors = <1 2 4 3>; + atmel,clk-divisors = <1 2 4 0>; }; usb: usbck { compatible = "atmel,at91rm9200-clk-usb"; #clock-cells = <0>; - atmel,clk-divisors = <1 2 4 3>; + atmel,clk-divisors = <1 2 4 0>; clocks = <&pllb>; }; From 32da8c850247f90d9f0bb4efc3729404d9d7436a Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Wed, 23 Apr 2014 10:53:39 +0200 Subject: [PATCH 2/7] ARM: at91/dt: sam9261: Add ssc2, SSC clocks and pcks Add ssc2 support, ssc2 pinctrl and clocks for the three SSCs. Also add support for the programmable clocks. Signed-off-by: Alexandre Belloni Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/at91sam9261.dtsi | 103 +++++++++++++++++++++++++++++ 1 file changed, 103 insertions(+) diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi index 81f22476b024..10083c236cbe 100644 --- a/arch/arm/boot/dts/at91sam9261.dtsi +++ b/arch/arm/boot/dts/at91sam9261.dtsi @@ -29,6 +29,7 @@ i2c0 = &i2c0; ssc0 = &ssc0; ssc1 = &ssc1; + ssc2 = &ssc2; }; cpus { @@ -182,6 +183,8 @@ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; + clocks = <&ssc0_clk>; + clock-names = "pclk"; status = "disabled"; }; @@ -191,6 +194,19 @@ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; + clocks = <&ssc1_clk>; + clock-names = "pclk"; + status = "disabled"; + }; + + ssc2: ssc@fffc4000 { + compatible = "atmel,at91rm9200-ssc"; + reg = <0xfffc4000 0x4000>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; + clocks = <&ssc2_clk>; + clock-names = "pclk"; status = "disabled"; }; @@ -385,6 +401,22 @@ }; }; + ssc2 { + pinctrl_ssc2_tx: ssc2_tx-0 { + atmel,pins = + , + , + ; + }; + + pinctrl_ssc2_rx: ssc2_rx-0 { + atmel,pins = + , + , + ; + }; + }; + spi0 { pinctrl_spi0: spi0-0 { atmel,pins = @@ -576,6 +608,38 @@ clocks = <&pllb>; }; + prog: progck { + compatible = "atmel,at91rm9200-clk-programmable"; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&pmc>; + clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; + + prog0: prog0 { + #clock-cells = <0>; + reg = <0>; + interrupts = ; + }; + + prog1: prog1 { + #clock-cells = <0>; + reg = <1>; + interrupts = ; + }; + + prog2: prog2 { + #clock-cells = <0>; + reg = <2>; + interrupts = ; + }; + + prog3: prog3 { + #clock-cells = <0>; + reg = <3>; + interrupts = ; + }; + }; + systemck { compatible = "atmel,at91rm9200-clk-system"; #address-cells = <1>; @@ -593,6 +657,30 @@ clocks = <&usb>; }; + pck0: pck0 { + #clock-cells = <0>; + reg = <8>; + clocks = <&prog0>; + }; + + pck1: pck1 { + #clock-cells = <0>; + reg = <9>; + clocks = <&prog1>; + }; + + pck2: pck2 { + #clock-cells = <0>; + reg = <10>; + clocks = <&prog2>; + }; + + pck3: pck3 { + #clock-cells = <0>; + reg = <11>; + clocks = <&prog3>; + }; + hclk0: hclk0 { #clock-cells = <0>; reg = <16>; @@ -667,6 +755,21 @@ reg = <13>; }; + ssc0_clk: ssc0_clk { + #clock-cells = <0>; + reg = <14>; + }; + + ssc1_clk: ssc1_clk { + #clock-cells = <0>; + reg = <15>; + }; + + ssc2_clk: ssc2_clk { + #clock-cells = <0>; + reg = <16>; + }; + tc0_clk: tc0_clk { #clock-cells = <0>; reg = <17>; From 201d7dd0da91e19db48536b3569c2792062ef598 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Wed, 23 Apr 2014 10:53:40 +0200 Subject: [PATCH 3/7] ARM: at91/dt: sam9rl: Fix PLL output range and mck divisors Argument 3 (OUT) and 4 (ICPLL) of the atmel,pll-clk-output-ranges were missing. Also, the at91sam9rl doesn't really have a by 3 divisor. Signed-off-by: Alexandre Belloni Acked-by: Boris BREZILLON Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/at91sam9rl.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi index 6202e161314a..981373c56bcc 100644 --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi @@ -815,8 +815,9 @@ clocks = <&main>; reg = <0>; atmel,clk-input-range = <1000000 32000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>; + #atmel,pll-clk-output-range-cells = <3>; + atmel,pll-clk-output-ranges = <80000000 200000000 0>, + <190000000 240000000 2>; }; utmi: utmick { @@ -833,7 +834,7 @@ interrupts-extended = <&pmc AT91_PMC_MCKRDY>; clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; atmel,clk-output-range = <0 94000000>; - atmel,clk-divisors = <1 2 4 3>; + atmel,clk-divisors = <1 2 4 0>; }; prog: progck { From a3b8a7c7f9513bc57fd3e6f1a7b6098f0ff39d14 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 27 Mar 2014 11:44:11 +0100 Subject: [PATCH 4/7] ARM: at91: add pull-up to i2c[02] on SAMA5D3 Xplained As there are no pull-up resistors on the board itself it can be useful to use the SoC pad pull-up to be able to easily connect usual i2c devices. Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/at91-sama5d3_xplained.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts index ce1375595e5f..ff8a159bb600 100644 --- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts @@ -43,6 +43,7 @@ }; i2c0: i2c@f0014000 { + pinctrl-0 = <&pinctrl_i2c0_pu>; status = "okay"; }; @@ -102,6 +103,7 @@ i2c2: i2c@f801c000 { dmas = <0>, <0>; /* Do not use DMA for i2c2 */ + pinctrl-0 = <&pinctrl_i2c2_pu>; status = "okay"; }; @@ -116,6 +118,18 @@ pinctrl@fffff200 { board { + pinctrl_i2c0_pu: i2c0_pu { + atmel,pins = + , + ; + }; + + pinctrl_i2c2_pu: i2c2_pu { + atmel,pins = + , + ; + }; + pinctrl_mmc0_cd: mmc0_cd { atmel,pins = ; From 5eefd5f4552aace32d8abb5e0a07060f28be4a61 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 24 Apr 2014 17:33:51 +0200 Subject: [PATCH 5/7] ARM: at91: add PWM pinctrl to SAMA5D3 Signed-off-by: Nicolas Ferre Acked-by: Alexandre Belloni --- arch/arm/boot/dts/sama5d3.dtsi | 78 ++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 9caa06b3641e..e08da17e1890 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -583,6 +583,84 @@ }; }; + pwm0 { + pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 { + atmel,pins = + ; /* conflicts with ISI_D4 and LCDDAT20 */ + }; + pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 { + atmel,pins = + ; /* conflicts with GTX0 */ + }; + pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 { + atmel,pins = + ; /* conflicts with ISI_D5 and LCDDAT21 */ + }; + pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 { + atmel,pins = + ; /* conflicts with GTX1 */ + }; + + pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 { + atmel,pins = + ; /* conflicts with ISI_D6 and LCDDAT22 */ + }; + pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 { + atmel,pins = + ; /* conflicts with GRX0 */ + }; + pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 { + atmel,pins = + ; /* conflicts with G125CKO and RTS1 */ + }; + pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 { + atmel,pins = + ; /* conflicts with ISI_D7 and LCDDAT23 */ + }; + pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 { + atmel,pins = + ; /* conflicts with GRX1 */ + }; + pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 { + atmel,pins = + ; /* conflicts with IRQ */ + }; + + pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 { + atmel,pins = + ; /* conflicts with GTXCK */ + }; + pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 { + atmel,pins = + ; /* conflicts with MCI0_DA4 and TIOA0 */ + }; + pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 { + atmel,pins = + ; /* conflicts with GTXEN */ + }; + pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 { + atmel,pins = + ; /* conflicts with MCI0_DA5 and TIOB0 */ + }; + + pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 { + atmel,pins = + ; /* conflicts with GRXDV */ + }; + pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 { + atmel,pins = + ; /* conflicts with MCI0_DA6 and TCLK0 */ + }; + pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 { + atmel,pins = + ; /* conflicts with GRXER */ + }; + pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 { + atmel,pins = + ; /* conflicts with MCI0_DA7 */ + }; + }; + spi0 { pinctrl_spi0: spi0-0 { atmel,pins = From 0da40f3d2371cddb4985222229fa373f2e8fbef2 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 24 Apr 2014 17:34:14 +0200 Subject: [PATCH 6/7] ARM: at91: add 2 PWM outputs to SAMA5D3 Xplained Add PWM high output of channels 0 and 1 to PA20 PA22 pins. Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/at91-sama5d3_xplained.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts index ff8a159bb600..0eacd92cd4b9 100644 --- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts @@ -56,6 +56,12 @@ status = "okay"; }; + pwm0: pwm@f002c000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>; + status = "okay"; + }; + usart0: serial@f001c000 { status = "okay"; }; From a93f9c88b7701d1c4c3b22d39d64a408f000a6ef Mon Sep 17 00:00:00 2001 From: Wenyou Yang Date: Mon, 21 Apr 2014 12:29:07 +0800 Subject: [PATCH 7/7] ARM: at91/dt: at91-sama5d3_xplained: add the regulator device node Signed-off-by: Wenyou Yang Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/at91-sama5d3_xplained.dts | 42 +++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts index 0eacd92cd4b9..f86fd76b312b 100644 --- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts @@ -49,6 +49,48 @@ i2c1: i2c@f0018000 { status = "okay"; + + pmic: act8865@5b { + compatible = "active-semi,act8865"; + reg = <0x5b>; + status = "okay"; + + regulators { + vcc_1v8_reg: DCDC_REG1 { + regulator-name = "VCC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vcc_1v2_reg: DCDC_REG2 { + regulator-name = "VCC_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vcc_3v3_reg: DCDC_REG3 { + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vddfuse_reg: LDO_REG1 { + regulator-name = "FUSE_2V5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + + vddana_reg: LDO_REG2 { + regulator-name = "VDDANA"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; }; macb0: ethernet@f0028000 {