MIPS: math-emu: Switch to using the MIPS rounding modes.
Previously math-emu was using the IEEE-754 constants internally. These were differing by having the constants for rounding to +/- infinity switched, so a conversion was necessary. This would be entirely avoidable if the MIPS constants were used throughout, so get rid of the bloat. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Родитель
aef3fb76aa
Коммит
56a6473339
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@ -67,21 +67,6 @@ static int fpux_emu(struct pt_regs *,
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/* Determine rounding mode from the RM bits of the FCSR */
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#define modeindex(v) ((v) & FPU_CSR_RM)
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/* Convert MIPS rounding mode (0..3) to IEEE library modes. */
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static const unsigned char ieee_rm[4] = {
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[FPU_CSR_RN] = IEEE754_RN,
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[FPU_CSR_RZ] = IEEE754_RZ,
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[FPU_CSR_RU] = IEEE754_RU,
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[FPU_CSR_RD] = IEEE754_RD,
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};
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/* Convert IEEE library modes to MIPS rounding mode (0..3). */
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static const unsigned char mips_rm[4] = {
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[IEEE754_RN] = FPU_CSR_RN,
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[IEEE754_RZ] = FPU_CSR_RZ,
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[IEEE754_RD] = FPU_CSR_RD,
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[IEEE754_RU] = FPU_CSR_RU,
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};
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/* convert condition code register number to csr bit */
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static const unsigned int fpucondbit[8] = {
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FPU_CSR_COND0,
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@ -907,8 +892,7 @@ emul:
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/* cop control register rd -> gpr[rt] */
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if (MIPSInst_RD(ir) == FPCREG_CSR) {
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value = ctx->fcr31;
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value = (value & ~FPU_CSR_RM) |
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mips_rm[modeindex(value)];
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value = (value & ~FPU_CSR_RM) | modeindex(value);
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pr_debug("%p gpr[%d]<-csr=%08x\n",
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(void *) (xcp->cp0_epc),
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MIPSInst_RT(ir), value);
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@ -939,9 +923,8 @@ emul:
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* Don't write reserved bits,
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* and convert to ieee library modes
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*/
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ctx->fcr31 = (value &
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~(FPU_CSR_RSVD | FPU_CSR_RM)) |
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ieee_rm[modeindex(value)];
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ctx->fcr31 = (value & ~(FPU_CSR_RSVD | FPU_CSR_RM)) |
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modeindex(value);
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}
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if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
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return SIGFPE;
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@ -1515,7 +1498,7 @@ copcsr:
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oldrm = ieee754_csr.rm;
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SPFROMREG(fs, MIPSInst_FS(ir));
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ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
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ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir));
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rv.w = ieee754sp_tint(fs);
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ieee754_csr.rm = oldrm;
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rfmt = w_fmt;
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@ -1539,7 +1522,7 @@ copcsr:
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oldrm = ieee754_csr.rm;
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SPFROMREG(fs, MIPSInst_FS(ir));
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ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
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ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir));
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rv.l = ieee754sp_tlong(fs);
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ieee754_csr.rm = oldrm;
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rfmt = l_fmt;
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@ -1692,7 +1675,7 @@ dcopuop:
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oldrm = ieee754_csr.rm;
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DPFROMREG(fs, MIPSInst_FS(ir));
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ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
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ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir));
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rv.w = ieee754dp_tint(fs);
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ieee754_csr.rm = oldrm;
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rfmt = w_fmt;
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@ -1716,7 +1699,7 @@ dcopuop:
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oldrm = ieee754_csr.rm;
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DPFROMREG(fs, MIPSInst_FS(ir));
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ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
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ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir));
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rv.l = ieee754dp_tlong(fs);
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ieee754_csr.rm = oldrm;
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rfmt = l_fmt;
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@ -1926,11 +1909,7 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
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* ieee754_csr. But ieee754_csr.rm is ieee
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* library modes. (not mips rounding mode)
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*/
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/* convert to ieee library modes */
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ieee754_csr.rm = ieee_rm[ieee754_csr.rm];
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sig = cop1Emulate(xcp, ctx, dec_insn, fault_addr);
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/* revert to mips rounding mode */
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ieee754_csr.rm = mips_rm[ieee754_csr.rm];
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}
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if (has_fpu)
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@ -91,7 +91,7 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
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if (xs == ys)
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return x;
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else
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return ieee754dp_zero(ieee754_csr.rm == IEEE754_RD);
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return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD);
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
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@ -168,7 +168,7 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
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xs = ys;
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}
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if (xm == 0)
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return ieee754dp_zero(ieee754_csr.rm == IEEE754_RD);
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return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD);
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/*
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* Normalize to rounding precision.
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@ -80,7 +80,7 @@ union ieee754dp ieee754dp_sqrt(union ieee754dp x)
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oldcsr = ieee754_csr;
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ieee754_csr.mx &= ~IEEE754_INEXACT;
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ieee754_csr.sx &= ~IEEE754_INEXACT;
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ieee754_csr.rm = IEEE754_RN;
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ieee754_csr.rm = FPU_CSR_RN;
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/* adjust exponent to prevent overflow */
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scalx = 0;
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@ -122,7 +122,7 @@ union ieee754dp ieee754dp_sqrt(union ieee754dp x)
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/* twiddle last bit to force y correctly rounded */
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/* set RZ, clear INEX flag */
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ieee754_csr.rm = IEEE754_RZ;
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ieee754_csr.rm = FPU_CSR_RZ;
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ieee754_csr.sx &= ~IEEE754_INEXACT;
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/* t=x/y; ...chopped quotient, possibly inexact */
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@ -139,10 +139,10 @@ union ieee754dp ieee754dp_sqrt(union ieee754dp x)
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oldcsr.sx |= IEEE754_INEXACT;
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switch (oldcsr.rm) {
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case IEEE754_RU:
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case FPU_CSR_RU:
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y.bits += 1;
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/* drop through */
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case IEEE754_RN:
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case FPU_CSR_RN:
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t.bits += 1;
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break;
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}
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@ -91,7 +91,7 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
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if (xs != ys)
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return x;
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else
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return ieee754dp_zero(ieee754_csr.rm == IEEE754_RD);
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return ieee754dp_zero(ieee754_csr.rm == FPU_CSR_RD);
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
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@ -171,7 +171,7 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
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xs = ys;
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}
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if (xm == 0) {
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if (ieee754_csr.rm == IEEE754_RD)
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if (ieee754_csr.rm == FPU_CSR_RD)
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return ieee754dp_zero(1); /* round negative inf. => sign = -1 */
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else
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return ieee754dp_zero(0); /* other round modes => sign = 1 */
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@ -74,17 +74,17 @@ int ieee754dp_tint(union ieee754dp x)
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to be zero */
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odd = (xm & 0x1) != 0x0;
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switch (ieee754_csr.rm) {
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case IEEE754_RN:
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case FPU_CSR_RN:
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if (round && (sticky || odd))
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xm++;
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break;
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case IEEE754_RZ:
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case FPU_CSR_RZ:
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break;
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case IEEE754_RU: /* toward +Infinity */
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case FPU_CSR_RU: /* toward +Infinity */
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if ((round || sticky) && !xs)
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xm++;
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break;
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case IEEE754_RD: /* toward -Infinity */
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case FPU_CSR_RD: /* toward -Infinity */
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if ((round || sticky) && xs)
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xm++;
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break;
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@ -79,17 +79,17 @@ s64 ieee754dp_tlong(union ieee754dp x)
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}
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odd = (xm & 0x1) != 0x0;
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switch (ieee754_csr.rm) {
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case IEEE754_RN:
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case FPU_CSR_RN:
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if (round && (sticky || odd))
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xm++;
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break;
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case IEEE754_RZ:
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case FPU_CSR_RZ:
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break;
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case IEEE754_RU: /* toward +Infinity */
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case FPU_CSR_RU: /* toward +Infinity */
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if ((round || sticky) && !xs)
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xm++;
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break;
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case IEEE754_RD: /* toward -Infinity */
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case FPU_CSR_RD: /* toward -Infinity */
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if ((round || sticky) && xs)
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xm++;
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break;
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@ -126,13 +126,6 @@ enum {
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#define IEEE754_CGT 0x04
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#define IEEE754_CUN 0x08
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/* rounding mode
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*/
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#define IEEE754_RN 0 /* round to nearest */
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#define IEEE754_RZ 1 /* round toward zero */
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#define IEEE754_RD 2 /* round toward -Infinity */
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#define IEEE754_RU 3 /* round toward +Infinity */
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/* "normal" comparisons
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*/
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static inline int ieee754sp_eq(union ieee754sp x, union ieee754sp y)
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@ -67,17 +67,17 @@ static u64 ieee754dp_get_rounding(int sn, u64 xm)
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*/
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if (xm & (DP_MBIT(3) - 1)) {
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switch (ieee754_csr.rm) {
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case IEEE754_RZ:
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case FPU_CSR_RZ:
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break;
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case IEEE754_RN:
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case FPU_CSR_RN:
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xm += 0x3 + ((xm >> 3) & 1);
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/* xm += (xm&0x8)?0x4:0x3 */
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break;
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case IEEE754_RU: /* toward +Infinity */
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case FPU_CSR_RU: /* toward +Infinity */
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if (!sn) /* ?? */
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xm += 0x8;
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break;
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case IEEE754_RD: /* toward -Infinity */
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case FPU_CSR_RD: /* toward -Infinity */
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if (sn) /* ?? */
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xm += 0x8;
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break;
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@ -108,15 +108,15 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
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ieee754_setcx(IEEE754_INEXACT);
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switch(ieee754_csr.rm) {
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case IEEE754_RN:
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case IEEE754_RZ:
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case FPU_CSR_RN:
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case FPU_CSR_RZ:
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return ieee754dp_zero(sn);
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case IEEE754_RU: /* toward +Infinity */
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case FPU_CSR_RU: /* toward +Infinity */
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if (sn == 0)
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return ieee754dp_min(0);
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else
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return ieee754dp_zero(1);
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case IEEE754_RD: /* toward -Infinity */
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case FPU_CSR_RD: /* toward -Infinity */
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if (sn == 0)
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return ieee754dp_zero(0);
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else
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@ -172,16 +172,16 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
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ieee754_setcx(IEEE754_INEXACT);
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/* -O can be table indexed by (rm,sn) */
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switch (ieee754_csr.rm) {
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case IEEE754_RN:
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case FPU_CSR_RN:
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return ieee754dp_inf(sn);
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case IEEE754_RZ:
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case FPU_CSR_RZ:
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return ieee754dp_max(sn);
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case IEEE754_RU: /* toward +Infinity */
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case FPU_CSR_RU: /* toward +Infinity */
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if (sn == 0)
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return ieee754dp_inf(0);
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else
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return ieee754dp_max(1);
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case IEEE754_RD: /* toward -Infinity */
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case FPU_CSR_RD: /* toward -Infinity */
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if (sn == 0)
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return ieee754dp_max(0);
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else
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@ -67,17 +67,17 @@ static unsigned ieee754sp_get_rounding(int sn, unsigned xm)
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*/
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if (xm & (SP_MBIT(3) - 1)) {
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switch (ieee754_csr.rm) {
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case IEEE754_RZ:
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case FPU_CSR_RZ:
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break;
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case IEEE754_RN:
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case FPU_CSR_RN:
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xm += 0x3 + ((xm >> 3) & 1);
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/* xm += (xm&0x8)?0x4:0x3 */
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break;
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case IEEE754_RU: /* toward +Infinity */
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case FPU_CSR_RU: /* toward +Infinity */
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if (!sn) /* ?? */
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xm += 0x8;
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break;
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case IEEE754_RD: /* toward -Infinity */
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case FPU_CSR_RD: /* toward -Infinity */
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if (sn) /* ?? */
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xm += 0x8;
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break;
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@ -108,15 +108,15 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
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ieee754_setcx(IEEE754_INEXACT);
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switch(ieee754_csr.rm) {
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case IEEE754_RN:
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case IEEE754_RZ:
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case FPU_CSR_RN:
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case FPU_CSR_RZ:
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return ieee754sp_zero(sn);
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case IEEE754_RU: /* toward +Infinity */
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case FPU_CSR_RU: /* toward +Infinity */
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if (sn == 0)
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return ieee754sp_min(0);
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else
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return ieee754sp_zero(1);
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case IEEE754_RD: /* toward -Infinity */
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case FPU_CSR_RD: /* toward -Infinity */
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if (sn == 0)
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return ieee754sp_zero(0);
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else
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@ -170,16 +170,16 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
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ieee754_setcx(IEEE754_INEXACT);
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/* -O can be table indexed by (rm,sn) */
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switch (ieee754_csr.rm) {
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case IEEE754_RN:
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case FPU_CSR_RN:
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return ieee754sp_inf(sn);
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case IEEE754_RZ:
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case FPU_CSR_RZ:
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return ieee754sp_max(sn);
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case IEEE754_RU: /* toward +Infinity */
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case FPU_CSR_RU: /* toward +Infinity */
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if (sn == 0)
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return ieee754sp_inf(0);
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else
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return ieee754sp_max(1);
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case IEEE754_RD: /* toward -Infinity */
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case FPU_CSR_RD: /* toward -Infinity */
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if (sn == 0)
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return ieee754sp_max(0);
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else
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@ -91,7 +91,7 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
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if (xs == ys)
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return x;
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else
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return ieee754sp_zero(ieee754_csr.rm == IEEE754_RD);
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return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
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@ -165,7 +165,7 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
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xs = ys;
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}
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if (xm == 0)
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return ieee754sp_zero(ieee754_csr.rm == IEEE754_RD);
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return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
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/*
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* Normalize in extended single precision
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@ -57,8 +57,8 @@ union ieee754sp ieee754sp_fdp(union ieee754dp x)
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/* can't possibly be sp representable */
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ieee754_setcx(IEEE754_UNDERFLOW);
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ieee754_setcx(IEEE754_INEXACT);
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if ((ieee754_csr.rm == IEEE754_RU && !xs) ||
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(ieee754_csr.rm == IEEE754_RD && xs))
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if ((ieee754_csr.rm == FPU_CSR_RU && !xs) ||
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(ieee754_csr.rm == FPU_CSR_RD && xs))
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return ieee754sp_mind(xs);
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return ieee754sp_zero(xs);
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@ -100,10 +100,10 @@ union ieee754sp ieee754sp_sqrt(union ieee754sp x)
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if (ix != 0) {
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ieee754_setcx(IEEE754_INEXACT);
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switch (ieee754_csr.rm) {
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case IEEE754_RU:
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case FPU_CSR_RU:
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q += 2;
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break;
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case IEEE754_RN:
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case FPU_CSR_RN:
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q += (q & 1);
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break;
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}
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@ -91,7 +91,7 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
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if (xs != ys)
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return x;
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else
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return ieee754sp_zero(ieee754_csr.rm == IEEE754_RD);
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return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
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||||
|
||||
case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
|
||||
case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
|
||||
|
@ -165,7 +165,7 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
|
|||
xs = ys;
|
||||
}
|
||||
if (xm == 0) {
|
||||
if (ieee754_csr.rm == IEEE754_RD)
|
||||
if (ieee754_csr.rm == FPU_CSR_RD)
|
||||
return ieee754sp_zero(1); /* round negative inf. => sign = -1 */
|
||||
else
|
||||
return ieee754sp_zero(0); /* other round modes => sign = 1 */
|
||||
|
|
|
@ -79,17 +79,17 @@ int ieee754sp_tint(union ieee754sp x)
|
|||
}
|
||||
odd = (xm & 0x1) != 0x0;
|
||||
switch (ieee754_csr.rm) {
|
||||
case IEEE754_RN:
|
||||
case FPU_CSR_RN:
|
||||
if (round && (sticky || odd))
|
||||
xm++;
|
||||
break;
|
||||
case IEEE754_RZ:
|
||||
case FPU_CSR_RZ:
|
||||
break;
|
||||
case IEEE754_RU: /* toward +Infinity */
|
||||
case FPU_CSR_RU: /* toward +Infinity */
|
||||
if ((round || sticky) && !xs)
|
||||
xm++;
|
||||
break;
|
||||
case IEEE754_RD: /* toward -Infinity */
|
||||
case FPU_CSR_RD: /* toward -Infinity */
|
||||
if ((round || sticky) && xs)
|
||||
xm++;
|
||||
break;
|
||||
|
|
|
@ -76,17 +76,17 @@ s64 ieee754sp_tlong(union ieee754sp x)
|
|||
}
|
||||
odd = (xm & 0x1) != 0x0;
|
||||
switch (ieee754_csr.rm) {
|
||||
case IEEE754_RN:
|
||||
case FPU_CSR_RN:
|
||||
if (round && (sticky || odd))
|
||||
xm++;
|
||||
break;
|
||||
case IEEE754_RZ:
|
||||
case FPU_CSR_RZ:
|
||||
break;
|
||||
case IEEE754_RU: /* toward +Infinity */
|
||||
case FPU_CSR_RU: /* toward +Infinity */
|
||||
if ((round || sticky) && !xs)
|
||||
xm++;
|
||||
break;
|
||||
case IEEE754_RD: /* toward -Infinity */
|
||||
case FPU_CSR_RD: /* toward -Infinity */
|
||||
if ((round || sticky) && xs)
|
||||
xm++;
|
||||
break;
|
||||
|
|
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