drm/msm: Fix duplicate gpu node in icc summary
The dev_pm_opp_of_add_table() api initializes the icc nodes for gpu indirectly. So we can avoid using of_icc_get() api in the common probe path. To improve this, move of_icc_get() to target specific code where it is required. This patch helps to fix duplicate gpu node listed in the interconnect summary from the debugfs. Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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cccdeda362
Коммит
5785dd7a8e
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@ -519,6 +519,8 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
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struct msm_gpu *gpu;
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struct msm_drm_private *priv = dev->dev_private;
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struct platform_device *pdev = priv->gpu_pdev;
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struct icc_path *ocmem_icc_path;
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struct icc_path *icc_path;
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int ret;
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if (!pdev) {
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@ -566,13 +568,28 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
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goto fail;
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}
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icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");
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ret = IS_ERR(icc_path);
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if (ret)
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goto fail;
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ocmem_icc_path = devm_of_icc_get(&pdev->dev, "ocmem");
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ret = IS_ERR(ocmem_icc_path);
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if (ret) {
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/* allow -ENODATA, ocmem icc is optional */
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if (ret != -ENODATA)
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goto fail;
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ocmem_icc_path = NULL;
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}
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/*
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* Set the ICC path to maximum speed for now by multiplying the fastest
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* frequency by the bus width (8). We'll want to scale this later on to
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* improve battery life.
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*/
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icc_set_bw(gpu->icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
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icc_set_bw(gpu->ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
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icc_set_bw(icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
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icc_set_bw(ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
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return gpu;
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@ -648,6 +648,8 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
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struct msm_gpu *gpu;
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struct msm_drm_private *priv = dev->dev_private;
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struct platform_device *pdev = priv->gpu_pdev;
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struct icc_path *ocmem_icc_path;
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struct icc_path *icc_path;
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int ret;
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if (!pdev) {
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@ -694,13 +696,27 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
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goto fail;
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}
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icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");
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ret = IS_ERR(icc_path);
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if (ret)
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goto fail;
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ocmem_icc_path = devm_of_icc_get(&pdev->dev, "ocmem");
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ret = IS_ERR(ocmem_icc_path);
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if (ret) {
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/* allow -ENODATA, ocmem icc is optional */
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if (ret != -ENODATA)
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goto fail;
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ocmem_icc_path = NULL;
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}
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/*
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* Set the ICC path to maximum speed for now by multiplying the fastest
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* frequency by the bus width (8). We'll want to scale this later on to
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* improve battery life.
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*/
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icc_set_bw(gpu->icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
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icc_set_bw(gpu->ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
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icc_set_bw(icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
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icc_set_bw(ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
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return gpu;
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@ -899,7 +899,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
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struct adreno_platform_config *config = dev->platform_data;
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struct msm_gpu_config adreno_gpu_config = { 0 };
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struct msm_gpu *gpu = &adreno_gpu->base;
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int ret;
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adreno_gpu->funcs = funcs;
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adreno_gpu->info = adreno_info(config->rev);
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@ -918,37 +917,8 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
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pm_runtime_use_autosuspend(dev);
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pm_runtime_enable(dev);
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ret = msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,
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return msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,
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adreno_gpu->info->name, &adreno_gpu_config);
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if (ret)
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return ret;
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/*
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* The legacy case, before "interconnect-names", only has a
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* single interconnect path which is equivalent to "gfx-mem"
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*/
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if (!of_find_property(dev->of_node, "interconnect-names", NULL)) {
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gpu->icc_path = of_icc_get(dev, NULL);
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} else {
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gpu->icc_path = of_icc_get(dev, "gfx-mem");
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gpu->ocmem_icc_path = of_icc_get(dev, "ocmem");
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}
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if (IS_ERR(gpu->icc_path)) {
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ret = PTR_ERR(gpu->icc_path);
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gpu->icc_path = NULL;
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return ret;
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}
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if (IS_ERR(gpu->ocmem_icc_path)) {
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ret = PTR_ERR(gpu->ocmem_icc_path);
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gpu->ocmem_icc_path = NULL;
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/* allow -ENODATA, ocmem icc is optional */
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if (ret != -ENODATA)
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return ret;
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}
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return 0;
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}
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void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu)
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