KVM: arm64: vgic-its: Device table save/restore
This patch saves the device table entries into guest RAM. Both flat table and 2 stage tables are supported. DeviceId indexing is used. For each device listed in the device table, we also save the translation table using the vgic_its_save/restore_itt routines. Those functions will be implemented in a subsequent patch. On restore, devices are re-allocated and their itt are re-built. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Christoffer Dall <cdall@linaro.org>
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Родитель
dceff70258
Коммит
57a9a11715
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@ -23,6 +23,7 @@
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/uaccess.h>
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#include <linux/list_sort.h>
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#include <linux/irqchip/arm-gic-v3.h>
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@ -1735,7 +1736,8 @@ out:
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return ret;
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}
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u32 compute_next_devid_offset(struct list_head *h, struct its_device *dev)
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static u32 compute_next_devid_offset(struct list_head *h,
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struct its_device *dev)
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{
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struct its_device *next;
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u32 next_offset;
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@ -1789,8 +1791,8 @@ typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry,
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* Return: < 0 on error, 0 if last element was identified, 1 otherwise
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* (the last element may not be found on second level tables)
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*/
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int scan_its_table(struct vgic_its *its, gpa_t base, int size, int esz,
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int start_id, entry_fn_t fn, void *opaque)
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static int scan_its_table(struct vgic_its *its, gpa_t base, int size, int esz,
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int start_id, entry_fn_t fn, void *opaque)
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{
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void *entry = kzalloc(esz, GFP_KERNEL);
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struct kvm *kvm = its->dev->kvm;
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@ -1825,13 +1827,171 @@ out:
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return ret;
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}
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static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device)
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{
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return -ENXIO;
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}
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static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev)
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{
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return -ENXIO;
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}
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/**
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* vgic_its_save_dte - Save a device table entry at a given GPA
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*
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* @its: ITS handle
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* @dev: ITS device
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* @ptr: GPA
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*/
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static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,
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gpa_t ptr, int dte_esz)
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{
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struct kvm *kvm = its->dev->kvm;
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u64 val, itt_addr_field;
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u32 next_offset;
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itt_addr_field = dev->itt_addr >> 8;
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next_offset = compute_next_devid_offset(&its->device_list, dev);
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val = (1ULL << KVM_ITS_DTE_VALID_SHIFT |
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((u64)next_offset << KVM_ITS_DTE_NEXT_SHIFT) |
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(itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) |
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(dev->num_eventid_bits - 1));
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val = cpu_to_le64(val);
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return kvm_write_guest(kvm, ptr, &val, dte_esz);
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}
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/**
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* vgic_its_restore_dte - restore a device table entry
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*
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* @its: its handle
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* @id: device id the DTE corresponds to
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* @ptr: kernel VA where the 8 byte DTE is located
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* @opaque: unused
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*
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* Return: < 0 on error, 0 if the dte is the last one, id offset to the
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* next dte otherwise
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*/
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static int vgic_its_restore_dte(struct vgic_its *its, u32 id,
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void *ptr, void *opaque)
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{
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struct its_device *dev;
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gpa_t itt_addr;
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u8 num_eventid_bits;
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u64 entry = *(u64 *)ptr;
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bool valid;
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u32 offset;
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int ret;
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entry = le64_to_cpu(entry);
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valid = entry >> KVM_ITS_DTE_VALID_SHIFT;
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num_eventid_bits = (entry & KVM_ITS_DTE_SIZE_MASK) + 1;
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itt_addr = ((entry & KVM_ITS_DTE_ITTADDR_MASK)
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>> KVM_ITS_DTE_ITTADDR_SHIFT) << 8;
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if (!valid)
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return 1;
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/* dte entry is valid */
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offset = (entry & KVM_ITS_DTE_NEXT_MASK) >> KVM_ITS_DTE_NEXT_SHIFT;
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dev = vgic_its_alloc_device(its, id, itt_addr, num_eventid_bits);
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if (IS_ERR(dev))
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return PTR_ERR(dev);
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ret = vgic_its_restore_itt(its, dev);
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if (ret)
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return ret;
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return offset;
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}
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static int vgic_its_device_cmp(void *priv, struct list_head *a,
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struct list_head *b)
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{
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struct its_device *deva = container_of(a, struct its_device, dev_list);
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struct its_device *devb = container_of(b, struct its_device, dev_list);
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if (deva->device_id < devb->device_id)
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return -1;
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else
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return 1;
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}
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/**
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* vgic_its_save_device_tables - Save the device table and all ITT
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* into guest RAM
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*
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* L1/L2 handling is hidden by vgic_its_check_id() helper which directly
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* returns the GPA of the device entry
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*/
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static int vgic_its_save_device_tables(struct vgic_its *its)
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{
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return -ENXIO;
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const struct vgic_its_abi *abi = vgic_its_get_abi(its);
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struct its_device *dev;
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int dte_esz = abi->dte_esz;
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u64 baser;
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baser = its->baser_device_table;
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list_sort(NULL, &its->device_list, vgic_its_device_cmp);
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list_for_each_entry(dev, &its->device_list, dev_list) {
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int ret;
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gpa_t eaddr;
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if (!vgic_its_check_id(its, baser,
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dev->device_id, &eaddr))
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return -EINVAL;
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ret = vgic_its_save_itt(its, dev);
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if (ret)
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return ret;
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ret = vgic_its_save_dte(its, dev, eaddr, dte_esz);
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if (ret)
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return ret;
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}
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return 0;
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}
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/**
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* handle_l1_dte - callback used for L1 device table entries (2 stage case)
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*
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* @its: its handle
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* @id: index of the entry in the L1 table
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* @addr: kernel VA
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* @opaque: unused
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*
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* L1 table entries are scanned by steps of 1 entry
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* Return < 0 if error, 0 if last dte was found when scanning the L2
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* table, +1 otherwise (meaning next L1 entry must be scanned)
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*/
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static int handle_l1_dte(struct vgic_its *its, u32 id, void *addr,
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void *opaque)
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{
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const struct vgic_its_abi *abi = vgic_its_get_abi(its);
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int l2_start_id = id * (SZ_64K / abi->dte_esz);
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u64 entry = *(u64 *)addr;
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int dte_esz = abi->dte_esz;
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gpa_t gpa;
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int ret;
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entry = le64_to_cpu(entry);
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if (!(entry & KVM_ITS_L1E_VALID_MASK))
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return 1;
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gpa = entry & KVM_ITS_L1E_ADDR_MASK;
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ret = scan_its_table(its, gpa, SZ_64K, dte_esz,
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l2_start_id, vgic_its_restore_dte, NULL);
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if (ret <= 0)
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return ret;
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return 1;
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}
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/**
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@ -1840,7 +2000,31 @@ static int vgic_its_save_device_tables(struct vgic_its *its)
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*/
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static int vgic_its_restore_device_tables(struct vgic_its *its)
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{
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return -ENXIO;
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const struct vgic_its_abi *abi = vgic_its_get_abi(its);
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u64 baser = its->baser_device_table;
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int l1_esz, ret;
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int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
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gpa_t l1_gpa;
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if (!(baser & GITS_BASER_VALID))
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return 0;
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l1_gpa = BASER_ADDRESS(baser);
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if (baser & GITS_BASER_INDIRECT) {
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l1_esz = GITS_LVL1_ENTRY_SIZE;
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ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0,
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handle_l1_dte, NULL);
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} else {
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l1_esz = abi->dte_esz;
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ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0,
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vgic_its_restore_dte, NULL);
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}
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if (ret > 0)
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ret = -EINVAL;
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return ret;
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}
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static int vgic_its_save_cte(struct vgic_its *its,
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@ -81,6 +81,16 @@
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#define KVM_ITS_CTE_VALID_MASK BIT_ULL(63)
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#define KVM_ITS_CTE_RDBASE_SHIFT 16
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#define KVM_ITS_CTE_ICID_MASK GENMASK_ULL(15, 0)
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#define KVM_ITS_DTE_VALID_SHIFT 63
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#define KVM_ITS_DTE_VALID_MASK BIT_ULL(63)
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#define KVM_ITS_DTE_NEXT_SHIFT 49
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#define KVM_ITS_DTE_NEXT_MASK GENMASK_ULL(62, 49)
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#define KVM_ITS_DTE_ITTADDR_SHIFT 5
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#define KVM_ITS_DTE_ITTADDR_MASK GENMASK_ULL(48, 5)
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#define KVM_ITS_DTE_SIZE_MASK GENMASK_ULL(4, 0)
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#define KVM_ITS_L1E_VALID_MASK BIT_ULL(63)
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/* we only support 64 kB translation table page size */
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#define KVM_ITS_L1E_ADDR_MASK GENMASK_ULL(51, 16)
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static inline bool irq_is_pending(struct vgic_irq *irq)
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{
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