spi: omap2_mcspi rxdma bugfix
When data is read through DMA, the last element must be read separately through the RX register. It cannot be transferred by the DMA. For further details see e.g. OMAP35x TRM (table 19-16). Without the fix the driver causes extra clocks to be clocked to the bus after DMA RX operations. This can cause interesting behaviour with some devices. Signed-off-by: Juuso Oikarinen <juuso.oikarinen@nokia.com> Signed-off-by: Eero Nurkkala <ext-eero.nurkkala@nokia.com> [aaro.koskinen@nokia.com: Simplified the patch while keeping the idea.] Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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ddb22195cb
Коммит
57c5c28dbc
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@ -272,7 +272,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
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if (rx != NULL) {
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omap_set_dma_transfer_params(mcspi_dma->dma_rx_channel,
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data_type, element_count, 1,
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data_type, element_count - 1, 1,
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OMAP_DMA_SYNC_ELEMENT,
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mcspi_dma->dma_rx_sync_dev, 1);
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@ -303,6 +303,25 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
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if (rx != NULL) {
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wait_for_completion(&mcspi_dma->dma_rx_completion);
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dma_unmap_single(NULL, xfer->rx_dma, count, DMA_FROM_DEVICE);
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omap2_mcspi_set_enable(spi, 0);
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if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
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& OMAP2_MCSPI_CHSTAT_RXS)) {
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u32 w;
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w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
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if (word_len <= 8)
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((u8 *)xfer->rx_buf)[element_count - 1] = w;
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else if (word_len <= 16)
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((u16 *)xfer->rx_buf)[element_count - 1] = w;
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else /* word_len <= 32 */
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((u32 *)xfer->rx_buf)[element_count - 1] = w;
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} else {
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dev_err(&spi->dev, "DMA RX last word empty");
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count -= (word_len <= 8) ? 1 :
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(word_len <= 16) ? 2 :
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/* word_len <= 32 */ 4;
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}
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omap2_mcspi_set_enable(spi, 1);
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}
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return count;
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}
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