can: Fix SJA1000 command register writes on SMP systems
The SJA1000 command register is concurrently written in the rx-path to free the receive buffer _and_ in the tx-path to start the transmission. The SJA1000 data sheet, 6.4.4 COMMAND REGISTER (CMR) states: "Between two commands at least one internal clock cycle is needed in order to proceed. The internal clock is half of the external oscillator frequency." On SMP systems the current implementation leads to a write stall in the tx-path, which can be solved by adding some general locking and some time to settle the write_reg() operation for the command register. Thanks to Klaus Hitschler for the original fix and detailed problem description. This patch applies on net-2.6 and (with some offsets) on net-next-2.6 . Signed-off-by: Oliver Hartkopp <socketcan@hartkopp.net> Acked-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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57c8a45664
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@ -83,6 +83,20 @@ static struct can_bittiming_const sja1000_bittiming_const = {
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.brp_inc = 1,
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};
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static void sja1000_write_cmdreg(struct sja1000_priv *priv, u8 val)
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{
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unsigned long flags;
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/*
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* The command register needs some locking and time to settle
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* the write_reg() operation - especially on SMP systems.
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*/
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spin_lock_irqsave(&priv->cmdreg_lock, flags);
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priv->write_reg(priv, REG_CMR, val);
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priv->read_reg(priv, REG_SR);
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spin_unlock_irqrestore(&priv->cmdreg_lock, flags);
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}
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static int sja1000_probe_chip(struct net_device *dev)
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{
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struct sja1000_priv *priv = netdev_priv(dev);
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@ -294,7 +308,7 @@ static netdev_tx_t sja1000_start_xmit(struct sk_buff *skb,
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can_put_echo_skb(skb, dev, 0);
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priv->write_reg(priv, REG_CMR, CMD_TR);
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sja1000_write_cmdreg(priv, CMD_TR);
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return NETDEV_TX_OK;
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}
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@ -343,7 +357,7 @@ static void sja1000_rx(struct net_device *dev)
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cf->can_id = id;
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/* release receive buffer */
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priv->write_reg(priv, REG_CMR, CMD_RRB);
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sja1000_write_cmdreg(priv, CMD_RRB);
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netif_rx(skb);
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@ -371,7 +385,7 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
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cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
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stats->rx_over_errors++;
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stats->rx_errors++;
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priv->write_reg(priv, REG_CMR, CMD_CDO); /* clear bit */
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sja1000_write_cmdreg(priv, CMD_CDO); /* clear bit */
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}
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if (isrc & IRQ_EI) {
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@ -167,6 +167,7 @@ struct sja1000_priv {
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void __iomem *reg_base; /* ioremap'ed address to registers */
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unsigned long irq_flags; /* for request_irq() */
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spinlock_t cmdreg_lock; /* lock for concurrent cmd register writes */
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u16 flags; /* custom mode flags */
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u8 ocr; /* output control register */
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