Merge branch 'davinci-next' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci into devel-stable
This commit is contained in:
Russell King
Коммит
5821c95ffb
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@ -5658,7 +5658,8 @@ F: arch/arm/mach-s3c2410/bast-ide.c
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F: arch/arm/mach-s3c2410/bast-irq.c
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TI DAVINCI MACHINE SUPPORT
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M: Kevin Hilman <khilman@deeprootsystems.com>
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M: Sekhar Nori <nsekhar@ti.com>
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M: Kevin Hilman <khilman@ti.com>
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L: davinci-linux-open-source@linux.davincidsp.com (subscribers-only)
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Q: http://patchwork.kernel.org/project/linux-davinci/list/
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S: Supported
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@ -20,6 +20,8 @@
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#include <linux/i2c/at24.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@ -30,6 +32,7 @@
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#include <mach/da8xx.h>
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#include <mach/usb.h>
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#include <mach/aemif.h>
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#include <mach/spi.h>
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#define DA830_EVM_PHY_ID ""
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/*
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@ -534,6 +537,64 @@ static struct edma_rsv_info da830_edma_rsv[] = {
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},
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};
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static struct mtd_partition da830evm_spiflash_part[] = {
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[0] = {
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.name = "DSP-UBL",
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.offset = 0,
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.size = SZ_8K,
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.mask_flags = MTD_WRITEABLE,
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},
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[1] = {
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.name = "ARM-UBL",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_16K + SZ_8K,
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.mask_flags = MTD_WRITEABLE,
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},
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[2] = {
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.name = "U-Boot",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_256K - SZ_32K,
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.mask_flags = MTD_WRITEABLE,
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},
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[3] = {
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.name = "U-Boot-Environment",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_16K,
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.mask_flags = 0,
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},
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[4] = {
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.name = "Kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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},
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};
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static struct flash_platform_data da830evm_spiflash_data = {
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.name = "m25p80",
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.parts = da830evm_spiflash_part,
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.nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
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.type = "w25x32",
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};
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static struct davinci_spi_config da830evm_spiflash_cfg = {
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.io_type = SPI_IO_TYPE_DMA,
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.c2tdelay = 8,
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.t2cdelay = 8,
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};
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static struct spi_board_info da830evm_spi_info[] = {
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{
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.modalias = "m25p80",
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.platform_data = &da830evm_spiflash_data,
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.controller_data = &da830evm_spiflash_cfg,
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.mode = SPI_MODE_0,
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.max_speed_hz = 30000000,
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.bus_num = 0,
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.chip_select = 0,
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},
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};
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static __init void da830_evm_init(void)
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{
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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@ -590,6 +651,12 @@ static __init void da830_evm_init(void)
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ret = da8xx_register_rtc();
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if (ret)
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pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
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ret = da8xx_register_spi(0, da830evm_spi_info,
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ARRAY_SIZE(da830evm_spi_info));
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if (ret)
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pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
|
||||
ret);
|
||||
}
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#ifdef CONFIG_SERIAL_8250_CONSOLE
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||||
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|
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@ -29,6 +29,8 @@
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|||
#include <linux/regulator/machine.h>
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#include <linux/regulator/tps6507x.h>
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#include <linux/input/tps6507x-ts.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@ -38,6 +40,7 @@
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#include <mach/nand.h>
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#include <mach/mux.h>
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#include <mach/aemif.h>
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#include <mach/spi.h>
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|
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#define DA850_EVM_PHY_ID "0:00"
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#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
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@ -48,6 +51,70 @@
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#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
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||||
|
||||
static struct mtd_partition da850evm_spiflash_part[] = {
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||||
[0] = {
|
||||
.name = "UBL",
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||||
.offset = 0,
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||||
.size = SZ_64K,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
[1] = {
|
||||
.name = "U-Boot",
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||||
.offset = MTDPART_OFS_APPEND,
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||||
.size = SZ_512K,
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||||
.mask_flags = MTD_WRITEABLE,
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||||
},
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||||
[2] = {
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||||
.name = "U-Boot-Env",
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||||
.offset = MTDPART_OFS_APPEND,
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||||
.size = SZ_64K,
|
||||
.mask_flags = MTD_WRITEABLE,
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||||
},
|
||||
[3] = {
|
||||
.name = "Kernel",
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||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_2M + SZ_512K,
|
||||
.mask_flags = 0,
|
||||
},
|
||||
[4] = {
|
||||
.name = "Filesystem",
|
||||
.offset = MTDPART_OFS_APPEND,
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||||
.size = SZ_4M,
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||||
.mask_flags = 0,
|
||||
},
|
||||
[5] = {
|
||||
.name = "MAC-Address",
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||||
.offset = SZ_8M - SZ_64K,
|
||||
.size = SZ_64K,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct flash_platform_data da850evm_spiflash_data = {
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||||
.name = "m25p80",
|
||||
.parts = da850evm_spiflash_part,
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||||
.nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
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||||
.type = "m25p64",
|
||||
};
|
||||
|
||||
static struct davinci_spi_config da850evm_spiflash_cfg = {
|
||||
.io_type = SPI_IO_TYPE_DMA,
|
||||
.c2tdelay = 8,
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||||
.t2cdelay = 8,
|
||||
};
|
||||
|
||||
static struct spi_board_info da850evm_spi_info[] = {
|
||||
{
|
||||
.modalias = "m25p80",
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||||
.platform_data = &da850evm_spiflash_data,
|
||||
.controller_data = &da850evm_spiflash_cfg,
|
||||
.mode = SPI_MODE_0,
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||||
.max_speed_hz = 30000000,
|
||||
.bus_num = 1,
|
||||
.chip_select = 0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition da850_evm_norflash_partition[] = {
|
||||
{
|
||||
.name = "bootloaders + env",
|
||||
|
|
@ -231,8 +298,6 @@ static const short da850_evm_nor_pins[] = {
|
|||
-1
|
||||
};
|
||||
|
||||
static u32 ui_card_detected;
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||||
|
||||
#if defined(CONFIG_MMC_DAVINCI) || \
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||||
defined(CONFIG_MMC_DAVINCI_MODULE)
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||||
#define HAS_MMC 1
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||||
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@ -244,7 +309,7 @@ static inline void da850_evm_setup_nor_nand(void)
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|||
{
|
||||
int ret = 0;
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||||
|
||||
if (ui_card_detected & !HAS_MMC) {
|
||||
if (!HAS_MMC) {
|
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ret = davinci_cfg_reg_list(da850_evm_nand_pins);
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||||
if (ret)
|
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pr_warning("da850_evm_init: nand mux setup failed: "
|
||||
|
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@ -394,7 +459,6 @@ static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
|
|||
goto exp_setup_keys_fail;
|
||||
}
|
||||
|
||||
ui_card_detected = 1;
|
||||
pr_info("DA850/OMAP-L138 EVM UI card detected\n");
|
||||
|
||||
da850_evm_setup_nor_nand();
|
||||
|
|
@ -664,6 +728,13 @@ static struct snd_platform_data da850_evm_snd_data = {
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|||
.rxnumevt = 1,
|
||||
};
|
||||
|
||||
static const short da850_evm_mcasp_pins[] __initconst = {
|
||||
DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
|
||||
DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
|
||||
DA850_AXR_11, DA850_AXR_12,
|
||||
-1
|
||||
};
|
||||
|
||||
static int da850_evm_mmc_get_ro(int index)
|
||||
{
|
||||
return gpio_get_value(DA850_MMCSD_WP_PIN);
|
||||
|
|
@ -683,6 +754,13 @@ static struct davinci_mmc_config da850_mmc_config = {
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|||
.version = MMC_CTLR_VERSION_2,
|
||||
};
|
||||
|
||||
static const short da850_evm_mmcsd0_pins[] __initconst = {
|
||||
DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
|
||||
DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
|
||||
DA850_GPIO4_0, DA850_GPIO4_1,
|
||||
-1
|
||||
};
|
||||
|
||||
static void da850_panel_power_ctrl(int val)
|
||||
{
|
||||
/* lcd backlight */
|
||||
|
|
@ -1070,7 +1148,7 @@ static __init void da850_evm_init(void)
|
|||
ret);
|
||||
|
||||
if (HAS_MMC) {
|
||||
ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
|
||||
ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
|
||||
if (ret)
|
||||
pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
|
||||
" %d\n", ret);
|
||||
|
|
@ -1106,7 +1184,7 @@ static __init void da850_evm_init(void)
|
|||
__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
|
||||
__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
|
||||
|
||||
ret = davinci_cfg_reg_list(da850_mcasp_pins);
|
||||
ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
|
||||
if (ret)
|
||||
pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
|
||||
ret);
|
||||
|
|
@ -1153,6 +1231,12 @@ static __init void da850_evm_init(void)
|
|||
if (ret)
|
||||
pr_warning("da850_evm_init: suspend registration failed: %d\n",
|
||||
ret);
|
||||
|
||||
ret = da8xx_register_spi(1, da850evm_spi_info,
|
||||
ARRAY_SIZE(da850evm_spi_info));
|
||||
if (ret)
|
||||
pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
|
||||
ret);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SERIAL_8250_CONSOLE
|
||||
|
|
|
|||
|
|
@ -17,6 +17,8 @@
|
|||
#include <linux/i2c.h>
|
||||
#include <linux/i2c/at24.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/flash.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
|
@ -25,6 +27,7 @@
|
|||
#include <mach/da8xx.h>
|
||||
#include <mach/nand.h>
|
||||
#include <mach/mux.h>
|
||||
#include <mach/spi.h>
|
||||
|
||||
#define MITYOMAPL138_PHY_ID "0:03"
|
||||
|
||||
|
|
@ -44,38 +47,109 @@ struct factory_config {
|
|||
|
||||
static struct factory_config factory_config;
|
||||
|
||||
struct part_no_info {
|
||||
const char *part_no; /* part number string of interest */
|
||||
int max_freq; /* khz */
|
||||
};
|
||||
|
||||
static struct part_no_info mityomapl138_pn_info[] = {
|
||||
{
|
||||
.part_no = "L138-C",
|
||||
.max_freq = 300000,
|
||||
},
|
||||
{
|
||||
.part_no = "L138-D",
|
||||
.max_freq = 375000,
|
||||
},
|
||||
{
|
||||
.part_no = "L138-F",
|
||||
.max_freq = 456000,
|
||||
},
|
||||
{
|
||||
.part_no = "1808-C",
|
||||
.max_freq = 300000,
|
||||
},
|
||||
{
|
||||
.part_no = "1808-D",
|
||||
.max_freq = 375000,
|
||||
},
|
||||
{
|
||||
.part_no = "1808-F",
|
||||
.max_freq = 456000,
|
||||
},
|
||||
{
|
||||
.part_no = "1810-D",
|
||||
.max_freq = 375000,
|
||||
},
|
||||
};
|
||||
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
static void mityomapl138_cpufreq_init(const char *partnum)
|
||||
{
|
||||
int i, ret;
|
||||
|
||||
for (i = 0; partnum && i < ARRAY_SIZE(mityomapl138_pn_info); i++) {
|
||||
/*
|
||||
* the part number has additional characters beyond what is
|
||||
* stored in the table. This information is not needed for
|
||||
* determining the speed grade, and would require several
|
||||
* more table entries. Only check the first N characters
|
||||
* for a match.
|
||||
*/
|
||||
if (!strncmp(partnum, mityomapl138_pn_info[i].part_no,
|
||||
strlen(mityomapl138_pn_info[i].part_no))) {
|
||||
da850_max_speed = mityomapl138_pn_info[i].max_freq;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
ret = da850_register_cpufreq("pll0_sysclk3");
|
||||
if (ret)
|
||||
pr_warning("cpufreq registration failed: %d\n", ret);
|
||||
}
|
||||
#else
|
||||
static void mityomapl138_cpufreq_init(const char *partnum) { }
|
||||
#endif
|
||||
|
||||
static void read_factory_config(struct memory_accessor *a, void *context)
|
||||
{
|
||||
int ret;
|
||||
const char *partnum = NULL;
|
||||
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
||||
|
||||
ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config));
|
||||
if (ret != sizeof(struct factory_config)) {
|
||||
pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n",
|
||||
ret);
|
||||
return;
|
||||
goto bad_config;
|
||||
}
|
||||
|
||||
if (factory_config.magic != FACTORY_CONFIG_MAGIC) {
|
||||
pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n",
|
||||
factory_config.magic);
|
||||
return;
|
||||
goto bad_config;
|
||||
}
|
||||
|
||||
if (factory_config.version != FACTORY_CONFIG_VERSION) {
|
||||
pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n",
|
||||
factory_config.version);
|
||||
return;
|
||||
goto bad_config;
|
||||
}
|
||||
|
||||
pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac);
|
||||
pr_info("MityOMAPL138: Part Number = %s\n", factory_config.partnum);
|
||||
if (is_valid_ether_addr(factory_config.mac))
|
||||
memcpy(soc_info->emac_pdata->mac_addr,
|
||||
factory_config.mac, ETH_ALEN);
|
||||
else
|
||||
pr_warning("MityOMAPL138: Invalid MAC found "
|
||||
"in factory config block\n");
|
||||
|
||||
partnum = factory_config.partnum;
|
||||
pr_info("MityOMAPL138: Part Number = %s\n", partnum);
|
||||
|
||||
bad_config:
|
||||
/* default maximum speed is valid for all platforms */
|
||||
mityomapl138_cpufreq_init(partnum);
|
||||
}
|
||||
|
||||
static struct at24_platform_data mityomapl138_fd_chip = {
|
||||
|
|
@ -222,6 +296,82 @@ static int __init pmic_tps65023_init(void)
|
|||
ARRAY_SIZE(mityomap_tps65023_info));
|
||||
}
|
||||
|
||||
/*
|
||||
* SPI Devices:
|
||||
* SPI1_CS0: 8M Flash ST-M25P64-VME6G
|
||||
*/
|
||||
static struct mtd_partition spi_flash_partitions[] = {
|
||||
[0] = {
|
||||
.name = "ubl",
|
||||
.offset = 0,
|
||||
.size = SZ_64K,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
[1] = {
|
||||
.name = "u-boot",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_512K,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
[2] = {
|
||||
.name = "u-boot-env",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_64K,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
[3] = {
|
||||
.name = "periph-config",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_64K,
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
},
|
||||
[4] = {
|
||||
.name = "reserved",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_256K + SZ_64K,
|
||||
},
|
||||
[5] = {
|
||||
.name = "kernel",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_2M + SZ_1M,
|
||||
},
|
||||
[6] = {
|
||||
.name = "fpga",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_2M,
|
||||
},
|
||||
[7] = {
|
||||
.name = "spare",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct flash_platform_data mityomapl138_spi_flash_data = {
|
||||
.name = "m25p80",
|
||||
.parts = spi_flash_partitions,
|
||||
.nr_parts = ARRAY_SIZE(spi_flash_partitions),
|
||||
.type = "m24p64",
|
||||
};
|
||||
|
||||
static struct davinci_spi_config spi_eprom_config = {
|
||||
.io_type = SPI_IO_TYPE_DMA,
|
||||
.c2tdelay = 8,
|
||||
.t2cdelay = 8,
|
||||
};
|
||||
|
||||
static struct spi_board_info mityomapl138_spi_flash_info[] = {
|
||||
{
|
||||
.modalias = "m25p80",
|
||||
.platform_data = &mityomapl138_spi_flash_data,
|
||||
.controller_data = &spi_eprom_config,
|
||||
.mode = SPI_MODE_0,
|
||||
.max_speed_hz = 30000000,
|
||||
.bus_num = 1,
|
||||
.chip_select = 0,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* MityDSP-L138 includes a 256 MByte large-page NAND flash
|
||||
* (128K blocks).
|
||||
|
|
@ -377,16 +527,17 @@ static void __init mityomapl138_init(void)
|
|||
|
||||
mityomapl138_setup_nand();
|
||||
|
||||
ret = da8xx_register_spi(1, mityomapl138_spi_flash_info,
|
||||
ARRAY_SIZE(mityomapl138_spi_flash_info));
|
||||
if (ret)
|
||||
pr_warning("spi 1 registration failed: %d\n", ret);
|
||||
|
||||
mityomapl138_config_emac();
|
||||
|
||||
ret = da8xx_register_rtc();
|
||||
if (ret)
|
||||
pr_warning("rtc setup failed: %d\n", ret);
|
||||
|
||||
ret = da850_register_cpufreq("pll0_sysclk3");
|
||||
if (ret)
|
||||
pr_warning("cpufreq registration failed: %d\n", ret);
|
||||
|
||||
ret = da8xx_register_cpuidle();
|
||||
if (ret)
|
||||
pr_warning("cpuidle registration failed: %d\n", ret);
|
||||
|
|
|
|||
|
|
@ -19,6 +19,279 @@
|
|||
|
||||
#include <mach/cp_intc.h>
|
||||
#include <mach/da8xx.h>
|
||||
#include <mach/mux.h>
|
||||
|
||||
#define HAWKBOARD_PHY_ID "0:07"
|
||||
#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12)
|
||||
#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13)
|
||||
|
||||
#define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4)
|
||||
#define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13)
|
||||
|
||||
static short omapl138_hawk_mii_pins[] __initdata = {
|
||||
DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
|
||||
DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
|
||||
DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
|
||||
DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
|
||||
DA850_MDIO_D,
|
||||
-1
|
||||
};
|
||||
|
||||
static __init void omapl138_hawk_config_emac(void)
|
||||
{
|
||||
void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
|
||||
int ret;
|
||||
u32 val;
|
||||
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
||||
|
||||
val = __raw_readl(cfgchip3);
|
||||
val &= ~BIT(8);
|
||||
ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins);
|
||||
if (ret) {
|
||||
pr_warning("%s: cpgmac/mii mux setup failed: %d\n",
|
||||
__func__, ret);
|
||||
return;
|
||||
}
|
||||
|
||||
/* configure the CFGCHIP3 register for MII */
|
||||
__raw_writel(val, cfgchip3);
|
||||
pr_info("EMAC: MII PHY configured\n");
|
||||
|
||||
soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID;
|
||||
|
||||
ret = da8xx_register_emac();
|
||||
if (ret)
|
||||
pr_warning("%s: emac registration failed: %d\n",
|
||||
__func__, ret);
|
||||
}
|
||||
|
||||
/*
|
||||
* The following EDMA channels/slots are not being used by drivers (for
|
||||
* example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard,
|
||||
* hence they are being reserved for codecs on the DSP side.
|
||||
*/
|
||||
static const s16 da850_dma0_rsv_chans[][2] = {
|
||||
/* (offset, number) */
|
||||
{ 8, 6},
|
||||
{24, 4},
|
||||
{30, 2},
|
||||
{-1, -1}
|
||||
};
|
||||
|
||||
static const s16 da850_dma0_rsv_slots[][2] = {
|
||||
/* (offset, number) */
|
||||
{ 8, 6},
|
||||
{24, 4},
|
||||
{30, 50},
|
||||
{-1, -1}
|
||||
};
|
||||
|
||||
static const s16 da850_dma1_rsv_chans[][2] = {
|
||||
/* (offset, number) */
|
||||
{ 0, 28},
|
||||
{30, 2},
|
||||
{-1, -1}
|
||||
};
|
||||
|
||||
static const s16 da850_dma1_rsv_slots[][2] = {
|
||||
/* (offset, number) */
|
||||
{ 0, 28},
|
||||
{30, 90},
|
||||
{-1, -1}
|
||||
};
|
||||
|
||||
static struct edma_rsv_info da850_edma_cc0_rsv = {
|
||||
.rsv_chans = da850_dma0_rsv_chans,
|
||||
.rsv_slots = da850_dma0_rsv_slots,
|
||||
};
|
||||
|
||||
static struct edma_rsv_info da850_edma_cc1_rsv = {
|
||||
.rsv_chans = da850_dma1_rsv_chans,
|
||||
.rsv_slots = da850_dma1_rsv_slots,
|
||||
};
|
||||
|
||||
static struct edma_rsv_info *da850_edma_rsv[2] = {
|
||||
&da850_edma_cc0_rsv,
|
||||
&da850_edma_cc1_rsv,
|
||||
};
|
||||
|
||||
static const short hawk_mmcsd0_pins[] = {
|
||||
DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
|
||||
DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
|
||||
DA850_GPIO3_12, DA850_GPIO3_13,
|
||||
-1
|
||||
};
|
||||
|
||||
static int da850_hawk_mmc_get_ro(int index)
|
||||
{
|
||||
return gpio_get_value(DA850_HAWK_MMCSD_WP_PIN);
|
||||
}
|
||||
|
||||
static int da850_hawk_mmc_get_cd(int index)
|
||||
{
|
||||
return !gpio_get_value(DA850_HAWK_MMCSD_CD_PIN);
|
||||
}
|
||||
|
||||
static struct davinci_mmc_config da850_mmc_config = {
|
||||
.get_ro = da850_hawk_mmc_get_ro,
|
||||
.get_cd = da850_hawk_mmc_get_cd,
|
||||
.wires = 4,
|
||||
.max_freq = 50000000,
|
||||
.caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
|
||||
.version = MMC_CTLR_VERSION_2,
|
||||
};
|
||||
|
||||
static __init void omapl138_hawk_mmc_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = davinci_cfg_reg_list(hawk_mmcsd0_pins);
|
||||
if (ret) {
|
||||
pr_warning("%s: MMC/SD0 mux setup failed: %d\n",
|
||||
__func__, ret);
|
||||
return;
|
||||
}
|
||||
|
||||
ret = gpio_request_one(DA850_HAWK_MMCSD_CD_PIN,
|
||||
GPIOF_DIR_IN, "MMC CD");
|
||||
if (ret < 0) {
|
||||
pr_warning("%s: can not open GPIO %d\n",
|
||||
__func__, DA850_HAWK_MMCSD_CD_PIN);
|
||||
return;
|
||||
}
|
||||
|
||||
ret = gpio_request_one(DA850_HAWK_MMCSD_WP_PIN,
|
||||
GPIOF_DIR_IN, "MMC WP");
|
||||
if (ret < 0) {
|
||||
pr_warning("%s: can not open GPIO %d\n",
|
||||
__func__, DA850_HAWK_MMCSD_WP_PIN);
|
||||
goto mmc_setup_wp_fail;
|
||||
}
|
||||
|
||||
ret = da8xx_register_mmcsd0(&da850_mmc_config);
|
||||
if (ret) {
|
||||
pr_warning("%s: MMC/SD0 registration failed: %d\n",
|
||||
__func__, ret);
|
||||
goto mmc_setup_mmcsd_fail;
|
||||
}
|
||||
|
||||
return;
|
||||
|
||||
mmc_setup_mmcsd_fail:
|
||||
gpio_free(DA850_HAWK_MMCSD_WP_PIN);
|
||||
mmc_setup_wp_fail:
|
||||
gpio_free(DA850_HAWK_MMCSD_CD_PIN);
|
||||
}
|
||||
|
||||
static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id);
|
||||
static da8xx_ocic_handler_t hawk_usb_ocic_handler;
|
||||
|
||||
static const short da850_hawk_usb11_pins[] = {
|
||||
DA850_GPIO2_4, DA850_GPIO6_13,
|
||||
-1
|
||||
};
|
||||
|
||||
static int hawk_usb_set_power(unsigned port, int on)
|
||||
{
|
||||
gpio_set_value(DA850_USB1_VBUS_PIN, on);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int hawk_usb_get_power(unsigned port)
|
||||
{
|
||||
return gpio_get_value(DA850_USB1_VBUS_PIN);
|
||||
}
|
||||
|
||||
static int hawk_usb_get_oci(unsigned port)
|
||||
{
|
||||
return !gpio_get_value(DA850_USB1_OC_PIN);
|
||||
}
|
||||
|
||||
static int hawk_usb_ocic_notify(da8xx_ocic_handler_t handler)
|
||||
{
|
||||
int irq = gpio_to_irq(DA850_USB1_OC_PIN);
|
||||
int error = 0;
|
||||
|
||||
if (handler != NULL) {
|
||||
hawk_usb_ocic_handler = handler;
|
||||
|
||||
error = request_irq(irq, omapl138_hawk_usb_ocic_irq,
|
||||
IRQF_DISABLED | IRQF_TRIGGER_RISING |
|
||||
IRQF_TRIGGER_FALLING,
|
||||
"OHCI over-current indicator", NULL);
|
||||
if (error)
|
||||
pr_err("%s: could not request IRQ to watch "
|
||||
"over-current indicator changes\n", __func__);
|
||||
} else {
|
||||
free_irq(irq, NULL);
|
||||
}
|
||||
return error;
|
||||
}
|
||||
|
||||
static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = {
|
||||
.set_power = hawk_usb_set_power,
|
||||
.get_power = hawk_usb_get_power,
|
||||
.get_oci = hawk_usb_get_oci,
|
||||
.ocic_notify = hawk_usb_ocic_notify,
|
||||
/* TPS2087 switch @ 5V */
|
||||
.potpgt = (3 + 1) / 2, /* 3 ms max */
|
||||
};
|
||||
|
||||
static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id)
|
||||
{
|
||||
hawk_usb_ocic_handler(&omapl138_hawk_usb11_pdata, 1);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static __init void omapl138_hawk_usb_init(void)
|
||||
{
|
||||
int ret;
|
||||
u32 cfgchip2;
|
||||
|
||||
ret = davinci_cfg_reg_list(da850_hawk_usb11_pins);
|
||||
if (ret) {
|
||||
pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
|
||||
__func__, ret);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Setup the Ref. clock frequency for the HAWK at 24 MHz. */
|
||||
|
||||
cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
|
||||
cfgchip2 &= ~CFGCHIP2_REFFREQ;
|
||||
cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
|
||||
__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
|
||||
|
||||
ret = gpio_request_one(DA850_USB1_VBUS_PIN,
|
||||
GPIOF_DIR_OUT, "USB1 VBUS");
|
||||
if (ret < 0) {
|
||||
pr_err("%s: failed to request GPIO for USB 1.1 port "
|
||||
"power control: %d\n", __func__, ret);
|
||||
return;
|
||||
}
|
||||
|
||||
ret = gpio_request_one(DA850_USB1_OC_PIN,
|
||||
GPIOF_DIR_IN, "USB1 OC");
|
||||
if (ret < 0) {
|
||||
pr_err("%s: failed to request GPIO for USB 1.1 port "
|
||||
"over-current indicator: %d\n", __func__, ret);
|
||||
goto usb11_setup_oc_fail;
|
||||
}
|
||||
|
||||
ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata);
|
||||
if (ret) {
|
||||
pr_warning("%s: USB 1.1 registration failed: %d\n",
|
||||
__func__, ret);
|
||||
goto usb11_setup_fail;
|
||||
}
|
||||
|
||||
return;
|
||||
|
||||
usb11_setup_fail:
|
||||
gpio_free(DA850_USB1_OC_PIN);
|
||||
usb11_setup_oc_fail:
|
||||
gpio_free(DA850_USB1_VBUS_PIN);
|
||||
}
|
||||
|
||||
static struct davinci_uart_config omapl138_hawk_uart_config __initdata = {
|
||||
.enabled_uarts = 0x7,
|
||||
|
|
@ -30,6 +303,17 @@ static __init void omapl138_hawk_init(void)
|
|||
|
||||
davinci_serial_init(&omapl138_hawk_uart_config);
|
||||
|
||||
omapl138_hawk_config_emac();
|
||||
|
||||
ret = da850_register_edma(da850_edma_rsv);
|
||||
if (ret)
|
||||
pr_warning("%s: EDMA registration failed: %d\n",
|
||||
__func__, ret);
|
||||
|
||||
omapl138_hawk_mmc_init();
|
||||
|
||||
omapl138_hawk_usb_init();
|
||||
|
||||
ret = da8xx_register_watchdog();
|
||||
if (ret)
|
||||
pr_warning("omapl138_hawk_init: "
|
||||
|
|
|
|||
|
|
@ -148,7 +148,7 @@ static struct clk scr2_ss_clk = {
|
|||
static struct clk dmax_clk = {
|
||||
.name = "dmax",
|
||||
.parent = &pll0_sysclk2,
|
||||
.lpsc = DA8XX_LPSC0_DMAX,
|
||||
.lpsc = DA8XX_LPSC0_PRUSS,
|
||||
.flags = ALWAYS_ENABLED,
|
||||
};
|
||||
|
||||
|
|
@ -397,8 +397,8 @@ static struct clk_lookup da830_clks[] = {
|
|||
CLK(NULL, "uart0", &uart0_clk),
|
||||
CLK(NULL, "uart1", &uart1_clk),
|
||||
CLK(NULL, "uart2", &uart2_clk),
|
||||
CLK("dm_spi.0", NULL, &spi0_clk),
|
||||
CLK("dm_spi.1", NULL, &spi1_clk),
|
||||
CLK("spi_davinci.0", NULL, &spi0_clk),
|
||||
CLK("spi_davinci.1", NULL, &spi1_clk),
|
||||
CLK(NULL, "ecap0", &ecap0_clk),
|
||||
CLK(NULL, "ecap1", &ecap1_clk),
|
||||
CLK(NULL, "ecap2", &ecap2_clk),
|
||||
|
|
|
|||
|
|
@ -345,6 +345,34 @@ static struct clk aemif_clk = {
|
|||
.flags = ALWAYS_ENABLED,
|
||||
};
|
||||
|
||||
static struct clk usb11_clk = {
|
||||
.name = "usb11",
|
||||
.parent = &pll0_sysclk4,
|
||||
.lpsc = DA8XX_LPSC1_USB11,
|
||||
.gpsc = 1,
|
||||
};
|
||||
|
||||
static struct clk usb20_clk = {
|
||||
.name = "usb20",
|
||||
.parent = &pll0_sysclk2,
|
||||
.lpsc = DA8XX_LPSC1_USB20,
|
||||
.gpsc = 1,
|
||||
};
|
||||
|
||||
static struct clk spi0_clk = {
|
||||
.name = "spi0",
|
||||
.parent = &pll0_sysclk2,
|
||||
.lpsc = DA8XX_LPSC0_SPI0,
|
||||
};
|
||||
|
||||
static struct clk spi1_clk = {
|
||||
.name = "spi1",
|
||||
.parent = &pll0_sysclk2,
|
||||
.lpsc = DA8XX_LPSC1_SPI1,
|
||||
.gpsc = 1,
|
||||
.flags = DA850_CLK_ASYNC3,
|
||||
};
|
||||
|
||||
static struct clk_lookup da850_clks[] = {
|
||||
CLK(NULL, "ref", &ref_clk),
|
||||
CLK(NULL, "pll0", &pll0_clk),
|
||||
|
|
@ -387,6 +415,10 @@ static struct clk_lookup da850_clks[] = {
|
|||
CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
|
||||
CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
|
||||
CLK(NULL, "aemif", &aemif_clk),
|
||||
CLK(NULL, "usb11", &usb11_clk),
|
||||
CLK(NULL, "usb20", &usb20_clk),
|
||||
CLK("spi_davinci.0", NULL, &spi0_clk),
|
||||
CLK("spi_davinci.1", NULL, &spi1_clk),
|
||||
CLK(NULL, NULL, NULL),
|
||||
};
|
||||
|
||||
|
|
@ -543,30 +575,19 @@ static const struct mux_config da850_pins[] = {
|
|||
MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false)
|
||||
MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false)
|
||||
/* GPIO function */
|
||||
MUX_CFG(DA850, GPIO2_4, 6, 12, 15, 8, false)
|
||||
MUX_CFG(DA850, GPIO2_6, 6, 4, 15, 8, false)
|
||||
MUX_CFG(DA850, GPIO2_8, 5, 28, 15, 8, false)
|
||||
MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false)
|
||||
MUX_CFG(DA850, GPIO3_12, 7, 12, 15, 8, false)
|
||||
MUX_CFG(DA850, GPIO3_13, 7, 8, 15, 8, false)
|
||||
MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false)
|
||||
MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false)
|
||||
MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false)
|
||||
MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false)
|
||||
#endif
|
||||
};
|
||||
|
||||
const short da850_uart0_pins[] __initdata = {
|
||||
DA850_NUART0_CTS, DA850_NUART0_RTS, DA850_UART0_RXD, DA850_UART0_TXD,
|
||||
-1
|
||||
};
|
||||
|
||||
const short da850_uart1_pins[] __initdata = {
|
||||
DA850_UART1_RXD, DA850_UART1_TXD,
|
||||
-1
|
||||
};
|
||||
|
||||
const short da850_uart2_pins[] __initdata = {
|
||||
DA850_UART2_RXD, DA850_UART2_TXD,
|
||||
-1
|
||||
};
|
||||
|
||||
const short da850_i2c0_pins[] __initdata = {
|
||||
DA850_I2C0_SDA, DA850_I2C0_SCL,
|
||||
-1
|
||||
|
|
@ -577,24 +598,6 @@ const short da850_i2c1_pins[] __initdata = {
|
|||
-1
|
||||
};
|
||||
|
||||
const short da850_cpgmac_pins[] __initdata = {
|
||||
DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
|
||||
DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
|
||||
DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
|
||||
DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
|
||||
DA850_MDIO_D, DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
|
||||
DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, DA850_RMII_RXER,
|
||||
DA850_RMII_MHZ_50_CLK,
|
||||
-1
|
||||
};
|
||||
|
||||
const short da850_mcasp_pins[] __initdata = {
|
||||
DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
|
||||
DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
|
||||
DA850_AXR_11, DA850_AXR_12,
|
||||
-1
|
||||
};
|
||||
|
||||
const short da850_lcdcntl_pins[] __initdata = {
|
||||
DA850_LCD_D_0, DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3,
|
||||
DA850_LCD_D_4, DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7,
|
||||
|
|
@ -604,29 +607,6 @@ const short da850_lcdcntl_pins[] __initdata = {
|
|||
-1
|
||||
};
|
||||
|
||||
const short da850_mmcsd0_pins[] __initdata = {
|
||||
DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
|
||||
DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
|
||||
DA850_GPIO4_0, DA850_GPIO4_1,
|
||||
-1
|
||||
};
|
||||
|
||||
const short da850_emif25_pins[] __initdata = {
|
||||
DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
|
||||
DA850_NEMA_CS_3, DA850_NEMA_CS_4, DA850_NEMA_WE, DA850_NEMA_OE,
|
||||
DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
|
||||
DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
|
||||
DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11,
|
||||
DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15,
|
||||
DA850_EMA_A_0, DA850_EMA_A_1, DA850_EMA_A_2, DA850_EMA_A_3,
|
||||
DA850_EMA_A_4, DA850_EMA_A_5, DA850_EMA_A_6, DA850_EMA_A_7,
|
||||
DA850_EMA_A_8, DA850_EMA_A_9, DA850_EMA_A_10, DA850_EMA_A_11,
|
||||
DA850_EMA_A_12, DA850_EMA_A_13, DA850_EMA_A_14, DA850_EMA_A_15,
|
||||
DA850_EMA_A_16, DA850_EMA_A_17, DA850_EMA_A_18, DA850_EMA_A_19,
|
||||
DA850_EMA_A_20, DA850_EMA_A_21, DA850_EMA_A_22, DA850_EMA_A_23,
|
||||
-1
|
||||
};
|
||||
|
||||
/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
|
||||
static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
|
||||
[IRQ_DA8XX_COMMTX] = 7,
|
||||
|
|
@ -764,6 +744,13 @@ static struct davinci_id da850_ids[] = {
|
|||
.cpu_id = DAVINCI_CPU_ID_DA850,
|
||||
.name = "da850/omap-l138",
|
||||
},
|
||||
{
|
||||
.variant = 0x1,
|
||||
.part_no = 0xb7d1,
|
||||
.manufacturer = 0x017, /* 0x02f >> 1 */
|
||||
.cpu_id = DAVINCI_CPU_ID_DA850,
|
||||
.name = "da850/omap-l138/am18x",
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_timer_instance da850_timer_instance[4] = {
|
||||
|
|
|
|||
|
|
@ -38,12 +38,23 @@
|
|||
#define DA8XX_EMAC_MDIO_BASE 0x01e24000
|
||||
#define DA8XX_GPIO_BASE 0x01e26000
|
||||
#define DA8XX_I2C1_BASE 0x01e28000
|
||||
#define DA8XX_SPI0_BASE 0x01c41000
|
||||
#define DA8XX_SPI1_BASE 0x01f0e000
|
||||
|
||||
#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
|
||||
#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
|
||||
#define DA8XX_EMAC_RAM_OFFSET 0x0000
|
||||
#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
|
||||
|
||||
#define DA8XX_DMA_SPI0_RX EDMA_CTLR_CHAN(0, 14)
|
||||
#define DA8XX_DMA_SPI0_TX EDMA_CTLR_CHAN(0, 15)
|
||||
#define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16)
|
||||
#define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17)
|
||||
#define DA8XX_DMA_SPI1_RX EDMA_CTLR_CHAN(0, 18)
|
||||
#define DA8XX_DMA_SPI1_TX EDMA_CTLR_CHAN(0, 19)
|
||||
#define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28)
|
||||
#define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29)
|
||||
|
||||
void __iomem *da8xx_syscfg0_base;
|
||||
void __iomem *da8xx_syscfg1_base;
|
||||
|
||||
|
|
@ -573,13 +584,13 @@ static struct resource da8xx_mmcsd0_resources[] = {
|
|||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{ /* DMA RX */
|
||||
.start = EDMA_CTLR_CHAN(0, 16),
|
||||
.end = EDMA_CTLR_CHAN(0, 16),
|
||||
.start = DA8XX_DMA_MMCSD0_RX,
|
||||
.end = DA8XX_DMA_MMCSD0_RX,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
{ /* DMA TX */
|
||||
.start = EDMA_CTLR_CHAN(0, 17),
|
||||
.end = EDMA_CTLR_CHAN(0, 17),
|
||||
.start = DA8XX_DMA_MMCSD0_TX,
|
||||
.end = DA8XX_DMA_MMCSD0_TX,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
};
|
||||
|
|
@ -610,13 +621,13 @@ static struct resource da850_mmcsd1_resources[] = {
|
|||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{ /* DMA RX */
|
||||
.start = EDMA_CTLR_CHAN(1, 28),
|
||||
.end = EDMA_CTLR_CHAN(1, 28),
|
||||
.start = DA850_DMA_MMCSD1_RX,
|
||||
.end = DA850_DMA_MMCSD1_RX,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
{ /* DMA TX */
|
||||
.start = EDMA_CTLR_CHAN(1, 29),
|
||||
.end = EDMA_CTLR_CHAN(1, 29),
|
||||
.start = DA850_DMA_MMCSD1_TX,
|
||||
.end = DA850_DMA_MMCSD1_TX,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
};
|
||||
|
|
@ -725,3 +736,101 @@ int __init da8xx_register_cpuidle(void)
|
|||
|
||||
return platform_device_register(&da8xx_cpuidle_device);
|
||||
}
|
||||
|
||||
static struct resource da8xx_spi0_resources[] = {
|
||||
[0] = {
|
||||
.start = DA8XX_SPI0_BASE,
|
||||
.end = DA8XX_SPI0_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_DA8XX_SPINT0,
|
||||
.end = IRQ_DA8XX_SPINT0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
.start = DA8XX_DMA_SPI0_RX,
|
||||
.end = DA8XX_DMA_SPI0_RX,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
[3] = {
|
||||
.start = DA8XX_DMA_SPI0_TX,
|
||||
.end = DA8XX_DMA_SPI0_TX,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource da8xx_spi1_resources[] = {
|
||||
[0] = {
|
||||
.start = DA8XX_SPI1_BASE,
|
||||
.end = DA8XX_SPI1_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_DA8XX_SPINT1,
|
||||
.end = IRQ_DA8XX_SPINT1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
.start = DA8XX_DMA_SPI1_RX,
|
||||
.end = DA8XX_DMA_SPI1_RX,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
[3] = {
|
||||
.start = DA8XX_DMA_SPI1_TX,
|
||||
.end = DA8XX_DMA_SPI1_TX,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
};
|
||||
|
||||
struct davinci_spi_platform_data da8xx_spi_pdata[] = {
|
||||
[0] = {
|
||||
.version = SPI_VERSION_2,
|
||||
.intr_line = 1,
|
||||
.dma_event_q = EVENTQ_0,
|
||||
},
|
||||
[1] = {
|
||||
.version = SPI_VERSION_2,
|
||||
.intr_line = 1,
|
||||
.dma_event_q = EVENTQ_0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device da8xx_spi_device[] = {
|
||||
[0] = {
|
||||
.name = "spi_davinci",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(da8xx_spi0_resources),
|
||||
.resource = da8xx_spi0_resources,
|
||||
.dev = {
|
||||
.platform_data = &da8xx_spi_pdata[0],
|
||||
},
|
||||
},
|
||||
[1] = {
|
||||
.name = "spi_davinci",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(da8xx_spi1_resources),
|
||||
.resource = da8xx_spi1_resources,
|
||||
.dev = {
|
||||
.platform_data = &da8xx_spi_pdata[1],
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
int __init da8xx_register_spi(int instance, struct spi_board_info *info,
|
||||
unsigned len)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (instance < 0 || instance > 1)
|
||||
return -EINVAL;
|
||||
|
||||
ret = spi_register_board_info(info, len);
|
||||
if (ret)
|
||||
pr_warning("%s: failed to register board info for spi %d :"
|
||||
" %d\n", __func__, instance, ret);
|
||||
|
||||
da8xx_spi_pdata[instance].num_chipselect = len;
|
||||
|
||||
return platform_device_register(&da8xx_spi_device[instance]);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -403,16 +403,13 @@ static struct resource dm355_spi0_resources[] = {
|
|||
.start = 16,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
{
|
||||
.start = EVENTQ_1,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_spi_platform_data dm355_spi0_pdata = {
|
||||
.version = SPI_VERSION_1,
|
||||
.num_chipselect = 2,
|
||||
.cshold_bug = true,
|
||||
.dma_event_q = EVENTQ_1,
|
||||
};
|
||||
static struct platform_device dm355_spi0_device = {
|
||||
.name = "spi_davinci",
|
||||
|
|
|
|||
|
|
@ -625,6 +625,7 @@ static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32);
|
|||
static struct davinci_spi_platform_data dm365_spi0_pdata = {
|
||||
.version = SPI_VERSION_1,
|
||||
.num_chipselect = 2,
|
||||
.dma_event_q = EVENTQ_3,
|
||||
};
|
||||
|
||||
static struct resource dm365_spi0_resources[] = {
|
||||
|
|
@ -645,10 +646,6 @@ static struct resource dm365_spi0_resources[] = {
|
|||
.start = 16,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
{
|
||||
.start = EVENTQ_3,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device dm365_spi0_device = {
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/davinci_emac.h>
|
||||
#include <linux/spi/spi.h>
|
||||
|
||||
#include <mach/serial.h>
|
||||
#include <mach/edma.h>
|
||||
|
|
@ -23,6 +24,7 @@
|
|||
#include <mach/mmc.h>
|
||||
#include <mach/usb.h>
|
||||
#include <mach/pm.h>
|
||||
#include <mach/spi.h>
|
||||
|
||||
extern void __iomem *da8xx_syscfg0_base;
|
||||
extern void __iomem *da8xx_syscfg1_base;
|
||||
|
|
@ -77,6 +79,7 @@ void __init da850_init(void);
|
|||
int da830_register_edma(struct edma_rsv_info *rsv);
|
||||
int da850_register_edma(struct edma_rsv_info *rsv[2]);
|
||||
int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
|
||||
int da8xx_register_spi(int instance, struct spi_board_info *info, unsigned len);
|
||||
int da8xx_register_watchdog(void);
|
||||
int da8xx_register_usb20(unsigned mA, unsigned potpgt);
|
||||
int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
|
||||
|
|
@ -95,6 +98,7 @@ extern struct platform_device da8xx_serial_device;
|
|||
extern struct emac_platform_data da8xx_emac_pdata;
|
||||
extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
|
||||
extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
|
||||
extern struct davinci_spi_platform_data da8xx_spi_pdata[];
|
||||
|
||||
extern struct platform_device da8xx_wdt_device;
|
||||
|
||||
|
|
@ -123,15 +127,8 @@ extern const short da830_ecap2_pins[];
|
|||
extern const short da830_eqep0_pins[];
|
||||
extern const short da830_eqep1_pins[];
|
||||
|
||||
extern const short da850_uart0_pins[];
|
||||
extern const short da850_uart1_pins[];
|
||||
extern const short da850_uart2_pins[];
|
||||
extern const short da850_i2c0_pins[];
|
||||
extern const short da850_i2c1_pins[];
|
||||
extern const short da850_cpgmac_pins[];
|
||||
extern const short da850_mcasp_pins[];
|
||||
extern const short da850_lcdcntl_pins[];
|
||||
extern const short da850_mmcsd0_pins[];
|
||||
extern const short da850_emif25_pins[];
|
||||
|
||||
#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
|
||||
|
|
|
|||
|
|
@ -151,42 +151,6 @@ struct edmacc_param {
|
|||
#define DA830_DMACH2EVENT_MAP1 0x00000000u
|
||||
#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
|
||||
|
||||
/* DA830 specific EDMA3 Events Information */
|
||||
enum DA830_edma_ch {
|
||||
DA830_DMACH_MCASP0_RX,
|
||||
DA830_DMACH_MCASP0_TX,
|
||||
DA830_DMACH_MCASP1_RX,
|
||||
DA830_DMACH_MCASP1_TX,
|
||||
DA830_DMACH_MCASP2_RX,
|
||||
DA830_DMACH_MCASP2_TX,
|
||||
DA830_DMACH_GPIO_BNK0INT,
|
||||
DA830_DMACH_GPIO_BNK1INT,
|
||||
DA830_DMACH_UART0_RX,
|
||||
DA830_DMACH_UART0_TX,
|
||||
DA830_DMACH_TMR64P0_EVTOUT12,
|
||||
DA830_DMACH_TMR64P0_EVTOUT34,
|
||||
DA830_DMACH_UART1_RX,
|
||||
DA830_DMACH_UART1_TX,
|
||||
DA830_DMACH_SPI0_RX,
|
||||
DA830_DMACH_SPI0_TX,
|
||||
DA830_DMACH_MMCSD_RX,
|
||||
DA830_DMACH_MMCSD_TX,
|
||||
DA830_DMACH_SPI1_RX,
|
||||
DA830_DMACH_SPI1_TX,
|
||||
DA830_DMACH_DMAX_EVTOUT6,
|
||||
DA830_DMACH_DMAX_EVTOUT7,
|
||||
DA830_DMACH_GPIO_BNK2INT,
|
||||
DA830_DMACH_GPIO_BNK3INT,
|
||||
DA830_DMACH_I2C0_RX,
|
||||
DA830_DMACH_I2C0_TX,
|
||||
DA830_DMACH_I2C1_RX,
|
||||
DA830_DMACH_I2C1_TX,
|
||||
DA830_DMACH_GPIO_BNK4INT,
|
||||
DA830_DMACH_GPIO_BNK5INT,
|
||||
DA830_DMACH_UART2_RX,
|
||||
DA830_DMACH_UART2_TX
|
||||
};
|
||||
|
||||
/*ch_status paramater of callback function possible values*/
|
||||
#define DMA_COMPLETE 1
|
||||
#define DMA_CC_ERROR 2
|
||||
|
|
|
|||
|
|
@ -908,11 +908,15 @@ enum davinci_da850_index {
|
|||
DA850_NEMA_CS_2,
|
||||
|
||||
/* GPIO function */
|
||||
DA850_GPIO2_4,
|
||||
DA850_GPIO2_6,
|
||||
DA850_GPIO2_8,
|
||||
DA850_GPIO2_15,
|
||||
DA850_GPIO3_12,
|
||||
DA850_GPIO3_13,
|
||||
DA850_GPIO4_0,
|
||||
DA850_GPIO4_1,
|
||||
DA850_GPIO6_13,
|
||||
DA850_RTC_ALARM,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -150,7 +150,7 @@
|
|||
#define DA8XX_LPSC0_SCR0_SS 10
|
||||
#define DA8XX_LPSC0_SCR1_SS 11
|
||||
#define DA8XX_LPSC0_SCR2_SS 12
|
||||
#define DA8XX_LPSC0_DMAX 13
|
||||
#define DA8XX_LPSC0_PRUSS 13
|
||||
#define DA8XX_LPSC0_ARM 14
|
||||
#define DA8XX_LPSC0_GEM 15
|
||||
|
||||
|
|
|
|||
|
|
@ -19,6 +19,8 @@
|
|||
#ifndef __ARCH_ARM_DAVINCI_SPI_H
|
||||
#define __ARCH_ARM_DAVINCI_SPI_H
|
||||
|
||||
#include <mach/edma.h>
|
||||
|
||||
#define SPI_INTERN_CS 0xFF
|
||||
|
||||
enum {
|
||||
|
|
@ -39,13 +41,16 @@ enum {
|
|||
* to populate if all chip-selects are internal.
|
||||
* @cshold_bug: set this to true if the SPI controller on your chip requires
|
||||
* a write to CSHOLD bit in between transfers (like in DM355).
|
||||
* @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
|
||||
* device on the bus.
|
||||
*/
|
||||
struct davinci_spi_platform_data {
|
||||
u8 version;
|
||||
u8 num_chipselect;
|
||||
u8 intr_line;
|
||||
u8 *chip_sel;
|
||||
bool cshold_bug;
|
||||
u8 version;
|
||||
u8 num_chipselect;
|
||||
u8 intr_line;
|
||||
u8 *chip_sel;
|
||||
bool cshold_bug;
|
||||
enum dma_event_q dma_event_q;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -790,7 +790,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
|
|||
struct resource *r, *mem;
|
||||
resource_size_t dma_rx_chan = SPI_NO_RESOURCE;
|
||||
resource_size_t dma_tx_chan = SPI_NO_RESOURCE;
|
||||
resource_size_t dma_eventq = SPI_NO_RESOURCE;
|
||||
int i = 0, ret = 0;
|
||||
u32 spipc0;
|
||||
|
||||
|
|
@ -878,17 +877,13 @@ static int davinci_spi_probe(struct platform_device *pdev)
|
|||
r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
|
||||
if (r)
|
||||
dma_tx_chan = r->start;
|
||||
r = platform_get_resource(pdev, IORESOURCE_DMA, 2);
|
||||
if (r)
|
||||
dma_eventq = r->start;
|
||||
|
||||
dspi->bitbang.txrx_bufs = davinci_spi_bufs;
|
||||
if (dma_rx_chan != SPI_NO_RESOURCE &&
|
||||
dma_tx_chan != SPI_NO_RESOURCE &&
|
||||
dma_eventq != SPI_NO_RESOURCE) {
|
||||
dma_tx_chan != SPI_NO_RESOURCE) {
|
||||
dspi->dma.rx_channel = dma_rx_chan;
|
||||
dspi->dma.tx_channel = dma_tx_chan;
|
||||
dspi->dma.eventq = dma_eventq;
|
||||
dspi->dma.eventq = pdata->dma_event_q;
|
||||
|
||||
ret = davinci_spi_request_dma(dspi);
|
||||
if (ret)
|
||||
|
|
@ -897,7 +892,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
|
|||
dev_info(&pdev->dev, "DMA: supported\n");
|
||||
dev_info(&pdev->dev, "DMA: RX channel: %d, TX channel: %d, "
|
||||
"event queue: %d\n", dma_rx_chan, dma_tx_chan,
|
||||
dma_eventq);
|
||||
pdata->dma_event_q);
|
||||
}
|
||||
|
||||
dspi->get_rx = davinci_spi_rx_buf_u8;
|
||||
|
|
|
|||
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