Linux 4.16-rc6
-----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlqvCPYeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGOaAH/171cgZGFEXSONxK 3O1AAv61wN5K/ISMt6mnelWR6fZg195FarOx0Rnq7Ot8OWuVa8CGcyT4vX4Z7nb9 SVMQKNMPCVQE4WCDOv6S0njChmRC0BxBoVJtTN9fhywdYgX1KcaTS/drMRHACF5n rB9eouMQScfMzKGAW08gp5NvEGJ6W1SLX7La3/u0751dYisdJSP7+vFZNxUrGXEA yIPOQjFu0Tfo8GXz/BwC678RZVzVLN0sE6+/vM7zNnoDlsRVkdDIVMo3UiVqm/NK B37/TlZz8CYoapoKnRRB5giXnSPDSXtsikbGy3mcy0u5imGe+ZgdjrdYSaLk31cR NVZY08k= =pu3X -----END PGP SIGNATURE----- Merge tag 'v4.16-rc6' into next-general Merge to Linux 4.16-rc6 at the request of Jarkko, for his TPM updates.
This commit is contained in:
James Morris
Коммит
5893ed18a2
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@ -127,3 +127,7 @@ all.config
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# Kdevelop4
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*.kdev4
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#Automatically generated by ASN.1 compiler
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net/ipv4/netfilter/nf_nat_snmp_basic-asn1.c
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net/ipv4/netfilter/nf_nat_snmp_basic-asn1.h
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@ -570,7 +570,9 @@ your driver if they're helpful, or just use plain hex constants.
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The device IDs are arbitrary hex numbers (vendor controlled) and normally used
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only in a single location, the pci_device_id table.
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Please DO submit new vendor/device IDs to http://pciids.sourceforge.net/.
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Please DO submit new vendor/device IDs to http://pci-ids.ucw.cz/.
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There are mirrors of the pci.ids file at http://pciids.sourceforge.net/
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and https://github.com/pciutils/pciids.
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@ -152,6 +152,11 @@ OCXL_IOCTL_IRQ_SET_FD:
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Associate an event fd to an AFU interrupt so that the user process
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can be notified when the AFU sends an interrupt.
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OCXL_IOCTL_GET_METADATA:
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Obtains configuration information from the card, such at the size of
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MMIO areas, the AFU version, and the PASID for the current context.
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mmap
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----
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@ -11,7 +11,11 @@ Required properties:
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interrupts.
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Optional properties:
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- clocks: Optional reference to the clock used by the XOR engine.
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- clocks: Optional reference to the clocks used by the XOR engine.
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- clock-names: mandatory if there is a second clock, in this case the
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name must be "core" for the first clock and "reg" for the second
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one
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Example:
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@ -38,9 +38,9 @@ Required properties:
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"catalyst",
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"microchip",
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"nxp",
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"ramtron",
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"renesas",
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"nxp",
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"st",
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Some vendors use different model names for chips which are just
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@ -14,6 +14,7 @@ Required properties:
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- "renesas,irqc-r8a7794" (R-Car E2)
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- "renesas,intc-ex-r8a7795" (R-Car H3)
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- "renesas,intc-ex-r8a7796" (R-Car M3-W)
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- "renesas,intc-ex-r8a77965" (R-Car M3-N)
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- "renesas,intc-ex-r8a77970" (R-Car V3M)
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- "renesas,intc-ex-r8a77995" (R-Car D3)
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- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
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@ -18,6 +18,7 @@ Required properties:
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- "renesas,etheravb-r8a7795" for the R8A7795 SoC.
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- "renesas,etheravb-r8a7796" for the R8A7796 SoC.
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- "renesas,etheravb-r8a77970" for the R8A77970 SoC.
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- "renesas,etheravb-r8a77980" for the R8A77980 SoC.
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- "renesas,etheravb-r8a77995" for the R8A77995 SoC.
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- "renesas,etheravb-rcar-gen3" as a fallback for the above
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R-Car Gen3 devices.
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@ -60,7 +60,7 @@ Examples
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#size-cells = <0>;
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button@1 {
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debounce_interval = <50>;
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debounce-interval = <50>;
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wakeup-source;
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linux,code = <116>;
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label = "POWER";
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@ -22,7 +22,32 @@ Optional properties:
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- clocks : thermal sensor's clock source.
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Example:
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ocotp: ocotp@21bc000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,imx6sx-ocotp", "syscon";
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reg = <0x021bc000 0x4000>;
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clocks = <&clks IMX6SX_CLK_OCOTP>;
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tempmon_calib: calib@38 {
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reg = <0x38 4>;
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};
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tempmon_temp_grade: temp-grade@20 {
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reg = <0x20 4>;
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};
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};
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tempmon: tempmon {
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compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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fsl,tempmon = <&anatop>;
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nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
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nvmem-cell-names = "calib", "temp_grade";
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clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
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};
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Legacy method (Deprecated):
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tempmon {
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compatible = "fsl,imx6q-tempmon";
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fsl,tempmon = <&anatop>;
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@ -19,7 +19,7 @@ Required properties:
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configured in FS mode;
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- "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
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configured in HS mode;
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- "st,stm32f7xx-hsotg": The DWC2 USB HS controller instance in STM32F7xx SoCs
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- "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
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configured in HS mode;
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- reg : Should contain 1 register range (address and length)
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- interrupts : Should contain 1 interrupt
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@ -4,6 +4,7 @@ Required properties:
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- compatible: Must contain one of the following:
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- "renesas,r8a7795-usb3-peri"
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- "renesas,r8a7796-usb3-peri"
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- "renesas,r8a77965-usb3-peri"
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- "renesas,rcar-gen3-usb3-peri" for a generic R-Car Gen3 compatible
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device
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@ -12,6 +12,7 @@ Required properties:
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- "renesas,usbhs-r8a7794" for r8a7794 (R-Car E2) compatible device
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- "renesas,usbhs-r8a7795" for r8a7795 (R-Car H3) compatible device
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- "renesas,usbhs-r8a7796" for r8a7796 (R-Car M3-W) compatible device
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- "renesas,usbhs-r8a77965" for r8a77965 (R-Car M3-N) compatible device
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- "renesas,usbhs-r8a77995" for r8a77995 (R-Car D3) compatible device
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- "renesas,usbhs-r7s72100" for r7s72100 (RZ/A1) compatible device
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- "renesas,rcar-gen2-usbhs" for R-Car Gen2 or RZ/G1 compatible devices
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@ -13,6 +13,7 @@ Required properties:
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- "renesas,xhci-r8a7793" for r8a7793 SoC
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- "renesas,xhci-r8a7795" for r8a7795 SoC
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- "renesas,xhci-r8a7796" for r8a7796 SoC
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- "renesas,xhci-r8a77965" for r8a77965 SoC
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- "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible
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device
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- "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device
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@ -3,4 +3,4 @@
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==================================
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.. kernel-doc:: drivers/gpu/drm/tve200/tve200_drv.c
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:doc: Faraday TV Encoder 200
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:doc: Faraday TV Encoder TVE200 DRM Driver
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@ -28,8 +28,10 @@ Supported adapters:
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* Intel Wildcat Point (PCH)
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* Intel Wildcat Point-LP (PCH)
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* Intel BayTrail (SOC)
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* Intel Braswell (SOC)
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* Intel Sunrise Point-H (PCH)
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* Intel Sunrise Point-LP (PCH)
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* Intel Kaby Lake-H (PCH)
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* Intel DNV (SOC)
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* Intel Broxton (SOC)
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* Intel Lewisburg (PCH)
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@ -111,7 +111,7 @@ TROUBLESHOOTING SERIAL CONSOLE PROBLEMS
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- If you don't have an HCDP, the kernel doesn't know where
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your console lives until the driver discovers serial
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devices. Use "console=uart, io,0x3f8" (or appropriate
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devices. Use "console=uart,io,0x3f8" (or appropriate
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address for your machine).
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Kernel and init script output works fine, but no "login:" prompt:
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@ -50,9 +50,15 @@ replace typedef dmx_filter_t :c:type:`dmx_filter`
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replace typedef dmx_pes_type_t :c:type:`dmx_pes_type`
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replace typedef dmx_input_t :c:type:`dmx_input`
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ignore symbol DMX_OUT_DECODER
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ignore symbol DMX_OUT_TAP
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ignore symbol DMX_OUT_TS_TAP
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ignore symbol DMX_OUT_TSDEMUX_TAP
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replace symbol DMX_BUFFER_FLAG_HAD_CRC32_DISCARD :c:type:`dmx_buffer_flags`
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replace symbol DMX_BUFFER_FLAG_TEI :c:type:`dmx_buffer_flags`
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replace symbol DMX_BUFFER_PKT_COUNTER_MISMATCH :c:type:`dmx_buffer_flags`
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replace symbol DMX_BUFFER_FLAG_DISCONTINUITY_DETECTED :c:type:`dmx_buffer_flags`
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replace symbol DMX_BUFFER_FLAG_DISCONTINUITY_INDICATOR :c:type:`dmx_buffer_flags`
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replace symbol DMX_OUT_DECODER :c:type:`dmx_output`
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replace symbol DMX_OUT_TAP :c:type:`dmx_output`
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replace symbol DMX_OUT_TS_TAP :c:type:`dmx_output`
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replace symbol DMX_OUT_TSDEMUX_TAP :c:type:`dmx_output`
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replace ioctl DMX_DQBUF dmx_qbuf
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@ -51,9 +51,10 @@ out to disk. Buffers remain locked until dequeued, until the
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the device is closed.
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Applications call the ``DMX_DQBUF`` ioctl to dequeue a filled
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(capturing) buffer from the driver's outgoing queue. They just set the ``reserved`` field array to zero. When ``DMX_DQBUF`` is called with a
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pointer to this structure, the driver fills the remaining fields or
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returns an error code.
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(capturing) buffer from the driver's outgoing queue.
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They just set the ``index`` field withe the buffer ID to be queued.
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When ``DMX_DQBUF`` is called with a pointer to struct :c:type:`dmx_buffer`,
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the driver fills the remaining fields or returns an error code.
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By default ``DMX_DQBUF`` blocks when no buffer is in the outgoing
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queue. When the ``O_NONBLOCK`` flag was given to the
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@ -13,6 +13,7 @@ The following technologies are described:
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* Generic Segmentation Offload - GSO
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* Generic Receive Offload - GRO
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* Partial Generic Segmentation Offload - GSO_PARTIAL
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* SCTP accelleration with GSO - GSO_BY_FRAGS
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TCP Segmentation Offload
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========================
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@ -49,6 +50,10 @@ datagram into multiple IPv4 fragments. Many of the requirements for UDP
|
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fragmentation offload are the same as TSO. However the IPv4 ID for
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fragments should not increment as a single IPv4 datagram is fragmented.
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UFO is deprecated: modern kernels will no longer generate UFO skbs, but can
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still receive them from tuntap and similar devices. Offload of UDP-based
|
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tunnel protocols is still supported.
|
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IPIP, SIT, GRE, UDP Tunnel, and Remote Checksum Offloads
|
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========================================================
|
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@ -83,10 +88,10 @@ SKB_GSO_UDP_TUNNEL_CSUM. These two additional tunnel types reflect the
|
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fact that the outer header also requests to have a non-zero checksum
|
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included in the outer header.
|
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Finally there is SKB_GSO_REMCSUM which indicates that a given tunnel header
|
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has requested a remote checksum offload. In this case the inner headers
|
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will be left with a partial checksum and only the outer header checksum
|
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will be computed.
|
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Finally there is SKB_GSO_TUNNEL_REMCSUM which indicates that a given tunnel
|
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header has requested a remote checksum offload. In this case the inner
|
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headers will be left with a partial checksum and only the outer header
|
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checksum will be computed.
|
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|
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Generic Segmentation Offload
|
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============================
|
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|
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@ -128,3 +133,28 @@ values for if the header was simply duplicated. The one exception to this
|
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is the outer IPv4 ID field. It is up to the device drivers to guarantee
|
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that the IPv4 ID field is incremented in the case that a given header does
|
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not have the DF bit set.
|
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|
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SCTP accelleration with GSO
|
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===========================
|
||||
|
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SCTP - despite the lack of hardware support - can still take advantage of
|
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GSO to pass one large packet through the network stack, rather than
|
||||
multiple small packets.
|
||||
|
||||
This requires a different approach to other offloads, as SCTP packets
|
||||
cannot be just segmented to (P)MTU. Rather, the chunks must be contained in
|
||||
IP segments, padding respected. So unlike regular GSO, SCTP can't just
|
||||
generate a big skb, set gso_size to the fragmentation point and deliver it
|
||||
to IP layer.
|
||||
|
||||
Instead, the SCTP protocol layer builds an skb with the segments correctly
|
||||
padded and stored as chained skbs, and skb_segment() splits based on those.
|
||||
To signal this, gso_size is set to the special value GSO_BY_FRAGS.
|
||||
|
||||
Therefore, any code in the core networking stack must be aware of the
|
||||
possibility that gso_size will be GSO_BY_FRAGS and handle that case
|
||||
appropriately. (For size checks, the skb_gso_validate_*_len family of
|
||||
helpers do this automatically.)
|
||||
|
||||
This also affects drivers with the NETIF_F_FRAGLIST & NETIF_F_GSO_SCTP bits
|
||||
set. Note also that NETIF_F_GSO_SCTP is included in NETIF_F_GSO_SOFTWARE.
|
||||
|
|
|
|||
|
|
@ -36,8 +36,7 @@ import glob
|
|||
|
||||
from docutils import nodes, statemachine
|
||||
from docutils.statemachine import ViewList
|
||||
from docutils.parsers.rst import directives
|
||||
from sphinx.util.compat import Directive
|
||||
from docutils.parsers.rst import directives, Directive
|
||||
from sphinx.ext.autodoc import AutodocReporter
|
||||
|
||||
__version__ = '1.0'
|
||||
|
|
|
|||
|
|
@ -123,14 +123,15 @@ memory layout to fit in user mode), check KVM_CAP_MIPS_VZ and use the
|
|||
flag KVM_VM_MIPS_VZ.
|
||||
|
||||
|
||||
4.3 KVM_GET_MSR_INDEX_LIST
|
||||
4.3 KVM_GET_MSR_INDEX_LIST, KVM_GET_MSR_FEATURE_INDEX_LIST
|
||||
|
||||
Capability: basic
|
||||
Capability: basic, KVM_CAP_GET_MSR_FEATURES for KVM_GET_MSR_FEATURE_INDEX_LIST
|
||||
Architectures: x86
|
||||
Type: system
|
||||
Type: system ioctl
|
||||
Parameters: struct kvm_msr_list (in/out)
|
||||
Returns: 0 on success; -1 on error
|
||||
Errors:
|
||||
EFAULT: the msr index list cannot be read from or written to
|
||||
E2BIG: the msr index list is to be to fit in the array specified by
|
||||
the user.
|
||||
|
||||
|
|
@ -139,16 +140,23 @@ struct kvm_msr_list {
|
|||
__u32 indices[0];
|
||||
};
|
||||
|
||||
This ioctl returns the guest msrs that are supported. The list varies
|
||||
by kvm version and host processor, but does not change otherwise. The
|
||||
user fills in the size of the indices array in nmsrs, and in return
|
||||
kvm adjusts nmsrs to reflect the actual number of msrs and fills in
|
||||
the indices array with their numbers.
|
||||
The user fills in the size of the indices array in nmsrs, and in return
|
||||
kvm adjusts nmsrs to reflect the actual number of msrs and fills in the
|
||||
indices array with their numbers.
|
||||
|
||||
KVM_GET_MSR_INDEX_LIST returns the guest msrs that are supported. The list
|
||||
varies by kvm version and host processor, but does not change otherwise.
|
||||
|
||||
Note: if kvm indicates supports MCE (KVM_CAP_MCE), then the MCE bank MSRs are
|
||||
not returned in the MSR list, as different vcpus can have a different number
|
||||
of banks, as set via the KVM_X86_SETUP_MCE ioctl.
|
||||
|
||||
KVM_GET_MSR_FEATURE_INDEX_LIST returns the list of MSRs that can be passed
|
||||
to the KVM_GET_MSRS system ioctl. This lets userspace probe host capabilities
|
||||
and processor features that are exposed via MSRs (e.g., VMX capabilities).
|
||||
This list also varies by kvm version and host processor, but does not change
|
||||
otherwise.
|
||||
|
||||
|
||||
4.4 KVM_CHECK_EXTENSION
|
||||
|
||||
|
|
@ -475,14 +483,22 @@ Support for this has been removed. Use KVM_SET_GUEST_DEBUG instead.
|
|||
|
||||
4.18 KVM_GET_MSRS
|
||||
|
||||
Capability: basic
|
||||
Capability: basic (vcpu), KVM_CAP_GET_MSR_FEATURES (system)
|
||||
Architectures: x86
|
||||
Type: vcpu ioctl
|
||||
Type: system ioctl, vcpu ioctl
|
||||
Parameters: struct kvm_msrs (in/out)
|
||||
Returns: 0 on success, -1 on error
|
||||
Returns: number of msrs successfully returned;
|
||||
-1 on error
|
||||
|
||||
When used as a system ioctl:
|
||||
Reads the values of MSR-based features that are available for the VM. This
|
||||
is similar to KVM_GET_SUPPORTED_CPUID, but it returns MSR indices and values.
|
||||
The list of msr-based features can be obtained using KVM_GET_MSR_FEATURE_INDEX_LIST
|
||||
in a system ioctl.
|
||||
|
||||
When used as a vcpu ioctl:
|
||||
Reads model-specific registers from the vcpu. Supported msr indices can
|
||||
be obtained using KVM_GET_MSR_INDEX_LIST.
|
||||
be obtained using KVM_GET_MSR_INDEX_LIST in a system ioctl.
|
||||
|
||||
struct kvm_msrs {
|
||||
__u32 nmsrs; /* number of msrs in entries */
|
||||
|
|
|
|||
|
|
@ -58,6 +58,10 @@ KVM_FEATURE_PV_TLB_FLUSH || 9 || guest checks this feature bit
|
|||
|| || before enabling paravirtualized
|
||||
|| || tlb flush.
|
||||
------------------------------------------------------------------------------
|
||||
KVM_FEATURE_ASYNC_PF_VMEXIT || 10 || paravirtualized async PF VM exit
|
||||
|| || can be enabled by setting bit 2
|
||||
|| || when writing to msr 0x4b564d02
|
||||
------------------------------------------------------------------------------
|
||||
KVM_FEATURE_CLOCKSOURCE_STABLE_BIT || 24 || host will warn if no guest-side
|
||||
|| || per-cpu warps are expected in
|
||||
|| || kvmclock.
|
||||
|
|
|
|||
|
|
@ -170,7 +170,8 @@ MSR_KVM_ASYNC_PF_EN: 0x4b564d02
|
|||
when asynchronous page faults are enabled on the vcpu 0 when
|
||||
disabled. Bit 1 is 1 if asynchronous page faults can be injected
|
||||
when vcpu is in cpl == 0. Bit 2 is 1 if asynchronous page faults
|
||||
are delivered to L1 as #PF vmexits.
|
||||
are delivered to L1 as #PF vmexits. Bit 2 can be set only if
|
||||
KVM_FEATURE_ASYNC_PF_VMEXIT is present in CPUID.
|
||||
|
||||
First 4 byte of 64 byte memory location will be written to by
|
||||
the hypervisor at the time of asynchronous page fault (APF)
|
||||
|
|
|
|||
|
|
@ -671,7 +671,7 @@ occupancy of the real time threads on these cores.
|
|||
# mkdir p1
|
||||
|
||||
Move the cpus 4-7 over to p1
|
||||
# echo f0 > p0/cpus
|
||||
# echo f0 > p1/cpus
|
||||
|
||||
View the llc occupancy snapshot
|
||||
|
||||
|
|
|
|||
|
|
@ -108,7 +108,7 @@ The topology of a system is described in the units of:
|
|||
|
||||
The number of online threads is also printed in /proc/cpuinfo "siblings."
|
||||
|
||||
- topology_sibling_mask():
|
||||
- topology_sibling_cpumask():
|
||||
|
||||
The cpumask contains all online threads in the core to which a thread
|
||||
belongs.
|
||||
|
|
|
|||
34
MAINTAINERS
34
MAINTAINERS
|
|
@ -1238,7 +1238,7 @@ F: drivers/clk/at91
|
|||
|
||||
ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT
|
||||
M: Nicolas Ferre <nicolas.ferre@microchip.com>
|
||||
M: Alexandre Belloni <alexandre.belloni@free-electrons.com>
|
||||
M: Alexandre Belloni <alexandre.belloni@bootlin.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
W: http://www.linux4sam.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91.git
|
||||
|
|
@ -1590,7 +1590,7 @@ ARM/Marvell Dove/MV78xx0/Orion SOC support
|
|||
M: Jason Cooper <jason@lakedaemon.net>
|
||||
M: Andrew Lunn <andrew@lunn.ch>
|
||||
M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
|
||||
M: Gregory Clement <gregory.clement@free-electrons.com>
|
||||
M: Gregory Clement <gregory.clement@bootlin.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/soc/dove/
|
||||
|
|
@ -1604,7 +1604,7 @@ F: arch/arm/boot/dts/orion5x*
|
|||
ARM/Marvell Kirkwood and Armada 370, 375, 38x, 39x, XP, 3700, 7K/8K SOC support
|
||||
M: Jason Cooper <jason@lakedaemon.net>
|
||||
M: Andrew Lunn <andrew@lunn.ch>
|
||||
M: Gregory Clement <gregory.clement@free-electrons.com>
|
||||
M: Gregory Clement <gregory.clement@bootlin.com>
|
||||
M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
|
@ -1999,8 +1999,10 @@ M: Maxime Coquelin <mcoquelin.stm32@gmail.com>
|
|||
M: Alexandre Torgue <alexandre.torgue@st.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git stm32-next
|
||||
N: stm32
|
||||
F: arch/arm/boot/dts/stm32*
|
||||
F: arch/arm/mach-stm32/
|
||||
F: drivers/clocksource/armv7m_systick.c
|
||||
|
||||
ARM/TANGO ARCHITECTURE
|
||||
|
|
@ -7600,8 +7602,10 @@ F: mm/kasan/
|
|||
F: scripts/Makefile.kasan
|
||||
|
||||
KCONFIG
|
||||
M: Masahiro Yamada <yamada.masahiro@socionext.com>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild.git kconfig
|
||||
L: linux-kbuild@vger.kernel.org
|
||||
S: Orphan
|
||||
S: Maintained
|
||||
F: Documentation/kbuild/kconfig-language.txt
|
||||
F: scripts/kconfig/
|
||||
|
||||
|
|
@ -7909,7 +7913,6 @@ S: Maintained
|
|||
F: scripts/leaking_addresses.pl
|
||||
|
||||
LED SUBSYSTEM
|
||||
M: Richard Purdie <rpurdie@rpsys.net>
|
||||
M: Jacek Anaszewski <jacek.anaszewski@gmail.com>
|
||||
M: Pavel Machek <pavel@ucw.cz>
|
||||
L: linux-leds@vger.kernel.org
|
||||
|
|
@ -9922,6 +9925,13 @@ F: Documentation/ABI/stable/sysfs-bus-nvmem
|
|||
F: include/linux/nvmem-consumer.h
|
||||
F: include/linux/nvmem-provider.h
|
||||
|
||||
NXP SGTL5000 DRIVER
|
||||
M: Fabio Estevam <fabio.estevam@nxp.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/sound/sgtl5000.txt
|
||||
F: sound/soc/codecs/sgtl5000*
|
||||
|
||||
NXP TDA998X DRM DRIVER
|
||||
M: Russell King <linux@armlinux.org.uk>
|
||||
S: Supported
|
||||
|
|
@ -10927,6 +10937,17 @@ L: linux-gpio@vger.kernel.org
|
|||
S: Supported
|
||||
F: drivers/pinctrl/pinctrl-at91-pio4.*
|
||||
|
||||
PIN CONTROLLER - FREESCALE
|
||||
M: Dong Aisheng <aisheng.dong@nxp.com>
|
||||
M: Fabio Estevam <festevam@gmail.com>
|
||||
M: Shawn Guo <shawnguo@kernel.org>
|
||||
M: Stefan Agner <stefan@agner.ch>
|
||||
R: Pengutronix Kernel Team <kernel@pengutronix.de>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/pinctrl/freescale/
|
||||
F: Documentation/devicetree/bindings/pinctrl/fsl,*
|
||||
|
||||
PIN CONTROLLER - INTEL
|
||||
M: Mika Westerberg <mika.westerberg@linux.intel.com>
|
||||
M: Heikki Krogerus <heikki.krogerus@linux.intel.com>
|
||||
|
|
@ -12093,6 +12114,7 @@ M: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
|||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: sound/soc/samsung/
|
||||
F: Documentation/devicetree/bindings/sound/samsung*
|
||||
|
||||
SAMSUNG EXYNOS PSEUDO RANDOM NUMBER GENERATOR (RNG) DRIVER
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
|
|
|||
19
Makefile
19
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 16
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Fearless Coyote
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
@ -388,7 +388,7 @@ PYTHON = python
|
|||
CHECK = sparse
|
||||
|
||||
CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
|
||||
-Wbitwise -Wno-return-void $(CF)
|
||||
-Wbitwise -Wno-return-void -Wno-unknown-attribute $(CF)
|
||||
NOSTDINC_FLAGS =
|
||||
CFLAGS_MODULE =
|
||||
AFLAGS_MODULE =
|
||||
|
|
@ -489,6 +489,11 @@ KBUILD_CFLAGS += $(CLANG_TARGET) $(CLANG_GCC_TC)
|
|||
KBUILD_AFLAGS += $(CLANG_TARGET) $(CLANG_GCC_TC)
|
||||
endif
|
||||
|
||||
RETPOLINE_CFLAGS_GCC := -mindirect-branch=thunk-extern -mindirect-branch-register
|
||||
RETPOLINE_CFLAGS_CLANG := -mretpoline-external-thunk
|
||||
RETPOLINE_CFLAGS := $(call cc-option,$(RETPOLINE_CFLAGS_GCC),$(call cc-option,$(RETPOLINE_CFLAGS_CLANG)))
|
||||
export RETPOLINE_CFLAGS
|
||||
|
||||
ifeq ($(config-targets),1)
|
||||
# ===========================================================================
|
||||
# *config targets only - make sure prerequisites are updated, and descend
|
||||
|
|
@ -579,10 +584,9 @@ ifeq ($(KBUILD_EXTMOD),)
|
|||
# To avoid any implicit rule to kick in, define an empty command
|
||||
$(KCONFIG_CONFIG) include/config/auto.conf.cmd: ;
|
||||
|
||||
# If .config is newer than include/config/auto.conf, someone tinkered
|
||||
# with it and forgot to run make oldconfig.
|
||||
# if auto.conf.cmd is missing then we are probably in a cleaned tree so
|
||||
# we execute the config step to be sure to catch updated Kconfig files
|
||||
# The actual configuration files used during the build are stored in
|
||||
# include/generated/ and include/config/. Update them if .config is newer than
|
||||
# include/config/auto.conf (which mirrors .config).
|
||||
include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
|
||||
$(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig
|
||||
else
|
||||
|
|
@ -857,8 +861,7 @@ KBUILD_AFLAGS += $(ARCH_AFLAGS) $(KAFLAGS)
|
|||
KBUILD_CFLAGS += $(ARCH_CFLAGS) $(KCFLAGS)
|
||||
|
||||
# Use --build-id when available.
|
||||
LDFLAGS_BUILD_ID := $(patsubst -Wl$(comma)%,%,\
|
||||
$(call cc-ldoption, -Wl$(comma)--build-id,))
|
||||
LDFLAGS_BUILD_ID := $(call ld-option, --build-id)
|
||||
KBUILD_LDFLAGS_MODULE += $(LDFLAGS_BUILD_ID)
|
||||
LDFLAGS_vmlinux += $(LDFLAGS_BUILD_ID)
|
||||
|
||||
|
|
|
|||
|
|
@ -6,7 +6,6 @@
|
|||
* Atomic exchange routines.
|
||||
*/
|
||||
|
||||
#define __ASM__MB
|
||||
#define ____xchg(type, args...) __xchg ## type ## _local(args)
|
||||
#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
|
||||
#include <asm/xchg.h>
|
||||
|
|
@ -33,10 +32,6 @@
|
|||
cmpxchg_local((ptr), (o), (n)); \
|
||||
})
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#undef __ASM__MB
|
||||
#define __ASM__MB "\tmb\n"
|
||||
#endif
|
||||
#undef ____xchg
|
||||
#undef ____cmpxchg
|
||||
#define ____xchg(type, args...) __xchg ##type(args)
|
||||
|
|
@ -64,7 +59,6 @@
|
|||
cmpxchg((ptr), (o), (n)); \
|
||||
})
|
||||
|
||||
#undef __ASM__MB
|
||||
#undef ____cmpxchg
|
||||
|
||||
#endif /* _ALPHA_CMPXCHG_H */
|
||||
|
|
|
|||
|
|
@ -12,6 +12,10 @@
|
|||
* Atomic exchange.
|
||||
* Since it can be used to implement critical sections
|
||||
* it must clobber "memory" (also for interrupts in UP).
|
||||
*
|
||||
* The leading and the trailing memory barriers guarantee that these
|
||||
* operations are fully ordered.
|
||||
*
|
||||
*/
|
||||
|
||||
static inline unsigned long
|
||||
|
|
@ -19,6 +23,7 @@ ____xchg(_u8, volatile char *m, unsigned long val)
|
|||
{
|
||||
unsigned long ret, tmp, addr64;
|
||||
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
" andnot %4,7,%3\n"
|
||||
" insbl %1,%4,%1\n"
|
||||
|
|
@ -28,12 +33,12 @@ ____xchg(_u8, volatile char *m, unsigned long val)
|
|||
" or %1,%2,%2\n"
|
||||
" stq_c %2,0(%3)\n"
|
||||
" beq %2,2f\n"
|
||||
__ASM__MB
|
||||
".subsection 2\n"
|
||||
"2: br 1b\n"
|
||||
".previous"
|
||||
: "=&r" (ret), "=&r" (val), "=&r" (tmp), "=&r" (addr64)
|
||||
: "r" ((long)m), "1" (val) : "memory");
|
||||
smp_mb();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -43,6 +48,7 @@ ____xchg(_u16, volatile short *m, unsigned long val)
|
|||
{
|
||||
unsigned long ret, tmp, addr64;
|
||||
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
" andnot %4,7,%3\n"
|
||||
" inswl %1,%4,%1\n"
|
||||
|
|
@ -52,12 +58,12 @@ ____xchg(_u16, volatile short *m, unsigned long val)
|
|||
" or %1,%2,%2\n"
|
||||
" stq_c %2,0(%3)\n"
|
||||
" beq %2,2f\n"
|
||||
__ASM__MB
|
||||
".subsection 2\n"
|
||||
"2: br 1b\n"
|
||||
".previous"
|
||||
: "=&r" (ret), "=&r" (val), "=&r" (tmp), "=&r" (addr64)
|
||||
: "r" ((long)m), "1" (val) : "memory");
|
||||
smp_mb();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -67,17 +73,18 @@ ____xchg(_u32, volatile int *m, unsigned long val)
|
|||
{
|
||||
unsigned long dummy;
|
||||
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
"1: ldl_l %0,%4\n"
|
||||
" bis $31,%3,%1\n"
|
||||
" stl_c %1,%2\n"
|
||||
" beq %1,2f\n"
|
||||
__ASM__MB
|
||||
".subsection 2\n"
|
||||
"2: br 1b\n"
|
||||
".previous"
|
||||
: "=&r" (val), "=&r" (dummy), "=m" (*m)
|
||||
: "rI" (val), "m" (*m) : "memory");
|
||||
smp_mb();
|
||||
|
||||
return val;
|
||||
}
|
||||
|
|
@ -87,17 +94,18 @@ ____xchg(_u64, volatile long *m, unsigned long val)
|
|||
{
|
||||
unsigned long dummy;
|
||||
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
"1: ldq_l %0,%4\n"
|
||||
" bis $31,%3,%1\n"
|
||||
" stq_c %1,%2\n"
|
||||
" beq %1,2f\n"
|
||||
__ASM__MB
|
||||
".subsection 2\n"
|
||||
"2: br 1b\n"
|
||||
".previous"
|
||||
: "=&r" (val), "=&r" (dummy), "=m" (*m)
|
||||
: "rI" (val), "m" (*m) : "memory");
|
||||
smp_mb();
|
||||
|
||||
return val;
|
||||
}
|
||||
|
|
@ -128,10 +136,12 @@ ____xchg(, volatile void *ptr, unsigned long x, int size)
|
|||
* store NEW in MEM. Return the initial value in MEM. Success is
|
||||
* indicated by comparing RETURN with OLD.
|
||||
*
|
||||
* The memory barrier should be placed in SMP only when we actually
|
||||
* make the change. If we don't change anything (so if the returned
|
||||
* prev is equal to old) then we aren't acquiring anything new and
|
||||
* we don't need any memory barrier as far I can tell.
|
||||
* The leading and the trailing memory barriers guarantee that these
|
||||
* operations are fully ordered.
|
||||
*
|
||||
* The trailing memory barrier is placed in SMP unconditionally, in
|
||||
* order to guarantee that dependency ordering is preserved when a
|
||||
* dependency is headed by an unsuccessful operation.
|
||||
*/
|
||||
|
||||
static inline unsigned long
|
||||
|
|
@ -139,6 +149,7 @@ ____cmpxchg(_u8, volatile char *m, unsigned char old, unsigned char new)
|
|||
{
|
||||
unsigned long prev, tmp, cmp, addr64;
|
||||
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
" andnot %5,7,%4\n"
|
||||
" insbl %1,%5,%1\n"
|
||||
|
|
@ -150,13 +161,13 @@ ____cmpxchg(_u8, volatile char *m, unsigned char old, unsigned char new)
|
|||
" or %1,%2,%2\n"
|
||||
" stq_c %2,0(%4)\n"
|
||||
" beq %2,3f\n"
|
||||
__ASM__MB
|
||||
"2:\n"
|
||||
".subsection 2\n"
|
||||
"3: br 1b\n"
|
||||
".previous"
|
||||
: "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64)
|
||||
: "r" ((long)m), "Ir" (old), "1" (new) : "memory");
|
||||
smp_mb();
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
|
@ -166,6 +177,7 @@ ____cmpxchg(_u16, volatile short *m, unsigned short old, unsigned short new)
|
|||
{
|
||||
unsigned long prev, tmp, cmp, addr64;
|
||||
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
" andnot %5,7,%4\n"
|
||||
" inswl %1,%5,%1\n"
|
||||
|
|
@ -177,13 +189,13 @@ ____cmpxchg(_u16, volatile short *m, unsigned short old, unsigned short new)
|
|||
" or %1,%2,%2\n"
|
||||
" stq_c %2,0(%4)\n"
|
||||
" beq %2,3f\n"
|
||||
__ASM__MB
|
||||
"2:\n"
|
||||
".subsection 2\n"
|
||||
"3: br 1b\n"
|
||||
".previous"
|
||||
: "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64)
|
||||
: "r" ((long)m), "Ir" (old), "1" (new) : "memory");
|
||||
smp_mb();
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
|
@ -193,6 +205,7 @@ ____cmpxchg(_u32, volatile int *m, int old, int new)
|
|||
{
|
||||
unsigned long prev, cmp;
|
||||
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
"1: ldl_l %0,%5\n"
|
||||
" cmpeq %0,%3,%1\n"
|
||||
|
|
@ -200,13 +213,13 @@ ____cmpxchg(_u32, volatile int *m, int old, int new)
|
|||
" mov %4,%1\n"
|
||||
" stl_c %1,%2\n"
|
||||
" beq %1,3f\n"
|
||||
__ASM__MB
|
||||
"2:\n"
|
||||
".subsection 2\n"
|
||||
"3: br 1b\n"
|
||||
".previous"
|
||||
: "=&r"(prev), "=&r"(cmp), "=m"(*m)
|
||||
: "r"((long) old), "r"(new), "m"(*m) : "memory");
|
||||
smp_mb();
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
|
@ -216,6 +229,7 @@ ____cmpxchg(_u64, volatile long *m, unsigned long old, unsigned long new)
|
|||
{
|
||||
unsigned long prev, cmp;
|
||||
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
"1: ldq_l %0,%5\n"
|
||||
" cmpeq %0,%3,%1\n"
|
||||
|
|
@ -223,13 +237,13 @@ ____cmpxchg(_u64, volatile long *m, unsigned long old, unsigned long new)
|
|||
" mov %4,%1\n"
|
||||
" stq_c %1,%2\n"
|
||||
" beq %1,3f\n"
|
||||
__ASM__MB
|
||||
"2:\n"
|
||||
".subsection 2\n"
|
||||
"3: br 1b\n"
|
||||
".previous"
|
||||
: "=&r"(prev), "=&r"(cmp), "=m"(*m)
|
||||
: "r"((long) old), "r"(new), "m"(*m) : "memory");
|
||||
smp_mb();
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -484,7 +484,6 @@ config ARC_CURR_IN_REG
|
|||
|
||||
config ARC_EMUL_UNALIGNED
|
||||
bool "Emulate unaligned memory access (userspace only)"
|
||||
default N
|
||||
select SYSCTL_ARCH_UNALIGN_NO_WARN
|
||||
select SYSCTL_ARCH_UNALIGN_ALLOW
|
||||
depends on ISA_ARCOMPACT
|
||||
|
|
|
|||
|
|
@ -17,6 +17,6 @@
|
|||
compatible = "snps,axs101", "snps,arc-sdp";
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0 video=1280x720@60";
|
||||
bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0 video=1280x720@60 print-fatal-signals=1";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -214,13 +214,13 @@
|
|||
};
|
||||
|
||||
eeprom@0x54{
|
||||
compatible = "24c01";
|
||||
compatible = "atmel,24c01";
|
||||
reg = <0x54>;
|
||||
pagesize = <0x8>;
|
||||
};
|
||||
|
||||
eeprom@0x57{
|
||||
compatible = "24c04";
|
||||
compatible = "atmel,24c04";
|
||||
reg = <0x57>;
|
||||
pagesize = <0x8>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@
|
|||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug";
|
||||
bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
|
||||
};
|
||||
|
||||
aliases {
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
interrupt-parent = <&core_intc>;
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8";
|
||||
bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1";
|
||||
};
|
||||
|
||||
aliases {
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8";
|
||||
bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1";
|
||||
};
|
||||
|
||||
aliases {
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@
|
|||
interrupt-parent = <&core_intc>;
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8";
|
||||
bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1";
|
||||
};
|
||||
|
||||
aliases {
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
/* this is for console on PGU */
|
||||
/* bootargs = "console=tty0 consoleblank=0"; */
|
||||
/* this is for console on serial */
|
||||
bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24";
|
||||
bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24 print-fatal-signals=1";
|
||||
};
|
||||
|
||||
aliases {
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
/* this is for console on PGU */
|
||||
/* bootargs = "console=tty0 consoleblank=0"; */
|
||||
/* this is for console on serial */
|
||||
bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24";
|
||||
bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24 print-fatal-signals=1";
|
||||
};
|
||||
|
||||
aliases {
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@
|
|||
|
||||
chosen {
|
||||
/* this is for console on serial */
|
||||
bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblan=0 debug video=640x480-24";
|
||||
bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblan=0 debug video=640x480-24 print-fatal-signals=1";
|
||||
};
|
||||
|
||||
aliases {
|
||||
|
|
|
|||
|
|
@ -23,7 +23,8 @@ void die(const char *str, struct pt_regs *regs, unsigned long address);
|
|||
|
||||
#define BUG() do { \
|
||||
pr_warn("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
|
||||
dump_stack(); \
|
||||
barrier_before_unreachable(); \
|
||||
__builtin_trap(); \
|
||||
} while (0)
|
||||
|
||||
#define HAVE_ARCH_BUG
|
||||
|
|
|
|||
|
|
@ -184,7 +184,7 @@
|
|||
.macro FAKE_RET_FROM_EXCPN
|
||||
lr r9, [status32]
|
||||
bic r9, r9, (STATUS_U_MASK|STATUS_DE_MASK|STATUS_AE_MASK)
|
||||
or r9, r9, (STATUS_L_MASK|STATUS_IE_MASK)
|
||||
or r9, r9, STATUS_IE_MASK
|
||||
kflag r9
|
||||
.endm
|
||||
|
||||
|
|
|
|||
|
|
@ -22,10 +22,79 @@ static DEFINE_RAW_SPINLOCK(mcip_lock);
|
|||
|
||||
static char smp_cpuinfo_buf[128];
|
||||
|
||||
/*
|
||||
* Set mask to halt GFRC if any online core in SMP cluster is halted.
|
||||
* Only works for ARC HS v3.0+, on earlier versions has no effect.
|
||||
*/
|
||||
static void mcip_update_gfrc_halt_mask(int cpu)
|
||||
{
|
||||
struct bcr_generic gfrc;
|
||||
unsigned long flags;
|
||||
u32 gfrc_halt_mask;
|
||||
|
||||
READ_BCR(ARC_REG_GFRC_BUILD, gfrc);
|
||||
|
||||
/*
|
||||
* CMD_GFRC_SET_CORE and CMD_GFRC_READ_CORE commands were added in
|
||||
* GFRC 0x3 version.
|
||||
*/
|
||||
if (gfrc.ver < 0x3)
|
||||
return;
|
||||
|
||||
raw_spin_lock_irqsave(&mcip_lock, flags);
|
||||
|
||||
__mcip_cmd(CMD_GFRC_READ_CORE, 0);
|
||||
gfrc_halt_mask = read_aux_reg(ARC_REG_MCIP_READBACK);
|
||||
gfrc_halt_mask |= BIT(cpu);
|
||||
__mcip_cmd_data(CMD_GFRC_SET_CORE, 0, gfrc_halt_mask);
|
||||
|
||||
raw_spin_unlock_irqrestore(&mcip_lock, flags);
|
||||
}
|
||||
|
||||
static void mcip_update_debug_halt_mask(int cpu)
|
||||
{
|
||||
u32 mcip_mask = 0;
|
||||
unsigned long flags;
|
||||
|
||||
raw_spin_lock_irqsave(&mcip_lock, flags);
|
||||
|
||||
/*
|
||||
* mcip_mask is same for CMD_DEBUG_SET_SELECT and CMD_DEBUG_SET_MASK
|
||||
* commands. So read it once instead of reading both CMD_DEBUG_READ_MASK
|
||||
* and CMD_DEBUG_READ_SELECT.
|
||||
*/
|
||||
__mcip_cmd(CMD_DEBUG_READ_SELECT, 0);
|
||||
mcip_mask = read_aux_reg(ARC_REG_MCIP_READBACK);
|
||||
|
||||
mcip_mask |= BIT(cpu);
|
||||
|
||||
__mcip_cmd_data(CMD_DEBUG_SET_SELECT, 0, mcip_mask);
|
||||
/*
|
||||
* Parameter specified halt cause:
|
||||
* STATUS32[H]/actionpoint/breakpoint/self-halt
|
||||
* We choose all of them (0xF).
|
||||
*/
|
||||
__mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xF, mcip_mask);
|
||||
|
||||
raw_spin_unlock_irqrestore(&mcip_lock, flags);
|
||||
}
|
||||
|
||||
static void mcip_setup_per_cpu(int cpu)
|
||||
{
|
||||
struct mcip_bcr mp;
|
||||
|
||||
READ_BCR(ARC_REG_MCIP_BCR, mp);
|
||||
|
||||
smp_ipi_irq_setup(cpu, IPI_IRQ);
|
||||
smp_ipi_irq_setup(cpu, SOFTIRQ_IRQ);
|
||||
|
||||
/* Update GFRC halt mask as new CPU came online */
|
||||
if (mp.gfrc)
|
||||
mcip_update_gfrc_halt_mask(cpu);
|
||||
|
||||
/* Update MCIP debug mask as new CPU came online */
|
||||
if (mp.dbg)
|
||||
mcip_update_debug_halt_mask(cpu);
|
||||
}
|
||||
|
||||
static void mcip_ipi_send(int cpu)
|
||||
|
|
@ -101,11 +170,6 @@ static void mcip_probe_n_setup(void)
|
|||
IS_AVAIL1(mp.gfrc, "GFRC"));
|
||||
|
||||
cpuinfo_arc700[0].extn.gfrc = mp.gfrc;
|
||||
|
||||
if (mp.dbg) {
|
||||
__mcip_cmd_data(CMD_DEBUG_SET_SELECT, 0, 0xf);
|
||||
__mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf);
|
||||
}
|
||||
}
|
||||
|
||||
struct plat_smp_ops plat_smp_ops = {
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@ static const struct id_to_str arc_cpu_rel[] = {
|
|||
{ 0x51, "R2.0" },
|
||||
{ 0x52, "R2.1" },
|
||||
{ 0x53, "R3.0" },
|
||||
{ 0x54, "R4.0" },
|
||||
{ 0x54, "R3.10a" },
|
||||
#endif
|
||||
{ 0x00, NULL }
|
||||
};
|
||||
|
|
@ -373,7 +373,7 @@ static void arc_chk_core_config(void)
|
|||
{
|
||||
struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
|
||||
int saved = 0, present = 0;
|
||||
char *opt_nm = NULL;;
|
||||
char *opt_nm = NULL;
|
||||
|
||||
if (!cpu->extn.timer0)
|
||||
panic("Timer0 is not present!\n");
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@
|
|||
#include <linux/reboot.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/of_fdt.h>
|
||||
|
||||
#include <asm/processor.h>
|
||||
#include <asm/setup.h>
|
||||
|
|
@ -47,6 +48,42 @@ void __init smp_prepare_boot_cpu(void)
|
|||
{
|
||||
}
|
||||
|
||||
static int __init arc_get_cpu_map(const char *name, struct cpumask *cpumask)
|
||||
{
|
||||
unsigned long dt_root = of_get_flat_dt_root();
|
||||
const char *buf;
|
||||
|
||||
buf = of_get_flat_dt_prop(dt_root, name, NULL);
|
||||
if (!buf)
|
||||
return -EINVAL;
|
||||
|
||||
if (cpulist_parse(buf, cpumask))
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Read from DeviceTree and setup cpu possible mask. If there is no
|
||||
* "possible-cpus" property in DeviceTree pretend all [0..NR_CPUS-1] exist.
|
||||
*/
|
||||
static void __init arc_init_cpu_possible(void)
|
||||
{
|
||||
struct cpumask cpumask;
|
||||
|
||||
if (arc_get_cpu_map("possible-cpus", &cpumask)) {
|
||||
pr_warn("Failed to get possible-cpus from dtb, pretending all %u cpus exist\n",
|
||||
NR_CPUS);
|
||||
|
||||
cpumask_setall(&cpumask);
|
||||
}
|
||||
|
||||
if (!cpumask_test_cpu(0, &cpumask))
|
||||
panic("Master cpu (cpu[0]) is missed in cpu possible mask!");
|
||||
|
||||
init_cpu_possible(&cpumask);
|
||||
}
|
||||
|
||||
/*
|
||||
* Called from setup_arch() before calling setup_processor()
|
||||
*
|
||||
|
|
@ -58,10 +95,7 @@ void __init smp_prepare_boot_cpu(void)
|
|||
*/
|
||||
void __init smp_init_cpus(void)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < NR_CPUS; i++)
|
||||
set_cpu_possible(i, true);
|
||||
arc_init_cpu_possible();
|
||||
|
||||
if (plat_smp_ops.init_early_smp)
|
||||
plat_smp_ops.init_early_smp();
|
||||
|
|
@ -70,16 +104,12 @@ void __init smp_init_cpus(void)
|
|||
/* called from init ( ) => process 1 */
|
||||
void __init smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
int i;
|
||||
|
||||
/*
|
||||
* if platform didn't set the present map already, do it now
|
||||
* boot cpu is set to present already by init/main.c
|
||||
*/
|
||||
if (num_present_cpus() <= 1) {
|
||||
for (i = 0; i < max_cpus; i++)
|
||||
set_cpu_present(i, true);
|
||||
}
|
||||
if (num_present_cpus() <= 1)
|
||||
init_cpu_present(cpu_possible_mask);
|
||||
}
|
||||
|
||||
void __init smp_cpus_done(unsigned int max_cpus)
|
||||
|
|
|
|||
|
|
@ -366,7 +366,7 @@ static void init_unwind_hdr(struct unwind_table *table,
|
|||
return;
|
||||
|
||||
ret_err:
|
||||
panic("Attention !!! Dwarf FDE parsing errors\n");;
|
||||
panic("Attention !!! Dwarf FDE parsing errors\n");
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MODULES
|
||||
|
|
|
|||
|
|
@ -780,7 +780,10 @@ noinline static void slc_entire_op(const int op)
|
|||
|
||||
write_aux_reg(r, ctrl);
|
||||
|
||||
write_aux_reg(ARC_REG_SLC_INVALIDATE, 1);
|
||||
if (op & OP_INV) /* Inv or flush-n-inv use same cmd reg */
|
||||
write_aux_reg(ARC_REG_SLC_INVALIDATE, 0x1);
|
||||
else
|
||||
write_aux_reg(ARC_REG_SLC_FLUSH, 0x1);
|
||||
|
||||
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
|
||||
read_aux_reg(r);
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@
|
|||
<0x3ff00100 0x100>;
|
||||
};
|
||||
|
||||
smc@0x3404c000 {
|
||||
smc@3404c000 {
|
||||
compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
|
||||
reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@
|
|||
<0x3ff00100 0x100>;
|
||||
};
|
||||
|
||||
smc@0x3404e000 {
|
||||
smc@3404e000 {
|
||||
compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
|
||||
reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -18,10 +18,10 @@
|
|||
soc {
|
||||
ranges = <0x7e000000 0x20000000 0x02000000>;
|
||||
dma-ranges = <0x40000000 0x00000000 0x20000000>;
|
||||
};
|
||||
|
||||
arm-pmu {
|
||||
compatible = "arm,arm1176-pmu";
|
||||
};
|
||||
arm-pmu {
|
||||
compatible = "arm,arm1176-pmu";
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -9,19 +9,19 @@
|
|||
<0x40000000 0x40000000 0x00001000>;
|
||||
dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
|
||||
|
||||
local_intc: local_intc {
|
||||
local_intc: local_intc@40000000 {
|
||||
compatible = "brcm,bcm2836-l1-intc";
|
||||
reg = <0x40000000 0x100>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&local_intc>;
|
||||
};
|
||||
};
|
||||
|
||||
arm-pmu {
|
||||
compatible = "arm,cortex-a7-pmu";
|
||||
interrupt-parent = <&local_intc>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
arm-pmu {
|
||||
compatible = "arm,cortex-a7-pmu";
|
||||
interrupt-parent = <&local_intc>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
timer {
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
<0x40000000 0x40000000 0x00001000>;
|
||||
dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
|
||||
|
||||
local_intc: local_intc {
|
||||
local_intc: local_intc@40000000 {
|
||||
compatible = "brcm,bcm2836-l1-intc";
|
||||
reg = <0x40000000 0x100>;
|
||||
interrupt-controller;
|
||||
|
|
|
|||
|
|
@ -465,7 +465,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
aux: aux@0x7e215000 {
|
||||
aux: aux@7e215000 {
|
||||
compatible = "brcm,bcm2835-aux";
|
||||
#clock-cells = <1>;
|
||||
reg = <0x7e215000 0x8>;
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@
|
|||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x60000000 0x80000000>;
|
||||
reg = <0x60000000 0x20000000>;
|
||||
};
|
||||
|
||||
gpio-restart {
|
||||
|
|
|
|||
|
|
@ -269,7 +269,7 @@
|
|||
|
||||
sata: sata@46000000 {
|
||||
/* The ROM uses this muxmode */
|
||||
cortina,gemini-ata-muxmode = <3>;
|
||||
cortina,gemini-ata-muxmode = <0>;
|
||||
cortina,gemini-enable-sata-bridge;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@
|
|||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6dl.dtsi"
|
||||
#include "imx6qdl-icore-rqs.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
|
|||
|
|
@ -71,6 +71,8 @@
|
|||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
clock-frequency = <2600000>;
|
||||
|
||||
twl: twl@48 {
|
||||
|
|
@ -189,7 +191,12 @@
|
|||
>;
|
||||
};
|
||||
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_wkup {
|
||||
|
|
|
|||
|
|
@ -66,6 +66,8 @@
|
|||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
clock-frequency = <2600000>;
|
||||
|
||||
twl: twl@48 {
|
||||
|
|
@ -136,6 +138,12 @@
|
|||
OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
|
||||
>;
|
||||
};
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
|
|
|
|||
|
|
@ -47,7 +47,7 @@
|
|||
gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; /* gpio3_83 */
|
||||
wakeup-source;
|
||||
autorepeat;
|
||||
debounce_interval = <50>;
|
||||
debounce-interval = <50>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -280,7 +280,7 @@
|
|||
max-frequency = <37500000>;
|
||||
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
|
||||
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
|
||||
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
resets = <&cru SRST_SDIO>;
|
||||
|
|
@ -298,7 +298,7 @@
|
|||
max-frequency = <37500000>;
|
||||
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
|
||||
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
|
||||
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
default-sample-phase = <158>;
|
||||
disable-wp;
|
||||
dmas = <&pdma 12>;
|
||||
|
|
|
|||
|
|
@ -621,7 +621,7 @@
|
|||
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
|
||||
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
|
||||
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
|
||||
|
|
@ -634,7 +634,7 @@
|
|||
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
|
||||
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
|
||||
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
|
||||
|
|
@ -649,7 +649,7 @@
|
|||
max-frequency = <37500000>;
|
||||
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
|
||||
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
|
||||
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
bus-width = <8>;
|
||||
default-sample-phase = <158>;
|
||||
fifo-depth = <0x100>;
|
||||
|
|
|
|||
|
|
@ -110,26 +110,6 @@
|
|||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu0-supply = <&vdd_cpu>;
|
||||
operating-points = <
|
||||
/* KHz uV */
|
||||
1800000 1400000
|
||||
1608000 1350000
|
||||
1512000 1300000
|
||||
1416000 1200000
|
||||
1200000 1100000
|
||||
1008000 1050000
|
||||
816000 1000000
|
||||
696000 950000
|
||||
600000 900000
|
||||
408000 900000
|
||||
312000 900000
|
||||
216000 900000
|
||||
126000 900000
|
||||
>;
|
||||
};
|
||||
|
||||
&emmc {
|
||||
status = "okay";
|
||||
bus-width = <8>;
|
||||
|
|
|
|||
|
|
@ -56,7 +56,7 @@
|
|||
clocks = <&topclk ZX296702_A9_PERIPHCLK>;
|
||||
};
|
||||
|
||||
l2cc: l2-cache-controller@0x00c00000 {
|
||||
l2cc: l2-cache-controller@c00000 {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0x00c00000 0x1000>;
|
||||
cache-unified;
|
||||
|
|
@ -67,30 +67,30 @@
|
|||
arm,double-linefill-incr = <0>;
|
||||
};
|
||||
|
||||
pcu: pcu@0xa0008000 {
|
||||
pcu: pcu@a0008000 {
|
||||
compatible = "zte,zx296702-pcu";
|
||||
reg = <0xa0008000 0x1000>;
|
||||
};
|
||||
|
||||
topclk: topclk@0x09800000 {
|
||||
topclk: topclk@9800000 {
|
||||
compatible = "zte,zx296702-topcrm-clk";
|
||||
reg = <0x09800000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
lsp1clk: lsp1clk@0x09400000 {
|
||||
lsp1clk: lsp1clk@9400000 {
|
||||
compatible = "zte,zx296702-lsp1crpm-clk";
|
||||
reg = <0x09400000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
lsp0clk: lsp0clk@0x0b000000 {
|
||||
lsp0clk: lsp0clk@b000000 {
|
||||
compatible = "zte,zx296702-lsp0crpm-clk";
|
||||
reg = <0x0b000000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
uart0: serial@0x09405000 {
|
||||
uart0: serial@9405000 {
|
||||
compatible = "zte,zx296702-uart";
|
||||
reg = <0x09405000 0x1000>;
|
||||
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -98,7 +98,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@0x09406000 {
|
||||
uart1: serial@9406000 {
|
||||
compatible = "zte,zx296702-uart";
|
||||
reg = <0x09406000 0x1000>;
|
||||
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -106,7 +106,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@0x09408000 {
|
||||
mmc0: mmc@9408000 {
|
||||
compatible = "snps,dw-mshc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -119,7 +119,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@0x0b003000 {
|
||||
mmc1: mmc@b003000 {
|
||||
compatible = "snps,dw-mshc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -132,7 +132,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
sysctrl: sysctrl@0xa0007000 {
|
||||
sysctrl: sysctrl@a0007000 {
|
||||
compatible = "zte,sysctrl", "syscon";
|
||||
reg = <0xa0007000 0x1000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -319,7 +319,7 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
|
|||
CONFIG_RC_CORE=m
|
||||
CONFIG_MEDIA_CONTROLLER=y
|
||||
CONFIG_VIDEO_V4L2_SUBDEV_API=y
|
||||
CONFIG_LIRC=m
|
||||
CONFIG_LIRC=y
|
||||
CONFIG_RC_DEVICES=y
|
||||
CONFIG_IR_RX51=m
|
||||
CONFIG_V4L_PLATFORM_DRIVERS=y
|
||||
|
|
|
|||
|
|
@ -83,7 +83,7 @@ static void dummy_clock_access(struct timespec64 *ts)
|
|||
}
|
||||
|
||||
static clock_access_fn __read_persistent_clock = dummy_clock_access;
|
||||
static clock_access_fn __read_boot_clock = dummy_clock_access;;
|
||||
static clock_access_fn __read_boot_clock = dummy_clock_access;
|
||||
|
||||
void read_persistent_clock64(struct timespec64 *ts)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -7,6 +7,8 @@ ccflags-y += -fno-stack-protector -DDISABLE_BRANCH_PROFILING
|
|||
|
||||
KVM=../../../../virt/kvm
|
||||
|
||||
CFLAGS_ARMV7VE :=$(call cc-option, -march=armv7ve)
|
||||
|
||||
obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/vgic-v2-sr.o
|
||||
obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/vgic-v3-sr.o
|
||||
obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/timer-sr.o
|
||||
|
|
@ -15,7 +17,10 @@ obj-$(CONFIG_KVM_ARM_HOST) += tlb.o
|
|||
obj-$(CONFIG_KVM_ARM_HOST) += cp15-sr.o
|
||||
obj-$(CONFIG_KVM_ARM_HOST) += vfp.o
|
||||
obj-$(CONFIG_KVM_ARM_HOST) += banked-sr.o
|
||||
CFLAGS_banked-sr.o += $(CFLAGS_ARMV7VE)
|
||||
|
||||
obj-$(CONFIG_KVM_ARM_HOST) += entry.o
|
||||
obj-$(CONFIG_KVM_ARM_HOST) += hyp-entry.o
|
||||
obj-$(CONFIG_KVM_ARM_HOST) += switch.o
|
||||
CFLAGS_switch.o += $(CFLAGS_ARMV7VE)
|
||||
obj-$(CONFIG_KVM_ARM_HOST) += s2-setup.o
|
||||
|
|
|
|||
|
|
@ -20,6 +20,10 @@
|
|||
|
||||
#include <asm/kvm_hyp.h>
|
||||
|
||||
/*
|
||||
* gcc before 4.9 doesn't understand -march=armv7ve, so we have to
|
||||
* trick the assembler.
|
||||
*/
|
||||
__asm__(".arch_extension virt");
|
||||
|
||||
void __hyp_text __banked_save_state(struct kvm_cpu_context *ctxt)
|
||||
|
|
|
|||
|
|
@ -69,7 +69,7 @@ static void clps711x_restart(enum reboot_mode mode, const char *cmd)
|
|||
soft_restart(0);
|
||||
}
|
||||
|
||||
static const char *clps711x_compat[] __initconst = {
|
||||
static const char *const clps711x_compat[] __initconst = {
|
||||
"cirrus,ep7209",
|
||||
NULL
|
||||
};
|
||||
|
|
|
|||
|
|
@ -368,7 +368,7 @@ static struct spi_eeprom at25640a = {
|
|||
.flags = EE_ADDR2,
|
||||
};
|
||||
|
||||
static struct spi_board_info dm355_evm_spi_info[] __initconst = {
|
||||
static const struct spi_board_info dm355_evm_spi_info[] __initconst = {
|
||||
{
|
||||
.modalias = "at25",
|
||||
.platform_data = &at25640a,
|
||||
|
|
|
|||
|
|
@ -217,7 +217,7 @@ static struct spi_eeprom at25640a = {
|
|||
.flags = EE_ADDR2,
|
||||
};
|
||||
|
||||
static struct spi_board_info dm355_leopard_spi_info[] __initconst = {
|
||||
static const struct spi_board_info dm355_leopard_spi_info[] __initconst = {
|
||||
{
|
||||
.modalias = "at25",
|
||||
.platform_data = &at25640a,
|
||||
|
|
|
|||
|
|
@ -726,7 +726,7 @@ static struct spi_eeprom at25640 = {
|
|||
.flags = EE_ADDR2,
|
||||
};
|
||||
|
||||
static struct spi_board_info dm365_evm_spi_info[] __initconst = {
|
||||
static const struct spi_board_info dm365_evm_spi_info[] __initconst = {
|
||||
{
|
||||
.modalias = "at25",
|
||||
.platform_data = &at25640,
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ config MACH_ARMADA_375
|
|||
depends on ARCH_MULTI_V7
|
||||
select ARMADA_370_XP_IRQ
|
||||
select ARM_ERRATA_720789
|
||||
select ARM_ERRATA_753970
|
||||
select PL310_ERRATA_753970
|
||||
select ARM_GIC
|
||||
select ARMADA_375_CLK
|
||||
select HAVE_ARM_SCU
|
||||
|
|
@ -57,7 +57,7 @@ config MACH_ARMADA_38X
|
|||
bool "Marvell Armada 380/385 boards"
|
||||
depends on ARCH_MULTI_V7
|
||||
select ARM_ERRATA_720789
|
||||
select ARM_ERRATA_753970
|
||||
select PL310_ERRATA_753970
|
||||
select ARM_GIC
|
||||
select ARM_GLOBAL_TIMER
|
||||
select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
|
||||
|
|
|
|||
|
|
@ -1011,17 +1011,17 @@ static int clk_debugfs_register_one(struct clk *c)
|
|||
return -ENOMEM;
|
||||
c->dent = d;
|
||||
|
||||
d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
|
||||
d = debugfs_create_u8("usecount", S_IRUGO, c->dent, &c->usecount);
|
||||
if (!d) {
|
||||
err = -ENOMEM;
|
||||
goto err_out;
|
||||
}
|
||||
d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
|
||||
d = debugfs_create_ulong("rate", S_IRUGO, c->dent, &c->rate);
|
||||
if (!d) {
|
||||
err = -ENOMEM;
|
||||
goto err_out;
|
||||
}
|
||||
d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
|
||||
d = debugfs_create_x8("flags", S_IRUGO, c->dent, &c->flags);
|
||||
if (!d) {
|
||||
err = -ENOMEM;
|
||||
goto err_out;
|
||||
|
|
|
|||
|
|
@ -299,8 +299,6 @@ static void irq_save_context(void)
|
|||
if (soc_is_dra7xx())
|
||||
return;
|
||||
|
||||
if (!sar_base)
|
||||
sar_base = omap4_get_sar_ram_base();
|
||||
if (wakeupgen_ops && wakeupgen_ops->save_context)
|
||||
wakeupgen_ops->save_context();
|
||||
}
|
||||
|
|
@ -598,6 +596,8 @@ static int __init wakeupgen_init(struct device_node *node,
|
|||
irq_hotplug_init();
|
||||
irq_pm_init();
|
||||
|
||||
sar_base = omap4_get_sar_ram_base();
|
||||
|
||||
return 0;
|
||||
}
|
||||
IRQCHIP_DECLARE(ti_wakeupgen, "ti,omap4-wugen-mpu", wakeupgen_init);
|
||||
|
|
|
|||
|
|
@ -977,6 +977,9 @@ static int _enable_clocks(struct omap_hwmod *oh)
|
|||
|
||||
pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
|
||||
|
||||
if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
|
||||
_enable_optional_clocks(oh);
|
||||
|
||||
if (oh->_clk)
|
||||
clk_enable(oh->_clk);
|
||||
|
||||
|
|
@ -985,9 +988,6 @@ static int _enable_clocks(struct omap_hwmod *oh)
|
|||
clk_enable(os->_clk);
|
||||
}
|
||||
|
||||
if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
|
||||
_enable_optional_clocks(oh);
|
||||
|
||||
/* The opt clocks are controlled by the device driver. */
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -186,7 +186,7 @@ static void omap_pm_end(void)
|
|||
cpu_idle_poll_ctrl(false);
|
||||
}
|
||||
|
||||
static void omap_pm_finish(void)
|
||||
static void omap_pm_wake(void)
|
||||
{
|
||||
if (soc_is_omap34xx())
|
||||
omap_prcm_irq_complete();
|
||||
|
|
@ -196,7 +196,7 @@ static const struct platform_suspend_ops omap_pm_ops = {
|
|||
.begin = omap_pm_begin,
|
||||
.end = omap_pm_end,
|
||||
.enter = omap_pm_enter,
|
||||
.finish = omap_pm_finish,
|
||||
.wake = omap_pm_wake,
|
||||
.valid = suspend_valid_only_mem,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -156,12 +156,6 @@ static struct clock_event_device clockevent_gpt = {
|
|||
.tick_resume = omap2_gp_timer_shutdown,
|
||||
};
|
||||
|
||||
static struct property device_disabled = {
|
||||
.name = "status",
|
||||
.length = sizeof("disabled"),
|
||||
.value = "disabled",
|
||||
};
|
||||
|
||||
static const struct of_device_id omap_timer_match[] __initconst = {
|
||||
{ .compatible = "ti,omap2420-timer", },
|
||||
{ .compatible = "ti,omap3430-timer", },
|
||||
|
|
@ -203,8 +197,17 @@ static struct device_node * __init omap_get_timer_dt(const struct of_device_id *
|
|||
of_get_property(np, "ti,timer-secure", NULL)))
|
||||
continue;
|
||||
|
||||
if (!of_device_is_compatible(np, "ti,omap-counter32k"))
|
||||
of_add_property(np, &device_disabled);
|
||||
if (!of_device_is_compatible(np, "ti,omap-counter32k")) {
|
||||
struct property *prop;
|
||||
|
||||
prop = kzalloc(sizeof(*prop), GFP_KERNEL);
|
||||
if (!prop)
|
||||
return NULL;
|
||||
prop->name = "status";
|
||||
prop->value = "disabled";
|
||||
prop->length = strlen(prop->value);
|
||||
of_add_property(np, prop);
|
||||
}
|
||||
return np;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -58,7 +58,6 @@ config MACH_KUROBOX_PRO
|
|||
|
||||
config MACH_DNS323
|
||||
bool "D-Link DNS-323"
|
||||
select GENERIC_NET_UTILS
|
||||
select I2C_BOARDINFO if I2C
|
||||
help
|
||||
Say 'Y' here if you want your kernel to support the
|
||||
|
|
@ -66,7 +65,6 @@ config MACH_DNS323
|
|||
|
||||
config MACH_TS209
|
||||
bool "QNAP TS-109/TS-209"
|
||||
select GENERIC_NET_UTILS
|
||||
help
|
||||
Say 'Y' here if you want your kernel to support the
|
||||
QNAP TS-109/TS-209 platform.
|
||||
|
|
@ -101,7 +99,6 @@ config MACH_LINKSTATION_LS_HGL
|
|||
|
||||
config MACH_TS409
|
||||
bool "QNAP TS-409"
|
||||
select GENERIC_NET_UTILS
|
||||
help
|
||||
Say 'Y' here if you want your kernel to support the
|
||||
QNAP TS-409 platform.
|
||||
|
|
|
|||
|
|
@ -173,10 +173,42 @@ static struct mv643xx_eth_platform_data dns323_eth_data = {
|
|||
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
|
||||
};
|
||||
|
||||
/* dns323_parse_hex_*() taken from tsx09-common.c; should a common copy of these
|
||||
* functions be kept somewhere?
|
||||
*/
|
||||
static int __init dns323_parse_hex_nibble(char n)
|
||||
{
|
||||
if (n >= '0' && n <= '9')
|
||||
return n - '0';
|
||||
|
||||
if (n >= 'A' && n <= 'F')
|
||||
return n - 'A' + 10;
|
||||
|
||||
if (n >= 'a' && n <= 'f')
|
||||
return n - 'a' + 10;
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int __init dns323_parse_hex_byte(const char *b)
|
||||
{
|
||||
int hi;
|
||||
int lo;
|
||||
|
||||
hi = dns323_parse_hex_nibble(b[0]);
|
||||
lo = dns323_parse_hex_nibble(b[1]);
|
||||
|
||||
if (hi < 0 || lo < 0)
|
||||
return -1;
|
||||
|
||||
return (hi << 4) | lo;
|
||||
}
|
||||
|
||||
static int __init dns323_read_mac_addr(void)
|
||||
{
|
||||
u_int8_t addr[6];
|
||||
void __iomem *mac_page;
|
||||
int i;
|
||||
char *mac_page;
|
||||
|
||||
/* MAC address is stored as a regular ol' string in /dev/mtdblock4
|
||||
* (0x007d0000-0x00800000) starting at offset 196480 (0x2ff80).
|
||||
|
|
@ -185,8 +217,23 @@ static int __init dns323_read_mac_addr(void)
|
|||
if (!mac_page)
|
||||
return -ENOMEM;
|
||||
|
||||
if (!mac_pton((__force const char *) mac_page, addr))
|
||||
goto error_fail;
|
||||
/* Sanity check the string we're looking at */
|
||||
for (i = 0; i < 5; i++) {
|
||||
if (*(mac_page + (i * 3) + 2) != ':') {
|
||||
goto error_fail;
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < 6; i++) {
|
||||
int byte;
|
||||
|
||||
byte = dns323_parse_hex_byte(mac_page + (i * 3));
|
||||
if (byte < 0) {
|
||||
goto error_fail;
|
||||
}
|
||||
|
||||
addr[i] = byte;
|
||||
}
|
||||
|
||||
iounmap(mac_page);
|
||||
printk("DNS-323: Found ethernet MAC address: %pM\n", addr);
|
||||
|
|
|
|||
|
|
@ -53,12 +53,53 @@ struct mv643xx_eth_platform_data qnap_tsx09_eth_data = {
|
|||
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
|
||||
};
|
||||
|
||||
static int __init qnap_tsx09_parse_hex_nibble(char n)
|
||||
{
|
||||
if (n >= '0' && n <= '9')
|
||||
return n - '0';
|
||||
|
||||
if (n >= 'A' && n <= 'F')
|
||||
return n - 'A' + 10;
|
||||
|
||||
if (n >= 'a' && n <= 'f')
|
||||
return n - 'a' + 10;
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int __init qnap_tsx09_parse_hex_byte(const char *b)
|
||||
{
|
||||
int hi;
|
||||
int lo;
|
||||
|
||||
hi = qnap_tsx09_parse_hex_nibble(b[0]);
|
||||
lo = qnap_tsx09_parse_hex_nibble(b[1]);
|
||||
|
||||
if (hi < 0 || lo < 0)
|
||||
return -1;
|
||||
|
||||
return (hi << 4) | lo;
|
||||
}
|
||||
|
||||
static int __init qnap_tsx09_check_mac_addr(const char *addr_str)
|
||||
{
|
||||
u_int8_t addr[6];
|
||||
int i;
|
||||
|
||||
if (!mac_pton(addr_str, addr))
|
||||
return -1;
|
||||
for (i = 0; i < 6; i++) {
|
||||
int byte;
|
||||
|
||||
/*
|
||||
* Enforce "xx:xx:xx:xx:xx:xx\n" format.
|
||||
*/
|
||||
if (addr_str[(i * 3) + 2] != ((i < 5) ? ':' : '\n'))
|
||||
return -1;
|
||||
|
||||
byte = qnap_tsx09_parse_hex_byte(addr_str + (i * 3));
|
||||
if (byte < 0)
|
||||
return -1;
|
||||
addr[i] = byte;
|
||||
}
|
||||
|
||||
printk(KERN_INFO "tsx09: found ethernet mac address %pM\n", addr);
|
||||
|
||||
|
|
@ -77,12 +118,12 @@ void __init qnap_tsx09_find_mac_addr(u32 mem_base, u32 size)
|
|||
unsigned long addr;
|
||||
|
||||
for (addr = mem_base; addr < (mem_base + size); addr += 1024) {
|
||||
void __iomem *nor_page;
|
||||
char *nor_page;
|
||||
int ret = 0;
|
||||
|
||||
nor_page = ioremap(addr, 1024);
|
||||
if (nor_page != NULL) {
|
||||
ret = qnap_tsx09_check_mac_addr((__force const char *)nor_page);
|
||||
ret = qnap_tsx09_check_mac_addr(nor_page);
|
||||
iounmap(nor_page);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -23,7 +23,6 @@
|
|||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/perf/arm_pmu.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
||||
#include <asm/outercache.h>
|
||||
|
|
@ -112,37 +111,6 @@ static void ux500_restart(enum reboot_mode mode, const char *cmd)
|
|||
prcmu_system_reset(0);
|
||||
}
|
||||
|
||||
/*
|
||||
* The PMU IRQ lines of two cores are wired together into a single interrupt.
|
||||
* Bounce the interrupt to the other core if it's not ours.
|
||||
*/
|
||||
static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
|
||||
{
|
||||
irqreturn_t ret = handler(irq, dev);
|
||||
int other = !smp_processor_id();
|
||||
|
||||
if (ret == IRQ_NONE && cpu_online(other))
|
||||
irq_set_affinity(irq, cpumask_of(other));
|
||||
|
||||
/*
|
||||
* We should be able to get away with the amount of IRQ_NONEs we give,
|
||||
* while still having the spurious IRQ detection code kick in if the
|
||||
* interrupt really starts hitting spuriously.
|
||||
*/
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct arm_pmu_platdata db8500_pmu_platdata = {
|
||||
.handle_irq = db8500_pmu_handler,
|
||||
.irq_flags = IRQF_NOBALANCING | IRQF_NO_THREAD,
|
||||
};
|
||||
|
||||
static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
|
||||
/* Requires call-back bindings. */
|
||||
OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
|
||||
{},
|
||||
};
|
||||
|
||||
static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
|
||||
OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
|
||||
{},
|
||||
|
|
@ -165,9 +133,6 @@ static void __init u8500_init_machine(void)
|
|||
if (of_machine_is_compatible("st-ericsson,u8540"))
|
||||
of_platform_populate(NULL, u8500_local_bus_nodes,
|
||||
u8540_auxdata_lookup, NULL);
|
||||
else
|
||||
of_platform_populate(NULL, u8500_local_bus_nodes,
|
||||
u8500_auxdata_lookup, NULL);
|
||||
}
|
||||
|
||||
static const char * stericsson_dt_platform_compat[] = {
|
||||
|
|
|
|||
|
|
@ -472,28 +472,27 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
|
|||
/*****************************************************************************
|
||||
* Ethernet switch
|
||||
****************************************************************************/
|
||||
static __initconst const char *orion_ge00_mvmdio_bus_name = "orion-mii";
|
||||
static __initdata struct mdio_board_info
|
||||
orion_ge00_switch_board_info;
|
||||
static __initdata struct mdio_board_info orion_ge00_switch_board_info = {
|
||||
.bus_id = "orion-mii",
|
||||
.modalias = "mv88e6085",
|
||||
};
|
||||
|
||||
void __init orion_ge00_switch_init(struct dsa_chip_data *d)
|
||||
{
|
||||
struct mdio_board_info *bd;
|
||||
unsigned int i;
|
||||
|
||||
if (!IS_BUILTIN(CONFIG_PHYLIB))
|
||||
return;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(d->port_names); i++)
|
||||
if (!strcmp(d->port_names[i], "cpu"))
|
||||
for (i = 0; i < ARRAY_SIZE(d->port_names); i++) {
|
||||
if (!strcmp(d->port_names[i], "cpu")) {
|
||||
d->netdev[i] = &orion_ge00.dev;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
bd = &orion_ge00_switch_board_info;
|
||||
bd->bus_id = orion_ge00_mvmdio_bus_name;
|
||||
bd->mdio_addr = d->sw_addr;
|
||||
d->netdev[i] = &orion_ge00.dev;
|
||||
strcpy(bd->modalias, "mv88e6085");
|
||||
bd->platform_data = d;
|
||||
orion_ge00_switch_board_info.mdio_addr = d->sw_addr;
|
||||
orion_ge00_switch_board_info.platform_data = d;
|
||||
|
||||
mdiobus_register_board_info(&orion_ge00_switch_board_info, 1);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -165,14 +165,14 @@
|
|||
|
||||
uart_A: serial@24000 {
|
||||
compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
|
||||
reg = <0x0 0x24000 0x0 0x14>;
|
||||
reg = <0x0 0x24000 0x0 0x18>;
|
||||
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart_B: serial@23000 {
|
||||
compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
|
||||
reg = <0x0 0x23000 0x0 0x14>;
|
||||
reg = <0x0 0x23000 0x0 0x18>;
|
||||
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -235,14 +235,14 @@
|
|||
|
||||
uart_A: serial@84c0 {
|
||||
compatible = "amlogic,meson-gx-uart";
|
||||
reg = <0x0 0x84c0 0x0 0x14>;
|
||||
reg = <0x0 0x84c0 0x0 0x18>;
|
||||
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart_B: serial@84dc {
|
||||
compatible = "amlogic,meson-gx-uart";
|
||||
reg = <0x0 0x84dc 0x0 0x14>;
|
||||
reg = <0x0 0x84dc 0x0 0x18>;
|
||||
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -287,7 +287,7 @@
|
|||
|
||||
uart_C: serial@8700 {
|
||||
compatible = "amlogic,meson-gx-uart";
|
||||
reg = <0x0 0x8700 0x0 0x14>;
|
||||
reg = <0x0 0x8700 0x0 0x18>;
|
||||
interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -404,14 +404,14 @@
|
|||
|
||||
uart_AO: serial@4c0 {
|
||||
compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
|
||||
reg = <0x0 0x004c0 0x0 0x14>;
|
||||
reg = <0x0 0x004c0 0x0 0x18>;
|
||||
interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart_AO_B: serial@4e0 {
|
||||
compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
|
||||
reg = <0x0 0x004e0 0x0 0x14>;
|
||||
reg = <0x0 0x004e0 0x0 0x18>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -631,6 +631,7 @@
|
|||
|
||||
internal_phy: ethernet-phy@8 {
|
||||
compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22";
|
||||
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <8>;
|
||||
max-speed = <100>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -98,7 +98,7 @@
|
|||
clock-output-names = "clk125mhz";
|
||||
};
|
||||
|
||||
pci {
|
||||
pcie@30000000 {
|
||||
compatible = "pci-host-ecam-generic";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
|
|
@ -118,6 +118,7 @@
|
|||
ranges =
|
||||
<0x02000000 0 0x40000000 0 0x40000000 0 0x20000000
|
||||
0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
|
||||
bus-range = <0 0xff>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map =
|
||||
/* addr pin ic icaddr icintr */
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@
|
|||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
ramoops@0x21f00000 {
|
||||
ramoops@21f00000 {
|
||||
compatible = "ramoops";
|
||||
reg = <0x0 0x21f00000 0x0 0x00100000>;
|
||||
record-size = <0x00020000>;
|
||||
|
|
|
|||
|
|
@ -341,7 +341,7 @@
|
|||
reg = <0 0x10005000 0 0x1000>;
|
||||
};
|
||||
|
||||
pio: pinctrl@0x10005000 {
|
||||
pio: pinctrl@10005000 {
|
||||
compatible = "mediatek,mt8173-pinctrl";
|
||||
reg = <0 0x1000b000 0 0x1000>;
|
||||
mediatek,pctl-regmap = <&syscfg_pctl_a>;
|
||||
|
|
|
|||
|
|
@ -140,16 +140,16 @@
|
|||
};
|
||||
|
||||
agnoc@0 {
|
||||
qcom,pcie@00600000 {
|
||||
qcom,pcie@600000 {
|
||||
perst-gpio = <&msmgpio 35 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
qcom,pcie@00608000 {
|
||||
qcom,pcie@608000 {
|
||||
status = "okay";
|
||||
perst-gpio = <&msmgpio 130 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
qcom,pcie@00610000 {
|
||||
qcom,pcie@610000 {
|
||||
status = "okay";
|
||||
perst-gpio = <&msmgpio 114 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -840,7 +840,7 @@
|
|||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
pcie0: qcom,pcie@00600000 {
|
||||
pcie0: qcom,pcie@600000 {
|
||||
compatible = "qcom,pcie-msm8996", "snps,dw-pcie";
|
||||
status = "disabled";
|
||||
power-domains = <&gcc PCIE0_GDSC>;
|
||||
|
|
@ -893,7 +893,7 @@
|
|||
|
||||
};
|
||||
|
||||
pcie1: qcom,pcie@00608000 {
|
||||
pcie1: qcom,pcie@608000 {
|
||||
compatible = "qcom,pcie-msm8996", "snps,dw-pcie";
|
||||
power-domains = <&gcc PCIE1_GDSC>;
|
||||
bus-range = <0x00 0xff>;
|
||||
|
|
@ -946,7 +946,7 @@
|
|||
"bus_slave";
|
||||
};
|
||||
|
||||
pcie2: qcom,pcie@00610000 {
|
||||
pcie2: qcom,pcie@610000 {
|
||||
compatible = "qcom,pcie-msm8996", "snps,dw-pcie";
|
||||
power-domains = <&gcc PCIE2_GDSC>;
|
||||
bus-range = <0x00 0xff>;
|
||||
|
|
|
|||
|
|
@ -132,17 +132,16 @@
|
|||
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
|
||||
assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
|
||||
clock_in_out = "input";
|
||||
/* shows instability at 1GBit right now */
|
||||
max-speed = <100>;
|
||||
phy-supply = <&vcc_io>;
|
||||
phy-mode = "rgmii";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmiim1_pins>;
|
||||
snps,force_thresh_dma_mode;
|
||||
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
snps,reset-delays-us = <0 10000 50000>;
|
||||
tx_delay = <0x26>;
|
||||
rx_delay = <0x11>;
|
||||
tx_delay = <0x24>;
|
||||
rx_delay = <0x18>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -730,7 +730,7 @@
|
|||
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
|
||||
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
|
||||
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -741,7 +741,7 @@
|
|||
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
|
||||
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
|
||||
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -752,7 +752,7 @@
|
|||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
|
||||
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
|
||||
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -257,7 +257,7 @@
|
|||
max-frequency = <150000000>;
|
||||
clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
|
||||
<&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
|
||||
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
|
||||
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
|
||||
fifo-depth = <0x100>;
|
||||
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
resets = <&cru SRST_SDIO0>;
|
||||
|
|
|
|||
|
|
@ -457,7 +457,7 @@
|
|||
assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
|
||||
assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
|
||||
assigned-clock-rates = <100000000>;
|
||||
ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
|
||||
ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
num-lanes = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_clkreqn_cpm>;
|
||||
|
|
|
|||
|
|
@ -1739,8 +1739,8 @@
|
|||
compatible = "rockchip,rk3399-edp";
|
||||
reg = <0x0 0xff970000 0x0 0x8000>;
|
||||
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
|
||||
clock-names = "dp", "pclk";
|
||||
clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>, <&cru PCLK_VIO_GRF>;
|
||||
clock-names = "dp", "pclk", "grf";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&edp_hpd>;
|
||||
power-domains = <&power RK3399_PD_EDP>;
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
|
||||
#define MPIDR_UP_BITMASK (0x1 << 30)
|
||||
#define MPIDR_MT_BITMASK (0x1 << 24)
|
||||
#define MPIDR_HWID_BITMASK 0xff00ffffffUL
|
||||
#define MPIDR_HWID_BITMASK UL(0xff00ffffff)
|
||||
|
||||
#define MPIDR_LEVEL_BITS_SHIFT 3
|
||||
#define MPIDR_LEVEL_BITS (1 << MPIDR_LEVEL_BITS_SHIFT)
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@ struct stackframe {
|
|||
unsigned long fp;
|
||||
unsigned long pc;
|
||||
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
||||
unsigned int graph;
|
||||
int graph;
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -72,15 +72,15 @@ static inline void set_fs(mm_segment_t fs)
|
|||
* This is equivalent to the following test:
|
||||
* (u65)addr + (u65)size <= (u65)current->addr_limit + 1
|
||||
*/
|
||||
static inline unsigned long __range_ok(unsigned long addr, unsigned long size)
|
||||
static inline unsigned long __range_ok(const void __user *addr, unsigned long size)
|
||||
{
|
||||
unsigned long limit = current_thread_info()->addr_limit;
|
||||
unsigned long ret, limit = current_thread_info()->addr_limit;
|
||||
|
||||
__chk_user_ptr(addr);
|
||||
asm volatile(
|
||||
// A + B <= C + 1 for all A,B,C, in four easy steps:
|
||||
// 1: X = A + B; X' = X % 2^64
|
||||
" adds %0, %0, %2\n"
|
||||
" adds %0, %3, %2\n"
|
||||
// 2: Set C = 0 if X > 2^64, to guarantee X' > C in step 4
|
||||
" csel %1, xzr, %1, hi\n"
|
||||
// 3: Set X' = ~0 if X >= 2^64. For X == 2^64, this decrements X'
|
||||
|
|
@ -92,9 +92,9 @@ static inline unsigned long __range_ok(unsigned long addr, unsigned long size)
|
|||
// testing X' - C == 0, subject to the previous adjustments.
|
||||
" sbcs xzr, %0, %1\n"
|
||||
" cset %0, ls\n"
|
||||
: "+r" (addr), "+r" (limit) : "Ir" (size) : "cc");
|
||||
: "=&r" (ret), "+r" (limit) : "Ir" (size), "0" (addr) : "cc");
|
||||
|
||||
return addr;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -104,7 +104,7 @@ static inline unsigned long __range_ok(unsigned long addr, unsigned long size)
|
|||
*/
|
||||
#define untagged_addr(addr) sign_extend64(addr, 55)
|
||||
|
||||
#define access_ok(type, addr, size) __range_ok((unsigned long)(addr), size)
|
||||
#define access_ok(type, addr, size) __range_ok(addr, size)
|
||||
#define user_addr_max get_fs
|
||||
|
||||
#define _ASM_EXTABLE(from, to) \
|
||||
|
|
|
|||
|
|
@ -370,6 +370,7 @@ static unsigned int __kprobes aarch32_check_condition(u32 opcode, u32 psr)
|
|||
static int swp_handler(struct pt_regs *regs, u32 instr)
|
||||
{
|
||||
u32 destreg, data, type, address = 0;
|
||||
const void __user *user_ptr;
|
||||
int rn, rt2, res = 0;
|
||||
|
||||
perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->pc);
|
||||
|
|
@ -401,7 +402,8 @@ static int swp_handler(struct pt_regs *regs, u32 instr)
|
|||
aarch32_insn_extract_reg_num(instr, A32_RT2_OFFSET), data);
|
||||
|
||||
/* Check access in reasonable access range for both SWP and SWPB */
|
||||
if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) {
|
||||
user_ptr = (const void __user *)(unsigned long)(address & ~3);
|
||||
if (!access_ok(VERIFY_WRITE, user_ptr, 4)) {
|
||||
pr_debug("SWP{B} emulation: access to 0x%08x not allowed!\n",
|
||||
address);
|
||||
goto fault;
|
||||
|
|
|
|||
|
|
@ -178,7 +178,7 @@ static int enable_smccc_arch_workaround_1(void *data)
|
|||
case PSCI_CONDUIT_HVC:
|
||||
arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
|
||||
ARM_SMCCC_ARCH_WORKAROUND_1, &res);
|
||||
if (res.a0)
|
||||
if ((int)res.a0 < 0)
|
||||
return 0;
|
||||
cb = call_hvc_arch_workaround_1;
|
||||
smccc_start = __smccc_workaround_1_hvc_start;
|
||||
|
|
@ -188,7 +188,7 @@ static int enable_smccc_arch_workaround_1(void *data)
|
|||
case PSCI_CONDUIT_SMC:
|
||||
arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
|
||||
ARM_SMCCC_ARCH_WORKAROUND_1, &res);
|
||||
if (res.a0)
|
||||
if ((int)res.a0 < 0)
|
||||
return 0;
|
||||
cb = call_smc_arch_workaround_1;
|
||||
smccc_start = __smccc_workaround_1_smc_start;
|
||||
|
|
|
|||
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