On OMAP2+ devices, standardize and clean up WFI entry and WFI blocking.
Basic test logs are available here: http://www.pwsan.com/omap/testlogs/wfi_devel_a_3.9/20130208085027/ -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJRFTM3AAoJEMePsQ0LvSpLyJ8P/ipCXyynb1wmYf5Qm0O8jrgS a+jS3RD/o+N9RmnerkhfKh4PELolHF5iYvRSX/Iygu4oPWJFlugVw8MQS5R7mqO5 4LSh8oazYjym20txURp3rp3W8sAq2lX+fBjDVqmHKOmckG6LyBMwd2EEmaS0owa3 5mv6Gb8ySyhVFkKnabIHHFaxVBy8rI5Ay4I+bBNInZI4QJh71guJu27Cb1Sg2ng/ TmMqTllWyb4dnbx3u1jw7MCE7e6VMHFU59d8q7aj0wr1yJXzUrZ8wDYYycmHW2ye yq3E6MNnKzXyrHYoLCvkJl8mrx0bZIohYycA3WNl3BMSTlllx3gBWuD/+z6nWnkq JIG8jRp6DysgEXjHuQXHT5lawSg2ByjKkk0kPOLCXdRFnns9Q75nNFTqR/6SCdON hM+sKFgbz5jz+H1gtXoaaRGNeoMcsVKTxFQ4vlisgWwFxTWnmRZX0+WzKM/3oO/K 3KIimEh+aEmHQna4cy3HCtcMJy5IovqupTLea/JWUG0kvcfweTeDzr4YKVttuqFD 8+6A+ZeKTNkJG3R1IQ4NlAmOIKGTHSaz0px1eoFZo+kMVB9h8LYgxQ44ulSBNki/ VZcBFaSz67EtgINSnLDBBAP2q79QbsOLSz784rofWQdU6h/e2lK7lmDCawAzlz7C nhPTm0BRVfzeC1D4Gds8 =jJVz -----END PGP SIGNATURE----- Merge tag 'omap-devel-b-for-3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.9/pm-wfi-take2 On OMAP2+ devices, standardize and clean up WFI entry and WFI blocking. Basic test logs are available here: http://www.pwsan.com/omap/testlogs/wfi_devel_a_3.9/20130208085027/ Conflicts: arch/arm/mach-omap2/pm24xx.c
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Коммит
58a656b77a
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@ -3493,7 +3493,12 @@ static struct omap_hwmod am35xx_emac_hwmod = {
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.name = "davinci_emac",
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.name = "davinci_emac",
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.mpu_irqs = am35xx_emac_mpu_irqs,
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.mpu_irqs = am35xx_emac_mpu_irqs,
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.class = &am35xx_emac_class,
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.class = &am35xx_emac_class,
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.flags = HWMOD_NO_IDLEST,
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/*
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* According to Mark Greer, the MPU will not return from WFI
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* when the EMAC signals an interrupt.
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* http://www.spinics.net/lists/arm-kernel/msg174734.html
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*/
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.flags = (HWMOD_NO_IDLEST | HWMOD_BLOCK_WFI),
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};
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};
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/* l3_core -> davinci emac interface */
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/* l3_core -> davinci emac interface */
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@ -54,7 +54,6 @@
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#include "powerdomain.h"
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#include "powerdomain.h"
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#include "clockdomain.h"
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#include "clockdomain.h"
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static void (*omap2_sram_idle)(void);
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static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
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static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
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void __iomem *sdrc_power);
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void __iomem *sdrc_power);
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@ -163,6 +162,8 @@ static int omap2_allow_mpu_retention(void)
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static void omap2_enter_mpu_retention(void)
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static void omap2_enter_mpu_retention(void)
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{
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{
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const int zero = 0;
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/* The peripherals seem not to be able to wake up the MPU when
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/* The peripherals seem not to be able to wake up the MPU when
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* it is in retention mode. */
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* it is in retention mode. */
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if (omap2_allow_mpu_retention()) {
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if (omap2_allow_mpu_retention()) {
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@ -179,7 +180,8 @@ static void omap2_enter_mpu_retention(void)
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pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
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pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
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}
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}
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omap2_sram_idle();
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/* WFI */
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asm("mcr p15, 0, %0, c7, c0, 4" : : "r" (zero) : "memory", "cc");
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pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
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pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
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}
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}
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@ -333,11 +335,9 @@ int __init omap2_pm_init(void)
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/*
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/*
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* We copy the assembler sleep/wakeup routines to SRAM.
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* We copy the assembler sleep/wakeup routines to SRAM.
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* These routines need to be in SRAM as that's the only
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* These routines need to be in SRAM as that's the only
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* memory the MPU can see when it wakes up.
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* memory the MPU can see when it wakes up after the entire
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* chip enters idle.
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*/
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*/
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omap2_sram_idle = omap_sram_push(omap24xx_idle_loop_suspend,
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omap24xx_idle_loop_suspend_sz);
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omap2_sram_suspend = omap_sram_push(omap24xx_cpu_suspend,
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omap2_sram_suspend = omap_sram_push(omap24xx_cpu_suspend,
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omap24xx_cpu_suspend_sz);
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omap24xx_cpu_suspend_sz);
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@ -36,25 +36,6 @@
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.text
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.text
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/*
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* Forces OMAP into idle state
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*
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* omap24xx_idle_loop_suspend() - This bit of code just executes the WFI
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* for normal idles.
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*
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* Note: This code get's copied to internal SRAM at boot. When the OMAP
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* wakes up it continues execution at the point it went to sleep.
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*/
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.align 3
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ENTRY(omap24xx_idle_loop_suspend)
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stmfd sp!, {r0, lr} @ save registers on stack
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mov r0, #0 @ clear for mcr setup
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mcr p15, 0, r0, c7, c0, 4 @ wait for interrupt
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ldmfd sp!, {r0, pc} @ restore regs and return
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ENTRY(omap24xx_idle_loop_suspend_sz)
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.word . - omap24xx_idle_loop_suspend
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/*
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/*
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* omap24xx_cpu_suspend() - Forces OMAP into deep sleep state by completing
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* omap24xx_cpu_suspend() - Forces OMAP into deep sleep state by completing
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* SDRC shutdown then ARM shutdown. Upon wake MPU is back on so just restore
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* SDRC shutdown then ARM shutdown. Upon wake MPU is back on so just restore
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