irqchip/gic: Assign irqchip dynamically
Instead of having the irqchip being a static struct, make it part of the per-instance data so we can assign it a dynamic name. This has the usable side effect of displaying the GIC with an instance number as GIC0, GIC1 ... GICn in /proc/interrupts, which is helpful when debugging cascaded GICs, such as on the ARM PB11MPCore. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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8673c1d7e8
Коммит
58b8964990
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@ -69,6 +69,7 @@ union gic_base {
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};
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struct gic_chip_data {
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struct irq_chip chip;
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union gic_base dist_base;
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union gic_base cpu_base;
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#ifdef CONFIG_CPU_PM
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@ -383,7 +384,6 @@ static void gic_handle_cascade_irq(struct irq_desc *desc)
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}
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static struct irq_chip gic_chip = {
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.name = "GIC",
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.irq_mask = gic_mask_irq,
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.irq_unmask = gic_unmask_irq,
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.irq_eoi = gic_eoi_irq,
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@ -925,20 +925,15 @@ void __init gic_init_physaddr(struct device_node *node)
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static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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struct irq_chip *chip = &gic_chip;
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if (static_key_true(&supports_deactivate)) {
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if (d->host_data == (void *)&gic_data[0])
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chip = &gic_eoimode1_chip;
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}
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struct gic_chip_data *gic = d->host_data;
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if (hw < 32) {
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irq_set_percpu_devid(irq);
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irq_domain_set_info(d, irq, hw, chip, d->host_data,
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irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,
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handle_percpu_devid_irq, NULL, NULL);
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irq_set_status_flags(irq, IRQ_NOAUTOEN);
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} else {
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irq_domain_set_info(d, irq, hw, chip, d->host_data,
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irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,
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handle_fasteoi_irq, NULL, NULL);
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irq_set_probe(irq);
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}
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@ -1045,6 +1040,15 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
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gic_check_cpu_features();
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gic = &gic_data[gic_nr];
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/* Initialize irq_chip */
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if (static_key_true(&supports_deactivate) && gic_nr == 0) {
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gic->chip = gic_eoimode1_chip;
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} else {
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gic->chip = gic_chip;
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gic->chip.name = kasprintf(GFP_KERNEL, "GIC-%d", gic_nr);
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}
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#ifdef CONFIG_GIC_NON_BANKED
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if (percpu_offset) { /* Frankein-GIC without banked registers... */
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unsigned int cpu;
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