PCI: histb: Add an optional regulator for PCIe port power control
The power supplies to PCIe port are often controlled by GPIO on some board designs. Let's add an optional regulator which can be backed by GPIO to control the power. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Rob Herring <robh@kernel.org>
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@ -34,6 +34,7 @@ Required properties
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Optional properties:
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- reset-gpios: The gpio to generate PCIe PERST# assert and deassert signal.
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- vpcie-supply: The regulator in charge of PCIe port power.
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- phys: List of phandle and phy mode specifier, should be 0.
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- phy-names: Must be "phy".
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@ -61,6 +61,7 @@ struct histb_pcie {
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struct reset_control *bus_reset;
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void __iomem *ctrl;
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int reset_gpio;
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struct regulator *vpcie;
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};
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static u32 histb_pcie_readl(struct histb_pcie *histb_pcie, u32 reg)
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@ -227,6 +228,9 @@ static void histb_pcie_host_disable(struct histb_pcie *hipcie)
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if (gpio_is_valid(hipcie->reset_gpio))
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gpio_set_value_cansleep(hipcie->reset_gpio, 0);
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if (hipcie->vpcie)
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regulator_disable(hipcie->vpcie);
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}
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static int histb_pcie_host_enable(struct pcie_port *pp)
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@ -237,6 +241,14 @@ static int histb_pcie_host_enable(struct pcie_port *pp)
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int ret;
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/* power on PCIe device if have */
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if (hipcie->vpcie) {
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ret = regulator_enable(hipcie->vpcie);
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if (ret) {
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dev_err(dev, "failed to enable regulator: %d\n", ret);
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return ret;
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}
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}
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if (gpio_is_valid(hipcie->reset_gpio))
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gpio_set_value_cansleep(hipcie->reset_gpio, 1);
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@ -282,6 +294,8 @@ err_pipe_clk:
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err_sys_clk:
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clk_disable_unprepare(hipcie->bus_clk);
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err_bus_clk:
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if (hipcie->vpcie)
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regulator_disable(hipcie->vpcie);
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return ret;
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}
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@ -331,6 +345,13 @@ static int histb_pcie_probe(struct platform_device *pdev)
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return PTR_ERR(pci->dbi_base);
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}
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hipcie->vpcie = devm_regulator_get_optional(dev, "vpcie");
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if (IS_ERR(hipcie->vpcie)) {
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if (PTR_ERR(hipcie->vpcie) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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hipcie->vpcie = NULL;
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}
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hipcie->reset_gpio = of_get_named_gpio_flags(np,
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"reset-gpios", 0, &of_flags);
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if (of_flags & OF_GPIO_ACTIVE_LOW)
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