drm/amdgpu/vcn: support multiple-instance dpg pause mode
Add multiple-instance dpg pause mode support for VCN2.5 Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1291bd70a2
Коммит
597e6ac3a7
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@ -298,7 +298,7 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work)
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else
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new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
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adev->vcn.pause_dpg_mode(adev, &new_state);
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adev->vcn.pause_dpg_mode(adev, j, &new_state);
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}
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fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_dec);
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@ -341,7 +341,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
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if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC)
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new_state.fw_based = VCN_DPG_STATE__PAUSE;
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adev->vcn.pause_dpg_mode(adev, &new_state);
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adev->vcn.pause_dpg_mode(adev, ring->me, &new_state);
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}
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}
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@ -199,7 +199,7 @@ struct amdgpu_vcn {
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unsigned harvest_config;
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int (*pause_dpg_mode)(struct amdgpu_device *adev,
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struct dpg_pause_state *new_state);
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int inst_idx, struct dpg_pause_state *new_state);
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};
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int amdgpu_vcn_sw_init(struct amdgpu_device *adev);
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@ -50,7 +50,7 @@ static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev);
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static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev);
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static int vcn_v1_0_set_powergating_state(void *handle, enum amd_powergating_state state);
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static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev,
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struct dpg_pause_state *new_state);
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int inst_idx, struct dpg_pause_state *new_state);
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static void vcn_v1_0_idle_work_handler(struct work_struct *work);
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@ -1199,7 +1199,7 @@ static int vcn_v1_0_stop(struct amdgpu_device *adev)
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}
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static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev,
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struct dpg_pause_state *new_state)
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int inst_idx, struct dpg_pause_state *new_state)
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{
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int ret_code;
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uint32_t reg_data = 0;
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@ -1786,7 +1786,7 @@ static void vcn_v1_0_idle_work_handler(struct work_struct *work)
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else
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new_state.jpeg = VCN_DPG_STATE__UNPAUSE;
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adev->vcn.pause_dpg_mode(adev, &new_state);
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adev->vcn.pause_dpg_mode(adev, 0, &new_state);
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}
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fences += amdgpu_fence_count_emitted(&adev->jpeg.inst->ring_dec);
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@ -1840,7 +1840,7 @@ void vcn_v1_0_ring_begin_use(struct amdgpu_ring *ring)
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else if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG)
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new_state.jpeg = VCN_DPG_STATE__PAUSE;
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adev->vcn.pause_dpg_mode(adev, &new_state);
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adev->vcn.pause_dpg_mode(adev, 0, &new_state);
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}
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}
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@ -58,7 +58,7 @@ static void vcn_v2_0_set_irq_funcs(struct amdgpu_device *adev);
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static int vcn_v2_0_set_powergating_state(void *handle,
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enum amd_powergating_state state);
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static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev,
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struct dpg_pause_state *new_state);
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int inst_idx, struct dpg_pause_state *new_state);
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/**
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* vcn_v2_0_early_init - set function pointers
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@ -1135,7 +1135,7 @@ power_off:
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}
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static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev,
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struct dpg_pause_state *new_state)
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int inst_idx, struct dpg_pause_state *new_state)
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{
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struct amdgpu_ring *ring;
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uint32_t reg_data = 0;
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