AArch64 page permission bug fix. Without this fix, the CPU speculatively
accesses the interrupt controller memory causing random IRQ acknowledge. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) iQIcBAABAgAGBQJQpmOeAAoJEGvWsS0AyF7xciUP/3Z9mQ7KYzD4zwg04HKjZTjL UmtZctjhtGCDh06gTMM31ZnzlEWZLAstnLtZn07SJmrNfEUbivWbWPsea2vHJV4h T6x2TZoRjHgjTKM1gOSGCbXq3Ryz4+4j30PCGybfRSUImwBGSGfG6UfEtRNFOd3E UjPca+ePCLMB1/Y7KHU+XICWKFVajwy3VtqmRkX+xvrfzgUCFElSNPazCPKch0Ql bIWG0rYBL7Na0Z/uhPElCE0OgZrg/JDnTJbKGFbO9V3SMos5is0ipQq3u11eTtiV kXvS0RKbBWLf23QSkOjI/ja5fwn/C9uTxb8GWVPEf4jLPC/agvv01v+noaTFOh79 jx/MuWaeGYNXQrwyTqD47pNjDDIpJBT6iaSDJWBysfcoSZHcy1BRBG/J+HkiWRAP v8nBgHg4AEDwrCJzyFsh5J2mNUDBnZ4AyUzcM/VbaBFIC788dgbm4Fy+jsilj72B 6jkfm5oLVDNZa4Xz97od8PqlBZPq7tfSh8diUCJ9z8Ses3i94fFzE09YRrLV4JbQ GRZPt0e92O1hF3DaD+u18XrrzPVAjPNuaUT+yQ1a3Ov780mnijx02BNfinVAw3uU Ia4R+u8Pbu69kiGQxHQMqvh0/2/N/HfShrRdP5WrkfPq6+do+tflCjD7oqDnnuK3 jyji0z0PFm13kNeqXSDA =Ak+r -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 Pull arm64 bugfix from Catalin Marinas: "Arm64 page permission bug fix. Without this fix, the CPU speculatively accesses the interrupt controller memory causing random IRQ acknowledge." * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: arm64: Distinguish between user and kernel XN bits
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Коммит
5a0c02ba1a
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@ -222,7 +222,7 @@ extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot
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extern void __iounmap(volatile void __iomem *addr);
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#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY)
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#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
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#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
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#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))
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#define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
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@ -38,7 +38,8 @@
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#define PMD_SECT_S (_AT(pmdval_t, 3) << 8)
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#define PMD_SECT_AF (_AT(pmdval_t, 1) << 10)
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#define PMD_SECT_NG (_AT(pmdval_t, 1) << 11)
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#define PMD_SECT_XN (_AT(pmdval_t, 1) << 54)
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#define PMD_SECT_PXN (_AT(pmdval_t, 1) << 53)
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#define PMD_SECT_UXN (_AT(pmdval_t, 1) << 54)
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/*
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* AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
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@ -57,7 +58,8 @@
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#define PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */
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#define PTE_AF (_AT(pteval_t, 1) << 10) /* Access Flag */
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#define PTE_NG (_AT(pteval_t, 1) << 11) /* nG */
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#define PTE_XN (_AT(pteval_t, 1) << 54) /* XN */
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#define PTE_PXN (_AT(pteval_t, 1) << 53) /* Privileged XN */
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#define PTE_UXN (_AT(pteval_t, 1) << 54) /* User XN */
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/*
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* AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
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@ -62,23 +62,23 @@ extern pgprot_t pgprot_default;
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#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
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#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG | PTE_XN | PTE_RDONLY)
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#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN)
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#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG)
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#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
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#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_RDONLY)
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#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
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#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_RDONLY)
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#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_XN | PTE_DIRTY)
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#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_DIRTY)
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#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
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#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
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#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN)
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#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
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#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
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#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
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#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
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#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_PXN | PTE_UXN | PTE_DIRTY)
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#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_UXN | PTE_DIRTY)
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#define __PAGE_NONE __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_XN | PTE_RDONLY)
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#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN)
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#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG)
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#define __PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
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#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_RDONLY)
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#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
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#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_RDONLY)
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#define __PAGE_NONE __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
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#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
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#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
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#define __PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
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#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
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#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
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#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
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#endif /* __ASSEMBLY__ */
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@ -130,10 +130,10 @@ extern struct page *empty_zero_page;
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#define pte_young(pte) (pte_val(pte) & PTE_AF)
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#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL)
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#define pte_write(pte) (!(pte_val(pte) & PTE_RDONLY))
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#define pte_exec(pte) (!(pte_val(pte) & PTE_XN))
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#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
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#define pte_present_exec_user(pte) \
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((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_XN)) == \
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((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == \
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(PTE_VALID | PTE_USER))
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#define PTE_BIT_FUNC(fn,op) \
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@ -262,7 +262,7 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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const pteval_t mask = PTE_USER | PTE_XN | PTE_RDONLY;
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const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY;
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pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
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return pte;
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}
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