ARM: dts: exynos: Move common nodes to exynos5.dtsi
Exynos5420 and Exynos5250 share some nodes: the PWM, syscon (sysreg_system_controller) and first four I2C controllers. Move them to parent DTSI to avoid duplication. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
This commit is contained in:
Krzysztof Kozlowski
Krzysztof Kozlowski
Родитель
8c2bd87eef
Коммит
5a124fe0b1
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@ -20,6 +20,10 @@
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interrupt-parent = <&gic>;
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aliases {
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i2c0 = &i2c_0;
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i2c1 = &i2c_1;
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i2c2 = &i2c_2;
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i2c3 = &i2c_3;
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serial0 = &serial_0;
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serial1 = &serial_1;
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serial2 = &serial_2;
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@ -63,6 +67,11 @@
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interrupts = <1 9 0xf04>;
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};
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sysreg_system_controller: syscon@10050000 {
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compatible = "samsung,exynos5-sysreg", "syscon";
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reg = <0x10050000 0x5000>;
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};
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serial_0: serial@12C00000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C00000 0x100>;
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@ -87,6 +96,53 @@
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interrupts = <0 54 0>;
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};
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i2c_0: i2c@12C60000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C60000 0x100>;
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interrupts = <0 56 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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i2c_1: i2c@12C70000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C70000 0x100>;
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interrupts = <0 57 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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i2c_2: i2c@12C80000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C80000 0x100>;
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interrupts = <0 58 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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i2c_3: i2c@12C90000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C90000 0x100>;
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interrupts = <0 59 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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pwm: pwm@12DD0000 {
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compatible = "samsung,exynos4210-pwm";
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reg = <0x12DD0000 0x100>;
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samsung,pwm-outputs = <0>, <1>, <2>, <3>;
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#pwm-cells = <3>;
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};
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rtc: rtc@101E0000 {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x101E0000 0x100>;
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@ -37,10 +37,6 @@
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mshc1 = &mmc_1;
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mshc2 = &mmc_2;
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mshc3 = &mmc_3;
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i2c0 = &i2c_0;
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i2c1 = &i2c_1;
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i2c2 = &i2c_2;
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i2c3 = &i2c_3;
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i2c4 = &i2c_4;
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i2c5 = &i2c_5;
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i2c6 = &i2c_6;
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@ -235,11 +231,6 @@
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interrupt-parent = <&gic>;
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};
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sysreg_system_controller: syscon@10050000 {
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compatible = "samsung,exynos5-sysreg", "syscon";
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reg = <0x10050000 0x5000>;
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};
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watchdog@101D0000 {
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compatible = "samsung,exynos5250-wdt";
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reg = <0x101D0000 0x100>;
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@ -328,62 +319,7 @@
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status = "disabled";
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};
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i2c_0: i2c@12C60000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C60000 0x100>;
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interrupts = <0 56 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock CLK_I2C0>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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i2c_1: i2c@12C70000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C70000 0x100>;
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interrupts = <0 57 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock CLK_I2C1>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_bus>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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i2c_2: i2c@12C80000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C80000 0x100>;
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interrupts = <0 58 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock CLK_I2C2>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_bus>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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i2c_3: i2c@12C90000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C90000 0x100>;
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interrupts = <0 59 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock CLK_I2C3>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_bus>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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/* i2c_0-3 are defined in exynos5.dtsi */
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i2c_4: i2c@12CA0000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CA0000 0x100>;
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@ -662,15 +598,6 @@
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samsung,pmureg-phandle = <&pmu_system_controller>;
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};
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pwm: pwm@12dd0000 {
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compatible = "samsung,exynos4210-pwm";
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reg = <0x12dd0000 0x100>;
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samsung,pwm-outputs = <0>, <1>, <2>, <3>;
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#pwm-cells = <3>;
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clocks = <&clock CLK_PWM>;
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clock-names = "timers";
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};
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amba {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -1070,6 +997,39 @@
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iommus = <&sysmmu_fimd1>;
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};
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&i2c_0 {
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clocks = <&clock CLK_I2C0>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
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};
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&i2c_1 {
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clocks = <&clock CLK_I2C1>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_bus>;
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};
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&i2c_2 {
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clocks = <&clock CLK_I2C2>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_bus>;
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};
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&i2c_3 {
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clocks = <&clock CLK_I2C3>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_bus>;
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};
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&pwm {
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clocks = <&clock CLK_PWM>;
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clock-names = "timers";
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};
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&rtc {
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clocks = <&clock CLK_RTC>;
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clock-names = "rtc";
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@ -30,10 +30,6 @@
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pinctrl2 = &pinctrl_2;
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pinctrl3 = &pinctrl_3;
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pinctrl4 = &pinctrl_4;
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i2c0 = &i2c_0;
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i2c1 = &i2c_1;
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i2c2 = &i2c_2;
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i2c3 = &i2c_3;
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i2c4 = &hsi2c_4;
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i2c5 = &hsi2c_5;
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i2c6 = &hsi2c_6;
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@ -578,15 +574,6 @@
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status = "disabled";
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};
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pwm: pwm@12dd0000 {
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compatible = "samsung,exynos4210-pwm";
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reg = <0x12dd0000 0x100>;
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samsung,pwm-outputs = <0>, <1>, <2>, <3>;
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#pwm-cells = <3>;
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clocks = <&clock CLK_PWM>;
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clock-names = "timers";
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};
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dp_phy: dp-video-phy {
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compatible = "samsung,exynos5420-dp-video-phy";
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samsung,pmu-syscon = <&pmu_system_controller>;
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@ -624,62 +611,7 @@
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status = "disabled";
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};
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i2c_0: i2c@12C60000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C60000 0x100>;
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interrupts = <0 56 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock CLK_I2C0>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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i2c_1: i2c@12C70000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C70000 0x100>;
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interrupts = <0 57 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock CLK_I2C1>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_bus>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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i2c_2: i2c@12C80000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C80000 0x100>;
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interrupts = <0 58 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock CLK_I2C2>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_bus>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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i2c_3: i2c@12C90000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C90000 0x100>;
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interrupts = <0 59 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock CLK_I2C3>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_bus>;
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samsung,sysreg-phandle = <&sysreg_system_controller>;
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status = "disabled";
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};
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/* i2c_0-3 are defined in exynos5.dtsi */
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hsi2c_4: i2c@12CA0000 {
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compatible = "samsung,exynos5250-hsi2c";
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reg = <0x12CA0000 0x1000>;
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@ -859,11 +791,6 @@
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interrupt-parent = <&gic>;
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};
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sysreg_system_controller: syscon@10050000 {
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compatible = "samsung,exynos5-sysreg", "syscon";
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reg = <0x10050000 0x5000>;
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};
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tmu_cpu0: tmu@10060000 {
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compatible = "samsung,exynos5420-tmu";
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reg = <0x10060000 0x100>;
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@ -1614,6 +1541,39 @@
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iommu-names = "m0", "m1";
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};
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&i2c_0 {
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clocks = <&clock CLK_I2C0>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
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};
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&i2c_1 {
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clocks = <&clock CLK_I2C1>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_bus>;
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};
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&i2c_2 {
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clocks = <&clock CLK_I2C2>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_bus>;
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};
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&i2c_3 {
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clocks = <&clock CLK_I2C3>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_bus>;
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};
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&pwm {
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clocks = <&clock CLK_PWM>;
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clock-names = "timers";
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};
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&rtc {
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clocks = <&clock CLK_RTC>;
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clock-names = "rtc";
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