nios2: convert to dma_map_ops
Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Ley Foon Tan <lftan@altera.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Joerg Roedel <jroedel@suse.de> Cc: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Родитель
e20dd88995
Коммит
5a1a67f1d7
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@ -16,6 +16,7 @@ config NIOS2
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select SOC_BUS
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select SPARSE_IRQ
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select USB_ARCH_HAS_HCD if USB_SUPPORT
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select HAVE_DMA_ATTRS
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config GENERIC_CSUM
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def_bool y
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@ -10,131 +10,20 @@
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#ifndef _ASM_NIOS2_DMA_MAPPING_H
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#define _ASM_NIOS2_DMA_MAPPING_H
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#include <linux/scatterlist.h>
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#include <linux/cache.h>
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#include <asm/cacheflush.h>
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extern struct dma_map_ops nios2_dma_ops;
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static inline void __dma_sync_for_device(void *vaddr, size_t size,
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enum dma_data_direction direction)
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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switch (direction) {
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case DMA_FROM_DEVICE:
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invalidate_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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case DMA_TO_DEVICE:
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/*
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* We just need to flush the caches here , but Nios2 flush
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* instruction will do both writeback and invalidate.
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*/
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case DMA_BIDIRECTIONAL: /* flush and invalidate */
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flush_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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default:
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BUG();
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}
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}
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static inline void __dma_sync_for_cpu(void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_BIDIRECTIONAL:
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case DMA_FROM_DEVICE:
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invalidate_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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case DMA_TO_DEVICE:
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break;
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default:
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BUG();
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}
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}
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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void dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle);
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static inline dma_addr_t dma_map_single(struct device *dev, void *ptr,
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size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(!valid_dma_direction(direction));
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__dma_sync_for_device(ptr, size, direction);
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return virt_to_phys(ptr);
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}
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static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
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size_t size, enum dma_data_direction direction)
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{
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}
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extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction direction);
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extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction direction);
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extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
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size_t size, enum dma_data_direction direction);
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extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries, enum dma_data_direction direction);
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extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction);
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extern void dma_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size, enum dma_data_direction direction);
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extern void dma_sync_single_range_for_cpu(struct device *dev,
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dma_addr_t dma_handle, unsigned long offset, size_t size,
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enum dma_data_direction direction);
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extern void dma_sync_single_range_for_device(struct device *dev,
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dma_addr_t dma_handle, unsigned long offset, size_t size,
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enum dma_data_direction direction);
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extern void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction direction);
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extern void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction direction);
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static inline int dma_supported(struct device *dev, u64 mask)
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{
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return 1;
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}
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static inline int dma_set_mask(struct device *dev, u64 mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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*dev->dma_mask = mask;
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return 0;
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}
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return 0;
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return &nios2_dma_ops;
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}
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/*
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* dma_alloc_noncoherent() returns non-cacheable memory, so there's no need to
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* do any flushing here.
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*/
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* dma_alloc_noncoherent() returns non-cacheable memory, so there's no need to
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* do any flushing here.
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*/
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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}
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/* drivers/base/dma-mapping.c */
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extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size);
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extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr,
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size_t size);
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#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
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#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
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#endif /* _ASM_NIOS2_DMA_MAPPING_H */
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@ -20,9 +20,46 @@
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#include <linux/cache.h>
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#include <asm/cacheflush.h>
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static inline void __dma_sync_for_device(void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_FROM_DEVICE:
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invalidate_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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case DMA_TO_DEVICE:
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/*
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* We just need to flush the caches here , but Nios2 flush
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* instruction will do both writeback and invalidate.
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*/
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case DMA_BIDIRECTIONAL: /* flush and invalidate */
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flush_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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default:
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BUG();
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}
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}
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp)
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static inline void __dma_sync_for_cpu(void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_BIDIRECTIONAL:
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case DMA_FROM_DEVICE:
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invalidate_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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case DMA_TO_DEVICE:
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break;
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default:
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BUG();
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}
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}
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static void *nios2_dma_alloc(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs)
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{
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void *ret;
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@ -45,24 +82,21 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
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return ret;
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}
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EXPORT_SYMBOL(dma_alloc_coherent);
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void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle)
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static void nios2_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, struct dma_attrs *attrs)
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{
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unsigned long addr = (unsigned long) CAC_ADDR((unsigned long) vaddr);
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free_pages(addr, get_order(size));
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}
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EXPORT_SYMBOL(dma_free_coherent);
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int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction direction)
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static int nios2_dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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int i;
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BUG_ON(!valid_dma_direction(direction));
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for_each_sg(sg, sg, nents, i) {
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void *addr;
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@ -75,40 +109,32 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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return nents;
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}
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EXPORT_SYMBOL(dma_map_sg);
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dma_addr_t dma_map_page(struct device *dev, struct page *page,
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static dma_addr_t nios2_dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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void *addr;
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void *addr = page_address(page) + offset;
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BUG_ON(!valid_dma_direction(direction));
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addr = page_address(page) + offset;
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__dma_sync_for_device(addr, size, direction);
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return page_to_phys(page) + offset;
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}
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EXPORT_SYMBOL(dma_map_page);
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void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
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enum dma_data_direction direction)
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static void nios2_dma_unmap_page(struct device *dev, dma_addr_t dma_address,
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size_t size, enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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BUG_ON(!valid_dma_direction(direction));
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__dma_sync_for_cpu(phys_to_virt(dma_address), size, direction);
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}
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EXPORT_SYMBOL(dma_unmap_page);
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void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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enum dma_data_direction direction)
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static void nios2_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries, enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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void *addr;
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int i;
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BUG_ON(!valid_dma_direction(direction));
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if (direction == DMA_TO_DEVICE)
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return;
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@ -118,69 +144,54 @@ void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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__dma_sync_for_cpu(addr, sg->length, direction);
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}
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}
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EXPORT_SYMBOL(dma_unmap_sg);
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void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction)
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static void nios2_dma_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(!valid_dma_direction(direction));
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__dma_sync_for_cpu(phys_to_virt(dma_handle), size, direction);
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}
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EXPORT_SYMBOL(dma_sync_single_for_cpu);
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void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction)
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static void nios2_dma_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(!valid_dma_direction(direction));
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__dma_sync_for_device(phys_to_virt(dma_handle), size, direction);
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}
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EXPORT_SYMBOL(dma_sync_single_for_device);
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void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(!valid_dma_direction(direction));
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__dma_sync_for_cpu(phys_to_virt(dma_handle), size, direction);
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}
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EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
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void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(!valid_dma_direction(direction));
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__dma_sync_for_device(phys_to_virt(dma_handle), size, direction);
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}
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EXPORT_SYMBOL(dma_sync_single_range_for_device);
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void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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static void nios2_dma_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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int i;
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BUG_ON(!valid_dma_direction(direction));
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/* Make sure that gcc doesn't leave the empty loop body. */
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for_each_sg(sg, sg, nelems, i)
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__dma_sync_for_cpu(sg_virt(sg), sg->length, direction);
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}
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EXPORT_SYMBOL(dma_sync_sg_for_cpu);
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void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction direction)
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static void nios2_dma_sync_sg_for_device(struct device *dev,
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struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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int i;
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BUG_ON(!valid_dma_direction(direction));
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/* Make sure that gcc doesn't leave the empty loop body. */
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for_each_sg(sg, sg, nelems, i)
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__dma_sync_for_device(sg_virt(sg), sg->length, direction);
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}
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EXPORT_SYMBOL(dma_sync_sg_for_device);
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struct dma_map_ops nios2_dma_ops = {
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.alloc = nios2_dma_alloc,
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.free = nios2_dma_free,
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.map_page = nios2_dma_map_page,
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.unmap_page = nios2_dma_unmap_page,
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.map_sg = nios2_dma_map_sg,
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.unmap_sg = nios2_dma_unmap_sg,
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.sync_single_for_device = nios2_dma_sync_single_for_device,
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.sync_single_for_cpu = nios2_dma_sync_single_for_cpu,
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.sync_sg_for_cpu = nios2_dma_sync_sg_for_cpu,
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.sync_sg_for_device = nios2_dma_sync_sg_for_device,
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};
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EXPORT_SYMBOL(nios2_dma_ops);
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