crypto: sahara - add support for SHA1/256
Add support for the MDHA unit in the SAHARA core. The MDHA can generate hash digests for MD5 and SHA1 in version 3 and additionally SHA224 and SHA256 in version 4. Add the SHA1 and SHA256 algorithms to the driver. The implementation was tested with the in-kernel testmgr and a userspace testprogram using AF_ALG with+without upto 128 pthreads on each AES and SHA256 on i.MX53. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Steffen Trumtrar
Herbert Xu
Родитель
c0c3c89ae3
Коммит
5a2bb93f59
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@ -3,6 +3,7 @@
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*
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* Support for SAHARA cryptographic accelerator.
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*
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* Copyright (c) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
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* Copyright (c) 2013 Vista Silicon S.L.
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* Author: Javier Martin <javier.martin@vista-silicon.com>
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*
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@ -15,6 +16,10 @@
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#include <crypto/algapi.h>
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#include <crypto/aes.h>
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#include <crypto/hash.h>
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#include <crypto/internal/hash.h>
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#include <crypto/scatterwalk.h>
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#include <crypto/sha.h>
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#include <linux/clk.h>
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#include <linux/crypto.h>
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@ -29,6 +34,9 @@
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#define SHA_BUFFER_LEN PAGE_SIZE
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#define SAHARA_MAX_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE
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#define SAHARA_NAME "sahara"
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#define SAHARA_VERSION_3 3
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#define SAHARA_VERSION_4 4
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@ -53,6 +61,23 @@
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#define SAHARA_HDR_CHA_MDHA (2 << 28)
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#define SAHARA_HDR_PARITY_BIT (1 << 31)
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#define SAHARA_HDR_MDHA_SET_MODE_MD_KEY 0x20880000
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#define SAHARA_HDR_MDHA_SET_MODE_HASH 0x208D0000
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#define SAHARA_HDR_MDHA_HASH 0xA0850000
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#define SAHARA_HDR_MDHA_STORE_DIGEST 0x20820000
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#define SAHARA_HDR_MDHA_ALG_SHA1 0
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#define SAHARA_HDR_MDHA_ALG_MD5 1
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#define SAHARA_HDR_MDHA_ALG_SHA256 2
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#define SAHARA_HDR_MDHA_ALG_SHA224 3
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#define SAHARA_HDR_MDHA_PDATA (1 << 2)
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#define SAHARA_HDR_MDHA_HMAC (1 << 3)
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#define SAHARA_HDR_MDHA_INIT (1 << 5)
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#define SAHARA_HDR_MDHA_IPAD (1 << 6)
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#define SAHARA_HDR_MDHA_OPAD (1 << 7)
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#define SAHARA_HDR_MDHA_SWAP (1 << 8)
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#define SAHARA_HDR_MDHA_MAC_FULL (1 << 9)
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#define SAHARA_HDR_MDHA_SSL (1 << 10)
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/* SAHARA can only process one request at a time */
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#define SAHARA_QUEUE_LENGTH 1
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@ -121,15 +146,58 @@ struct sahara_hw_link {
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struct sahara_ctx {
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unsigned long flags;
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/* AES-specific context */
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int keylen;
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u8 key[AES_KEYSIZE_128];
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struct crypto_ablkcipher *fallback;
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/* SHA-specific context */
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struct crypto_shash *shash_fallback;
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};
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struct sahara_aes_reqctx {
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unsigned long mode;
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};
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/*
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* struct sahara_sha_reqctx - private data per request
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* @buf: holds data for requests smaller than block_size
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* @rembuf: used to prepare one block_size-aligned request
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* @context: hw-specific context for request. Digest is extracted from this
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* @mode: specifies what type of hw-descriptor needs to be built
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* @digest_size: length of digest for this request
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* @context_size: length of hw-context for this request.
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* Always digest_size + 4
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* @buf_cnt: number of bytes saved in buf
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* @sg_in_idx: number of hw links
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* @in_sg: scatterlist for input data
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* @in_sg_chain: scatterlists for chained input data
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* @in_sg_chained: specifies if chained scatterlists are used or not
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* @total: total number of bytes for transfer
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* @last: is this the last block
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* @first: is this the first block
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* @active: inside a transfer
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*/
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struct sahara_sha_reqctx {
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u8 buf[SAHARA_MAX_SHA_BLOCK_SIZE];
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u8 rembuf[SAHARA_MAX_SHA_BLOCK_SIZE];
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u8 context[SHA256_DIGEST_SIZE + 4];
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struct mutex mutex;
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unsigned int mode;
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unsigned int digest_size;
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unsigned int context_size;
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unsigned int buf_cnt;
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unsigned int sg_in_idx;
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struct scatterlist *in_sg;
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struct scatterlist in_sg_chain[2];
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bool in_sg_chained;
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size_t total;
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unsigned int last;
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unsigned int first;
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unsigned int active;
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};
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struct sahara_dev {
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struct device *device;
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unsigned int version;
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@ -154,6 +222,9 @@ struct sahara_dev {
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u8 *iv_base;
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dma_addr_t iv_phys_base;
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u8 *context_base;
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dma_addr_t context_phys_base;
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struct sahara_hw_link *hw_link[SAHARA_MAX_HW_LINK];
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dma_addr_t hw_phys_link[SAHARA_MAX_HW_LINK];
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@ -707,6 +778,316 @@ static void sahara_aes_cra_exit(struct crypto_tfm *tfm)
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ctx->fallback = NULL;
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}
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static u32 sahara_sha_init_hdr(struct sahara_dev *dev,
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struct sahara_sha_reqctx *rctx)
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{
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u32 hdr = 0;
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hdr = rctx->mode;
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if (rctx->first) {
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hdr |= SAHARA_HDR_MDHA_SET_MODE_HASH;
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hdr |= SAHARA_HDR_MDHA_INIT;
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} else {
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hdr |= SAHARA_HDR_MDHA_SET_MODE_MD_KEY;
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}
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if (rctx->last)
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hdr |= SAHARA_HDR_MDHA_PDATA;
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if (hweight_long(hdr) % 2 == 0)
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hdr |= SAHARA_HDR_PARITY_BIT;
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return hdr;
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}
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static int sahara_sha_hw_links_create(struct sahara_dev *dev,
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struct sahara_sha_reqctx *rctx,
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int start)
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{
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struct scatterlist *sg;
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unsigned int i;
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int ret;
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dev->in_sg = rctx->in_sg;
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dev->nb_in_sg = sahara_sg_length(dev->in_sg, rctx->total);
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if ((dev->nb_in_sg) > SAHARA_MAX_HW_LINK) {
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dev_err(dev->device, "not enough hw links (%d)\n",
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dev->nb_in_sg + dev->nb_out_sg);
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return -EINVAL;
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}
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if (rctx->in_sg_chained) {
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i = start;
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sg = dev->in_sg;
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while (sg) {
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ret = dma_map_sg(dev->device, sg, 1,
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DMA_TO_DEVICE);
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if (!ret)
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return -EFAULT;
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dev->hw_link[i]->len = sg->length;
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dev->hw_link[i]->p = sg->dma_address;
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dev->hw_link[i]->next = dev->hw_phys_link[i + 1];
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sg = sg_next(sg);
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i += 1;
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}
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dev->hw_link[i-1]->next = 0;
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} else {
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sg = dev->in_sg;
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ret = dma_map_sg(dev->device, dev->in_sg, dev->nb_in_sg,
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DMA_TO_DEVICE);
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if (!ret)
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return -EFAULT;
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for (i = start; i < dev->nb_in_sg + start; i++) {
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dev->hw_link[i]->len = sg->length;
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dev->hw_link[i]->p = sg->dma_address;
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if (i == (dev->nb_in_sg + start - 1)) {
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dev->hw_link[i]->next = 0;
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} else {
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dev->hw_link[i]->next = dev->hw_phys_link[i + 1];
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sg = sg_next(sg);
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}
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}
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}
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return i;
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}
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static int sahara_sha_hw_data_descriptor_create(struct sahara_dev *dev,
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struct sahara_sha_reqctx *rctx,
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struct ahash_request *req,
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int index)
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{
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unsigned result_len;
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int i = index;
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if (rctx->first)
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/* Create initial descriptor: #8*/
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dev->hw_desc[index]->hdr = sahara_sha_init_hdr(dev, rctx);
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else
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/* Create hash descriptor: #10. Must follow #6. */
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dev->hw_desc[index]->hdr = SAHARA_HDR_MDHA_HASH;
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dev->hw_desc[index]->len1 = rctx->total;
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if (dev->hw_desc[index]->len1 == 0) {
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/* if len1 is 0, p1 must be 0, too */
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dev->hw_desc[index]->p1 = 0;
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rctx->sg_in_idx = 0;
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} else {
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/* Create input links */
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dev->hw_desc[index]->p1 = dev->hw_phys_link[index];
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i = sahara_sha_hw_links_create(dev, rctx, index);
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rctx->sg_in_idx = index;
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if (i < 0)
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return i;
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}
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dev->hw_desc[index]->p2 = dev->hw_phys_link[i];
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/* Save the context for the next operation */
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result_len = rctx->context_size;
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dev->hw_link[i]->p = dev->context_phys_base;
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dev->hw_link[i]->len = result_len;
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dev->hw_desc[index]->len2 = result_len;
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dev->hw_link[i]->next = 0;
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return 0;
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}
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/*
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* Load descriptor aka #6
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*
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* To load a previously saved context back to the MDHA unit
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*
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* p1: Saved Context
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* p2: NULL
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*
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*/
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static int sahara_sha_hw_context_descriptor_create(struct sahara_dev *dev,
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struct sahara_sha_reqctx *rctx,
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struct ahash_request *req,
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int index)
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{
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dev->hw_desc[index]->hdr = sahara_sha_init_hdr(dev, rctx);
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dev->hw_desc[index]->len1 = rctx->context_size;
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dev->hw_desc[index]->p1 = dev->hw_phys_link[index];
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dev->hw_desc[index]->len2 = 0;
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dev->hw_desc[index]->p2 = 0;
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dev->hw_link[index]->len = rctx->context_size;
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dev->hw_link[index]->p = dev->context_phys_base;
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dev->hw_link[index]->next = 0;
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return 0;
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}
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static int sahara_walk_and_recalc(struct scatterlist *sg, unsigned int nbytes)
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{
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if (!sg || !sg->length)
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return nbytes;
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while (nbytes && sg) {
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if (nbytes <= sg->length) {
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sg->length = nbytes;
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sg_mark_end(sg);
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break;
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}
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nbytes -= sg->length;
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sg = scatterwalk_sg_next(sg);
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}
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return nbytes;
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}
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static int sahara_sha_prepare_request(struct ahash_request *req)
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{
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct sahara_sha_reqctx *rctx = ahash_request_ctx(req);
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unsigned int hash_later;
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unsigned int block_size;
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unsigned int len;
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block_size = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
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/* append bytes from previous operation */
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len = rctx->buf_cnt + req->nbytes;
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/* only the last transfer can be padded in hardware */
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if (!rctx->last && (len < block_size)) {
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/* to few data, save for next operation */
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scatterwalk_map_and_copy(rctx->buf + rctx->buf_cnt, req->src,
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0, req->nbytes, 0);
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rctx->buf_cnt += req->nbytes;
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return 0;
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}
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/* add data from previous operation first */
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if (rctx->buf_cnt)
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memcpy(rctx->rembuf, rctx->buf, rctx->buf_cnt);
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/* data must always be a multiple of block_size */
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hash_later = rctx->last ? 0 : len & (block_size - 1);
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if (hash_later) {
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unsigned int offset = req->nbytes - hash_later;
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/* Save remaining bytes for later use */
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scatterwalk_map_and_copy(rctx->buf, req->src, offset,
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hash_later, 0);
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}
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/* nbytes should now be multiple of blocksize */
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req->nbytes = req->nbytes - hash_later;
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sahara_walk_and_recalc(req->src, req->nbytes);
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/* have data from previous operation and current */
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if (rctx->buf_cnt && req->nbytes) {
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sg_init_table(rctx->in_sg_chain, 2);
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sg_set_buf(rctx->in_sg_chain, rctx->rembuf, rctx->buf_cnt);
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scatterwalk_sg_chain(rctx->in_sg_chain, 2, req->src);
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rctx->total = req->nbytes + rctx->buf_cnt;
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rctx->in_sg = rctx->in_sg_chain;
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rctx->in_sg_chained = true;
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req->src = rctx->in_sg_chain;
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/* only data from previous operation */
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} else if (rctx->buf_cnt) {
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if (req->src)
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rctx->in_sg = req->src;
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else
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rctx->in_sg = rctx->in_sg_chain;
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/* buf was copied into rembuf above */
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sg_init_one(rctx->in_sg, rctx->rembuf, rctx->buf_cnt);
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rctx->total = rctx->buf_cnt;
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rctx->in_sg_chained = false;
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/* no data from previous operation */
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} else {
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rctx->in_sg = req->src;
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rctx->total = req->nbytes;
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req->src = rctx->in_sg;
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rctx->in_sg_chained = false;
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}
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/* on next call, we only have the remaining data in the buffer */
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rctx->buf_cnt = hash_later;
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return -EINPROGRESS;
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}
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static void sahara_sha_unmap_sg(struct sahara_dev *dev,
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struct sahara_sha_reqctx *rctx)
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{
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struct scatterlist *sg;
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if (rctx->in_sg_chained) {
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sg = dev->in_sg;
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while (sg) {
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dma_unmap_sg(dev->device, sg, 1, DMA_TO_DEVICE);
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sg = sg_next(sg);
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}
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} else {
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dma_unmap_sg(dev->device, dev->in_sg, dev->nb_in_sg,
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DMA_TO_DEVICE);
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}
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}
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static int sahara_sha_process(struct ahash_request *req)
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{
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struct sahara_dev *dev = dev_ptr;
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struct sahara_sha_reqctx *rctx = ahash_request_ctx(req);
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int ret = -EINPROGRESS;
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ret = sahara_sha_prepare_request(req);
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if (!ret)
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return ret;
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if (rctx->first) {
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sahara_sha_hw_data_descriptor_create(dev, rctx, req, 0);
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dev->hw_desc[0]->next = 0;
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rctx->first = 0;
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} else {
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memcpy(dev->context_base, rctx->context, rctx->context_size);
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sahara_sha_hw_context_descriptor_create(dev, rctx, req, 0);
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dev->hw_desc[0]->next = dev->hw_phys_desc[1];
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sahara_sha_hw_data_descriptor_create(dev, rctx, req, 1);
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dev->hw_desc[1]->next = 0;
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}
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sahara_dump_descriptors(dev);
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sahara_dump_links(dev);
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reinit_completion(&dev->dma_completion);
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sahara_write(dev, dev->hw_phys_desc[0], SAHARA_REG_DAR);
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ret = wait_for_completion_timeout(&dev->dma_completion,
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msecs_to_jiffies(SAHARA_TIMEOUT_MS));
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if (!ret) {
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dev_err(dev->device, "SHA timeout\n");
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return -ETIMEDOUT;
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}
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if (rctx->sg_in_idx)
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sahara_sha_unmap_sg(dev, rctx);
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memcpy(rctx->context, dev->context_base, rctx->context_size);
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if (req->result)
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memcpy(req->result, rctx->context, rctx->digest_size);
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return 0;
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}
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static int sahara_queue_manage(void *data)
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{
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struct sahara_dev *dev = (struct sahara_dev *)data;
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@ -721,10 +1102,18 @@ static int sahara_queue_manage(void *data)
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mutex_unlock(&dev->queue_mutex);
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if (async_req) {
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struct ablkcipher_request *req =
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ablkcipher_request_cast(async_req);
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if (crypto_tfm_alg_type(async_req->tfm) ==
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CRYPTO_ALG_TYPE_AHASH) {
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struct ahash_request *req =
|
||||
ahash_request_cast(async_req);
|
||||
|
||||
ret = sahara_aes_process(req);
|
||||
ret = sahara_sha_process(req);
|
||||
} else {
|
||||
struct ablkcipher_request *req =
|
||||
ablkcipher_request_cast(async_req);
|
||||
|
||||
ret = sahara_aes_process(req);
|
||||
}
|
||||
|
||||
async_req->complete(async_req, ret);
|
||||
|
||||
|
|
@ -737,6 +1126,136 @@ static int sahara_queue_manage(void *data)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int sahara_sha_enqueue(struct ahash_request *req, int last)
|
||||
{
|
||||
struct sahara_sha_reqctx *rctx = ahash_request_ctx(req);
|
||||
struct sahara_dev *dev = dev_ptr;
|
||||
int ret;
|
||||
|
||||
if (!req->nbytes && !last)
|
||||
return 0;
|
||||
|
||||
mutex_lock(&rctx->mutex);
|
||||
rctx->last = last;
|
||||
|
||||
if (!rctx->active) {
|
||||
rctx->active = 1;
|
||||
rctx->first = 1;
|
||||
}
|
||||
|
||||
mutex_lock(&dev->queue_mutex);
|
||||
ret = crypto_enqueue_request(&dev->queue, &req->base);
|
||||
mutex_unlock(&dev->queue_mutex);
|
||||
|
||||
wake_up_process(dev->kthread);
|
||||
mutex_unlock(&rctx->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sahara_sha_init(struct ahash_request *req)
|
||||
{
|
||||
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
|
||||
struct sahara_sha_reqctx *rctx = ahash_request_ctx(req);
|
||||
|
||||
memset(rctx, 0, sizeof(*rctx));
|
||||
|
||||
switch (crypto_ahash_digestsize(tfm)) {
|
||||
case SHA1_DIGEST_SIZE:
|
||||
rctx->mode |= SAHARA_HDR_MDHA_ALG_SHA1;
|
||||
rctx->digest_size = SHA1_DIGEST_SIZE;
|
||||
break;
|
||||
case SHA256_DIGEST_SIZE:
|
||||
rctx->mode |= SAHARA_HDR_MDHA_ALG_SHA256;
|
||||
rctx->digest_size = SHA256_DIGEST_SIZE;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
rctx->context_size = rctx->digest_size + 4;
|
||||
rctx->active = 0;
|
||||
|
||||
mutex_init(&rctx->mutex);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sahara_sha_update(struct ahash_request *req)
|
||||
{
|
||||
return sahara_sha_enqueue(req, 0);
|
||||
}
|
||||
|
||||
static int sahara_sha_final(struct ahash_request *req)
|
||||
{
|
||||
req->nbytes = 0;
|
||||
return sahara_sha_enqueue(req, 1);
|
||||
}
|
||||
|
||||
static int sahara_sha_finup(struct ahash_request *req)
|
||||
{
|
||||
return sahara_sha_enqueue(req, 1);
|
||||
}
|
||||
|
||||
static int sahara_sha_digest(struct ahash_request *req)
|
||||
{
|
||||
sahara_sha_init(req);
|
||||
|
||||
return sahara_sha_finup(req);
|
||||
}
|
||||
|
||||
static int sahara_sha_export(struct ahash_request *req, void *out)
|
||||
{
|
||||
struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
|
||||
struct sahara_ctx *ctx = crypto_ahash_ctx(ahash);
|
||||
struct sahara_sha_reqctx *rctx = ahash_request_ctx(req);
|
||||
|
||||
memcpy(out, ctx, sizeof(struct sahara_ctx));
|
||||
memcpy(out + sizeof(struct sahara_sha_reqctx), rctx,
|
||||
sizeof(struct sahara_sha_reqctx));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sahara_sha_import(struct ahash_request *req, const void *in)
|
||||
{
|
||||
struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
|
||||
struct sahara_ctx *ctx = crypto_ahash_ctx(ahash);
|
||||
struct sahara_sha_reqctx *rctx = ahash_request_ctx(req);
|
||||
|
||||
memcpy(ctx, in, sizeof(struct sahara_ctx));
|
||||
memcpy(rctx, in + sizeof(struct sahara_sha_reqctx),
|
||||
sizeof(struct sahara_sha_reqctx));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sahara_sha_cra_init(struct crypto_tfm *tfm)
|
||||
{
|
||||
const char *name = crypto_tfm_alg_name(tfm);
|
||||
struct sahara_ctx *ctx = crypto_tfm_ctx(tfm);
|
||||
|
||||
ctx->shash_fallback = crypto_alloc_shash(name, 0,
|
||||
CRYPTO_ALG_NEED_FALLBACK);
|
||||
if (IS_ERR(ctx->shash_fallback)) {
|
||||
pr_err("Error allocating fallback algo %s\n", name);
|
||||
return PTR_ERR(ctx->shash_fallback);
|
||||
}
|
||||
crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
|
||||
sizeof(struct sahara_sha_reqctx) +
|
||||
SHA_BUFFER_LEN + SHA256_BLOCK_SIZE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sahara_sha_cra_exit(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct sahara_ctx *ctx = crypto_tfm_ctx(tfm);
|
||||
|
||||
crypto_free_shash(ctx->shash_fallback);
|
||||
ctx->shash_fallback = NULL;
|
||||
}
|
||||
|
||||
static struct crypto_alg aes_algs[] = {
|
||||
{
|
||||
.cra_name = "ecb(aes)",
|
||||
|
|
@ -782,6 +1301,60 @@ static struct crypto_alg aes_algs[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static struct ahash_alg sha_v3_algs[] = {
|
||||
{
|
||||
.init = sahara_sha_init,
|
||||
.update = sahara_sha_update,
|
||||
.final = sahara_sha_final,
|
||||
.finup = sahara_sha_finup,
|
||||
.digest = sahara_sha_digest,
|
||||
.export = sahara_sha_export,
|
||||
.import = sahara_sha_import,
|
||||
.halg.digestsize = SHA1_DIGEST_SIZE,
|
||||
.halg.base = {
|
||||
.cra_name = "sha1",
|
||||
.cra_driver_name = "sahara-sha1",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_AHASH |
|
||||
CRYPTO_ALG_ASYNC |
|
||||
CRYPTO_ALG_NEED_FALLBACK,
|
||||
.cra_blocksize = SHA1_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct sahara_ctx),
|
||||
.cra_alignmask = 0,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = sahara_sha_cra_init,
|
||||
.cra_exit = sahara_sha_cra_exit,
|
||||
}
|
||||
},
|
||||
};
|
||||
|
||||
static struct ahash_alg sha_v4_algs[] = {
|
||||
{
|
||||
.init = sahara_sha_init,
|
||||
.update = sahara_sha_update,
|
||||
.final = sahara_sha_final,
|
||||
.finup = sahara_sha_finup,
|
||||
.digest = sahara_sha_digest,
|
||||
.export = sahara_sha_export,
|
||||
.import = sahara_sha_import,
|
||||
.halg.digestsize = SHA256_DIGEST_SIZE,
|
||||
.halg.base = {
|
||||
.cra_name = "sha256",
|
||||
.cra_driver_name = "sahara-sha256",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_AHASH |
|
||||
CRYPTO_ALG_ASYNC |
|
||||
CRYPTO_ALG_NEED_FALLBACK,
|
||||
.cra_blocksize = SHA256_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct sahara_ctx),
|
||||
.cra_alignmask = 0,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = sahara_sha_cra_init,
|
||||
.cra_exit = sahara_sha_cra_exit,
|
||||
}
|
||||
},
|
||||
};
|
||||
|
||||
static irqreturn_t sahara_irq_handler(int irq, void *data)
|
||||
{
|
||||
struct sahara_dev *dev = (struct sahara_dev *)data;
|
||||
|
|
@ -810,7 +1383,8 @@ static irqreturn_t sahara_irq_handler(int irq, void *data)
|
|||
|
||||
static int sahara_register_algs(struct sahara_dev *dev)
|
||||
{
|
||||
int err, i, j;
|
||||
int err;
|
||||
unsigned int i, j, k, l;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(aes_algs); i++) {
|
||||
INIT_LIST_HEAD(&aes_algs[i].cra_list);
|
||||
|
|
@ -819,8 +1393,29 @@ static int sahara_register_algs(struct sahara_dev *dev)
|
|||
goto err_aes_algs;
|
||||
}
|
||||
|
||||
for (k = 0; k < ARRAY_SIZE(sha_v3_algs); k++) {
|
||||
err = crypto_register_ahash(&sha_v3_algs[k]);
|
||||
if (err)
|
||||
goto err_sha_v3_algs;
|
||||
}
|
||||
|
||||
if (dev->version > SAHARA_VERSION_3)
|
||||
for (l = 0; l < ARRAY_SIZE(sha_v4_algs); l++) {
|
||||
err = crypto_register_ahash(&sha_v4_algs[l]);
|
||||
if (err)
|
||||
goto err_sha_v4_algs;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_sha_v4_algs:
|
||||
for (j = 0; j < l; j++)
|
||||
crypto_unregister_ahash(&sha_v4_algs[j]);
|
||||
|
||||
err_sha_v3_algs:
|
||||
for (j = 0; j < k; j++)
|
||||
crypto_unregister_ahash(&sha_v4_algs[j]);
|
||||
|
||||
err_aes_algs:
|
||||
for (j = 0; j < i; j++)
|
||||
crypto_unregister_alg(&aes_algs[j]);
|
||||
|
|
@ -830,10 +1425,17 @@ err_aes_algs:
|
|||
|
||||
static void sahara_unregister_algs(struct sahara_dev *dev)
|
||||
{
|
||||
int i;
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(aes_algs); i++)
|
||||
crypto_unregister_alg(&aes_algs[i]);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sha_v4_algs); i++)
|
||||
crypto_unregister_ahash(&sha_v3_algs[i]);
|
||||
|
||||
if (dev->version > SAHARA_VERSION_3)
|
||||
for (i = 0; i < ARRAY_SIZE(sha_v4_algs); i++)
|
||||
crypto_unregister_ahash(&sha_v4_algs[i]);
|
||||
}
|
||||
|
||||
static struct platform_device_id sahara_platform_ids[] = {
|
||||
|
|
@ -923,6 +1525,16 @@ static int sahara_probe(struct platform_device *pdev)
|
|||
dev->iv_base = dev->key_base + AES_KEYSIZE_128;
|
||||
dev->iv_phys_base = dev->key_phys_base + AES_KEYSIZE_128;
|
||||
|
||||
/* Allocate space for context: largest digest + message length field */
|
||||
dev->context_base = dma_alloc_coherent(&pdev->dev,
|
||||
SHA256_DIGEST_SIZE + 4,
|
||||
&dev->context_phys_base, GFP_KERNEL);
|
||||
if (!dev->context_base) {
|
||||
dev_err(&pdev->dev, "Could not allocate memory for MDHA context\n");
|
||||
err = -ENOMEM;
|
||||
goto err_key;
|
||||
}
|
||||
|
||||
/* Allocate space for HW links */
|
||||
dev->hw_link[0] = dma_alloc_coherent(&pdev->dev,
|
||||
SAHARA_MAX_HW_LINK * sizeof(struct sahara_hw_link),
|
||||
|
|
@ -1002,6 +1614,9 @@ err_link:
|
|||
dma_free_coherent(&pdev->dev,
|
||||
2 * AES_KEYSIZE_128,
|
||||
dev->key_base, dev->key_phys_base);
|
||||
dma_free_coherent(&pdev->dev,
|
||||
SHA256_DIGEST_SIZE,
|
||||
dev->context_base, dev->context_phys_base);
|
||||
err_key:
|
||||
dma_free_coherent(&pdev->dev,
|
||||
SAHARA_MAX_HW_DESC * sizeof(struct sahara_hw_desc),
|
||||
|
|
@ -1051,4 +1666,5 @@ module_platform_driver(sahara_driver);
|
|||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
|
||||
MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de>");
|
||||
MODULE_DESCRIPTION("SAHARA2 HW crypto accelerator");
|
||||
|
|
|
|||
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