OMAP4: DSS2: DSI: Changes for DSI2 on OMAP4
Introduce DSI2 PLL clock sources needed by LCD2 channel and DSI2 Protocol engine and DISPC Functional clock. Do the following: - Modify dss_get_dsi_clk_source() and dss_select_dsi_clk_source() to take the dsi module number as an argument. - Create debugfs files for dsi2, split the corresponding debugfs functions. - Allow DPI to use these new clock sources. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Родитель
2e868dbe1d
Коммит
5a8b572d83
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@ -127,8 +127,7 @@ static int dss_initialize_debugfs(void)
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#endif
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#if defined(CONFIG_OMAP2_DSS_DSI) && defined(CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS)
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debugfs_create_file("dsi_irq", S_IRUGO, dss_debugfs_dir,
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&dsi_dump_irqs, &dss_debug_fops);
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dsi_create_debugfs_files_irq(dss_debugfs_dir, &dss_debug_fops);
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#endif
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debugfs_create_file("dss", S_IRUGO, dss_debugfs_dir,
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@ -140,8 +139,7 @@ static int dss_initialize_debugfs(void)
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&rfbi_dump_regs, &dss_debug_fops);
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#endif
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#ifdef CONFIG_OMAP2_DSS_DSI
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debugfs_create_file("dsi", S_IRUGO, dss_debugfs_dir,
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&dsi_dump_regs, &dss_debug_fops);
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dsi_create_debugfs_files_reg(dss_debugfs_dir, &dss_debug_fops);
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#endif
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#ifdef CONFIG_OMAP2_DSS_VENC
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debugfs_create_file("venc", S_IRUGO, dss_debugfs_dir,
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@ -2250,6 +2250,10 @@ unsigned long dispc_fclk_rate(void)
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dsidev = dsi_get_dsidev_from_id(0);
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r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
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break;
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case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:
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dsidev = dsi_get_dsidev_from_id(1);
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r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
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break;
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default:
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BUG();
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}
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@ -2276,6 +2280,10 @@ unsigned long dispc_lclk_rate(enum omap_channel channel)
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dsidev = dsi_get_dsidev_from_id(0);
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r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
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break;
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case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:
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dsidev = dsi_get_dsidev_from_id(1);
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r = dsi_get_pll_hsdiv_dispc_rate(dsidev);
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break;
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default:
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BUG();
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}
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@ -53,8 +53,12 @@ static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
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{
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if (dssdev->clocks.dispc.dispc_fclk_src ==
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OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
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dssdev->clocks.dispc.dispc_fclk_src ==
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OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC ||
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dssdev->clocks.dispc.channel.lcd_clk_src ==
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OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC)
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OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
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dssdev->clocks.dispc.channel.lcd_clk_src ==
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OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC)
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return true;
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else
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return false;
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@ -35,6 +35,7 @@
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#include <linux/workqueue.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/debugfs.h>
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#include <video/omapdss.h>
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#include <plat/clock.h>
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@ -1143,8 +1144,9 @@ static unsigned long dsi_get_txbyteclkhs(struct platform_device *dsidev)
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static unsigned long dsi_fclk_rate(struct platform_device *dsidev)
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{
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unsigned long r;
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int dsi_module = dsi_get_dsidev_id(dsidev);
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if (dss_get_dsi_clk_source() == OMAP_DSS_CLK_SRC_FCK) {
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if (dss_get_dsi_clk_source(dsi_module) == OMAP_DSS_CLK_SRC_FCK) {
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/* DSI FCLK source is DSS_CLK_FCK */
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r = dss_clk_get_rate(DSS_CLK_FCK);
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} else {
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@ -1670,19 +1672,20 @@ void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes)
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DSSDBG("PLL uninit done\n");
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}
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void dsi_dump_clocks(struct seq_file *s)
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static void dsi_dump_dsidev_clocks(struct platform_device *dsidev,
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struct seq_file *s)
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{
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struct platform_device *dsidev = dsi_get_dsidev_from_id(0);
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struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
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struct dsi_clock_info *cinfo = &dsi->current_cinfo;
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enum omap_dss_clk_source dispc_clk_src, dsi_clk_src;
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int dsi_module = dsi_get_dsidev_id(dsidev);
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dispc_clk_src = dss_get_dispc_clk_source();
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dsi_clk_src = dss_get_dsi_clk_source();
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dsi_clk_src = dss_get_dsi_clk_source(dsi_module);
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enable_clocks(1);
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seq_printf(s, "- DSI PLL -\n");
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seq_printf(s, "- DSI%d PLL -\n", dsi_module + 1);
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seq_printf(s, "dsi pll source = %s\n",
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cinfo->use_sys_clk ? "dss_sys_clk" : "pclkfree");
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@ -1708,7 +1711,7 @@ void dsi_dump_clocks(struct seq_file *s)
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dsi_clk_src == OMAP_DSS_CLK_SRC_FCK ?
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"off" : "on");
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seq_printf(s, "- DSI -\n");
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seq_printf(s, "- DSI%d -\n", dsi_module + 1);
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seq_printf(s, "dsi fclk source = %s (%s)\n",
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dss_get_generic_clk_source_name(dsi_clk_src),
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@ -1731,13 +1734,26 @@ void dsi_dump_clocks(struct seq_file *s)
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enable_clocks(0);
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}
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#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
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void dsi_dump_irqs(struct seq_file *s)
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void dsi_dump_clocks(struct seq_file *s)
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{
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struct platform_device *dsidev;
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int i;
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for (i = 0; i < MAX_NUM_DSI; i++) {
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dsidev = dsi_get_dsidev_from_id(i);
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if (dsidev)
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dsi_dump_dsidev_clocks(dsidev, s);
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}
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}
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#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
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static void dsi_dump_dsidev_irqs(struct platform_device *dsidev,
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struct seq_file *s)
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{
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struct platform_device *dsidev = dsi_get_dsidev_from_id(0);
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struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
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unsigned long flags;
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struct dsi_irq_stats stats;
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int dsi_module = dsi_get_dsidev_id(dsidev);
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spin_lock_irqsave(&dsi->irq_stats_lock, flags);
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@ -1754,7 +1770,7 @@ void dsi_dump_irqs(struct seq_file *s)
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#define PIS(x) \
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seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]);
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seq_printf(s, "-- DSI interrupts --\n");
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seq_printf(s, "-- DSI%d interrupts --\n", dsi_module + 1);
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PIS(VC0);
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PIS(VC1);
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PIS(VC2);
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@ -1820,12 +1836,41 @@ void dsi_dump_irqs(struct seq_file *s)
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PIS(ULPSACTIVENOT_ALL1);
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#undef PIS
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}
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#endif
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void dsi_dump_regs(struct seq_file *s)
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static void dsi1_dump_irqs(struct seq_file *s)
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{
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struct platform_device *dsidev = dsi_get_dsidev_from_id(0);
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dsi_dump_dsidev_irqs(dsidev, s);
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}
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static void dsi2_dump_irqs(struct seq_file *s)
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{
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struct platform_device *dsidev = dsi_get_dsidev_from_id(1);
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dsi_dump_dsidev_irqs(dsidev, s);
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}
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void dsi_create_debugfs_files_irq(struct dentry *debugfs_dir,
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const struct file_operations *debug_fops)
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{
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struct platform_device *dsidev;
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dsidev = dsi_get_dsidev_from_id(0);
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if (dsidev)
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debugfs_create_file("dsi1_irqs", S_IRUGO, debugfs_dir,
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&dsi1_dump_irqs, debug_fops);
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dsidev = dsi_get_dsidev_from_id(1);
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if (dsidev)
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debugfs_create_file("dsi2_irqs", S_IRUGO, debugfs_dir,
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&dsi2_dump_irqs, debug_fops);
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}
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#endif
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static void dsi_dump_dsidev_regs(struct platform_device *dsidev,
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struct seq_file *s)
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{
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#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsidev, r))
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dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
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@ -1906,6 +1951,35 @@ void dsi_dump_regs(struct seq_file *s)
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#undef DUMPREG
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}
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static void dsi1_dump_regs(struct seq_file *s)
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{
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struct platform_device *dsidev = dsi_get_dsidev_from_id(0);
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dsi_dump_dsidev_regs(dsidev, s);
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}
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static void dsi2_dump_regs(struct seq_file *s)
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{
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struct platform_device *dsidev = dsi_get_dsidev_from_id(1);
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dsi_dump_dsidev_regs(dsidev, s);
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}
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void dsi_create_debugfs_files_reg(struct dentry *debugfs_dir,
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const struct file_operations *debug_fops)
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{
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struct platform_device *dsidev;
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dsidev = dsi_get_dsidev_from_id(0);
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if (dsidev)
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debugfs_create_file("dsi1_regs", S_IRUGO, debugfs_dir,
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&dsi1_dump_regs, debug_fops);
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dsidev = dsi_get_dsidev_from_id(1);
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if (dsidev)
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debugfs_create_file("dsi2_regs", S_IRUGO, debugfs_dir,
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&dsi2_dump_regs, debug_fops);
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}
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enum dsi_cio_power_state {
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DSI_COMPLEXIO_POWER_OFF = 0x0,
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DSI_COMPLEXIO_POWER_ON = 0x1,
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@ -3847,9 +3921,13 @@ EXPORT_SYMBOL(omap_dsi_update);
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static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
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{
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int r;
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u32 irq;
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irq = dssdev->manager->id == OMAP_DSS_CHANNEL_LCD ?
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DISPC_IRQ_FRAMEDONE : DISPC_IRQ_FRAMEDONE2;
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r = omap_dispc_register_isr(dsi_framedone_irq_callback, (void *) dssdev,
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DISPC_IRQ_FRAMEDONE);
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irq);
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if (r) {
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DSSERR("can't get FRAMEDONE irq\n");
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return r;
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@ -3882,8 +3960,13 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
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static void dsi_display_uninit_dispc(struct omap_dss_device *dssdev)
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{
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u32 irq;
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irq = dssdev->manager->id == OMAP_DSS_CHANNEL_LCD ?
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DISPC_IRQ_FRAMEDONE : DISPC_IRQ_FRAMEDONE2;
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omap_dispc_unregister_isr(dsi_framedone_irq_callback, (void *) dssdev,
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DISPC_IRQ_FRAMEDONE);
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irq);
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}
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static int dsi_configure_dsi_clocks(struct omap_dss_device *dssdev)
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@ -3943,6 +4026,7 @@ static int dsi_configure_dispc_clocks(struct omap_dss_device *dssdev)
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static int dsi_display_init_dsi(struct omap_dss_device *dssdev)
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{
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struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
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int dsi_module = dsi_get_dsidev_id(dsidev);
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int r;
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r = dsi_pll_init(dsidev, true, true);
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@ -3954,7 +4038,7 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev)
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goto err1;
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dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
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dss_select_dsi_clk_source(dssdev->clocks.dsi.dsi_fclk_src);
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dss_select_dsi_clk_source(dsi_module, dssdev->clocks.dsi.dsi_fclk_src);
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dss_select_lcd_clk_source(dssdev->manager->id,
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dssdev->clocks.dispc.channel.lcd_clk_src);
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@ -3993,7 +4077,7 @@ err3:
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dsi_cio_uninit(dsidev);
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err2:
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dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
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dss_select_dsi_clk_source(OMAP_DSS_CLK_SRC_FCK);
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dss_select_dsi_clk_source(dsi_module, OMAP_DSS_CLK_SRC_FCK);
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err1:
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dsi_pll_uninit(dsidev, true);
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err0:
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@ -4005,6 +4089,7 @@ static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev,
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{
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struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
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struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
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int dsi_module = dsi_get_dsidev_id(dsidev);
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if (enter_ulps && !dsi->ulps_enabled)
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dsi_enter_ulps(dsidev);
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@ -4017,7 +4102,7 @@ static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev,
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dsi_vc_enable(dsidev, 3, 0);
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dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
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dss_select_dsi_clk_source(OMAP_DSS_CLK_SRC_FCK);
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dss_select_dsi_clk_source(dsi_module, OMAP_DSS_CLK_SRC_FCK);
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dsi_cio_uninit(dsidev);
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dsi_pll_uninit(dsidev, disconnect_lanes);
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}
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@ -74,7 +74,7 @@ static struct {
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struct dss_clock_info cache_dss_cinfo;
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struct dispc_clock_info cache_dispc_cinfo;
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enum omap_dss_clk_source dsi_clk_source;
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enum omap_dss_clk_source dsi_clk_source[MAX_NUM_DSI];
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enum omap_dss_clk_source dispc_clk_source;
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enum omap_dss_clk_source lcd_clk_source[MAX_DSS_LCD_MANAGERS];
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@ -313,6 +313,11 @@ void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src)
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dsidev = dsi_get_dsidev_from_id(0);
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dsi_wait_pll_hsdiv_dispc_active(dsidev);
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break;
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case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:
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b = 2;
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dsidev = dsi_get_dsidev_from_id(1);
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dsi_wait_pll_hsdiv_dispc_active(dsidev);
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break;
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default:
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BUG();
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}
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@ -324,7 +329,8 @@ void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src)
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dss.dispc_clk_source = clk_src;
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}
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void dss_select_dsi_clk_source(enum omap_dss_clk_source clk_src)
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void dss_select_dsi_clk_source(int dsi_module,
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enum omap_dss_clk_source clk_src)
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{
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struct platform_device *dsidev;
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int b;
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@ -334,17 +340,24 @@ void dss_select_dsi_clk_source(enum omap_dss_clk_source clk_src)
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b = 0;
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break;
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case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI:
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BUG_ON(dsi_module != 0);
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b = 1;
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dsidev = dsi_get_dsidev_from_id(0);
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dsi_wait_pll_hsdiv_dsi_active(dsidev);
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break;
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case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI:
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BUG_ON(dsi_module != 1);
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b = 1;
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dsidev = dsi_get_dsidev_from_id(1);
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dsi_wait_pll_hsdiv_dsi_active(dsidev);
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break;
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default:
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BUG();
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}
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REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */
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dss.dsi_clk_source = clk_src;
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dss.dsi_clk_source[dsi_module] = clk_src;
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}
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void dss_select_lcd_clk_source(enum omap_channel channel,
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@ -366,6 +379,12 @@ void dss_select_lcd_clk_source(enum omap_channel channel,
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dsidev = dsi_get_dsidev_from_id(0);
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dsi_wait_pll_hsdiv_dispc_active(dsidev);
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break;
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case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:
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BUG_ON(channel != OMAP_DSS_CHANNEL_LCD2);
|
||||
b = 1;
|
||||
dsidev = dsi_get_dsidev_from_id(1);
|
||||
dsi_wait_pll_hsdiv_dispc_active(dsidev);
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
|
@ -382,9 +401,9 @@ enum omap_dss_clk_source dss_get_dispc_clk_source(void)
|
|||
return dss.dispc_clk_source;
|
||||
}
|
||||
|
||||
enum omap_dss_clk_source dss_get_dsi_clk_source(void)
|
||||
enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module)
|
||||
{
|
||||
return dss.dsi_clk_source;
|
||||
return dss.dsi_clk_source[dsi_module];
|
||||
}
|
||||
|
||||
enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel)
|
||||
|
@ -715,7 +734,8 @@ static int dss_init(void)
|
|||
|
||||
dss.dpll4_m4_ck = dpll4_m4_ck;
|
||||
|
||||
dss.dsi_clk_source = OMAP_DSS_CLK_SRC_FCK;
|
||||
dss.dsi_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;
|
||||
dss.dsi_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;
|
||||
dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK;
|
||||
dss.lcd_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;
|
||||
dss.lcd_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;
|
||||
|
|
|
@ -240,11 +240,12 @@ int dss_sdi_enable(void);
|
|||
void dss_sdi_disable(void);
|
||||
|
||||
void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src);
|
||||
void dss_select_dsi_clk_source(enum omap_dss_clk_source clk_src);
|
||||
void dss_select_dsi_clk_source(int dsi_module,
|
||||
enum omap_dss_clk_source clk_src);
|
||||
void dss_select_lcd_clk_source(enum omap_channel channel,
|
||||
enum omap_dss_clk_source clk_src);
|
||||
enum omap_dss_clk_source dss_get_dispc_clk_source(void);
|
||||
enum omap_dss_clk_source dss_get_dsi_clk_source(void);
|
||||
enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module);
|
||||
enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);
|
||||
|
||||
void dss_set_venc_output(enum omap_dss_venc_type type);
|
||||
|
@ -275,12 +276,18 @@ static inline void sdi_exit(void)
|
|||
|
||||
/* DSI */
|
||||
#ifdef CONFIG_OMAP2_DSS_DSI
|
||||
|
||||
struct dentry;
|
||||
struct file_operations;
|
||||
|
||||
int dsi_init_platform_driver(void);
|
||||
void dsi_uninit_platform_driver(void);
|
||||
|
||||
void dsi_dump_clocks(struct seq_file *s);
|
||||
void dsi_dump_irqs(struct seq_file *s);
|
||||
void dsi_dump_regs(struct seq_file *s);
|
||||
void dsi_create_debugfs_files_irq(struct dentry *debugfs_dir,
|
||||
const struct file_operations *debug_fops);
|
||||
void dsi_create_debugfs_files_reg(struct dentry *debugfs_dir,
|
||||
const struct file_operations *debug_fops);
|
||||
|
||||
void dsi_save_context(void);
|
||||
void dsi_restore_context(void);
|
||||
|
|
|
@ -193,6 +193,8 @@ static const char * const omap4_dss_clk_source_names[] = {
|
|||
[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1",
|
||||
[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2",
|
||||
[OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK",
|
||||
[OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
|
||||
[OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2",
|
||||
};
|
||||
|
||||
static const struct dss_param_range omap2_dss_param_range[] = {
|
||||
|
|
|
@ -179,6 +179,8 @@ enum omap_dss_clk_source {
|
|||
* OMAP4: PLL1_CLK1 */
|
||||
OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
|
||||
* OMAP4: PLL1_CLK2 */
|
||||
OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
|
||||
OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
|
||||
};
|
||||
|
||||
/* RFBI */
|
||||
|
|
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