bus: add driver for the Technologic Systems NBUS
This driver implements a GPIOs bit-banged bus, called the NBUS by Technologic Systems. It is used to communicate with the peripherals in the FPGA on the TS-4600 SoM. Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Sebastien Bourdelin
Arnd Bergmann
Родитель
d771d62e31
Коммит
5b143d2a6e
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@ -157,6 +157,14 @@ config TEGRA_GMI
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Driver for the Tegra Generic Memory Interface bus which can be used
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to attach devices such as NOR, UART, FPGA and more.
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config TS_NBUS
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tristate "Technologic Systems NBUS Driver"
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depends on SOC_IMX28
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depends on OF_GPIO && PWM
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help
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Driver for the Technologic Systems NBUS which is used to interface
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with the peripherals in the FPGA of the TS-4600 SoM.
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config UNIPHIER_SYSTEM_BUS
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tristate "UniPhier System Bus driver"
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depends on ARCH_UNIPHIER && OF
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@ -20,6 +20,7 @@ obj-$(CONFIG_SUNXI_RSB) += sunxi-rsb.o
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obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o
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obj-$(CONFIG_TEGRA_ACONNECT) += tegra-aconnect.o
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obj-$(CONFIG_TEGRA_GMI) += tegra-gmi.o
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obj-$(CONFIG_TS_NBUS) += ts-nbus.o
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obj-$(CONFIG_UNIPHIER_SYSTEM_BUS) += uniphier-system-bus.o
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obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress-config.o
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@ -0,0 +1,375 @@
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/*
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* NBUS driver for TS-4600 based boards
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*
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* Copyright (c) 2016 - Savoir-faire Linux
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* Author: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* This driver implements a GPIOs bit-banged bus, called the NBUS by Technologic
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* Systems. It is used to communicate with the peripherals in the FPGA on the
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* TS-4600 SoM.
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*/
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#include <linux/bitops.h>
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#include <linux/gpio/consumer.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/ts-nbus.h>
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#define TS_NBUS_DIRECTION_IN 0
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#define TS_NBUS_DIRECTION_OUT 1
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#define TS_NBUS_WRITE_ADR 0
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#define TS_NBUS_WRITE_VAL 1
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struct ts_nbus {
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struct pwm_device *pwm;
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struct gpio_descs *data;
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struct gpio_desc *csn;
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struct gpio_desc *txrx;
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struct gpio_desc *strobe;
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struct gpio_desc *ale;
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struct gpio_desc *rdy;
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struct mutex lock;
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};
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/*
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* request all gpios required by the bus.
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*/
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static int ts_nbus_init_pdata(struct platform_device *pdev, struct ts_nbus
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*ts_nbus)
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{
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ts_nbus->data = devm_gpiod_get_array(&pdev->dev, "ts,data",
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GPIOD_OUT_HIGH);
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if (IS_ERR(ts_nbus->data)) {
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dev_err(&pdev->dev, "failed to retrieve ts,data-gpio from dts\n");
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return PTR_ERR(ts_nbus->data);
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}
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ts_nbus->csn = devm_gpiod_get(&pdev->dev, "ts,csn", GPIOD_OUT_HIGH);
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if (IS_ERR(ts_nbus->csn)) {
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dev_err(&pdev->dev, "failed to retrieve ts,csn-gpio from dts\n");
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return PTR_ERR(ts_nbus->csn);
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}
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ts_nbus->txrx = devm_gpiod_get(&pdev->dev, "ts,txrx", GPIOD_OUT_HIGH);
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if (IS_ERR(ts_nbus->txrx)) {
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dev_err(&pdev->dev, "failed to retrieve ts,txrx-gpio from dts\n");
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return PTR_ERR(ts_nbus->txrx);
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}
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ts_nbus->strobe = devm_gpiod_get(&pdev->dev, "ts,strobe", GPIOD_OUT_HIGH);
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if (IS_ERR(ts_nbus->strobe)) {
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dev_err(&pdev->dev, "failed to retrieve ts,strobe-gpio from dts\n");
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return PTR_ERR(ts_nbus->strobe);
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}
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ts_nbus->ale = devm_gpiod_get(&pdev->dev, "ts,ale", GPIOD_OUT_HIGH);
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if (IS_ERR(ts_nbus->ale)) {
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dev_err(&pdev->dev, "failed to retrieve ts,ale-gpio from dts\n");
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return PTR_ERR(ts_nbus->ale);
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}
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ts_nbus->rdy = devm_gpiod_get(&pdev->dev, "ts,rdy", GPIOD_IN);
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if (IS_ERR(ts_nbus->rdy)) {
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dev_err(&pdev->dev, "failed to retrieve ts,rdy-gpio from dts\n");
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return PTR_ERR(ts_nbus->rdy);
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}
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return 0;
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}
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/*
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* the data gpios are used for reading and writing values, their directions
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* should be adjusted accordingly.
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*/
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static void ts_nbus_set_direction(struct ts_nbus *ts_nbus, int direction)
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{
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int i;
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for (i = 0; i < 8; i++) {
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if (direction == TS_NBUS_DIRECTION_IN)
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gpiod_direction_input(ts_nbus->data->desc[i]);
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else
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/* when used as output the default state of the data
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* lines are set to high */
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gpiod_direction_output(ts_nbus->data->desc[i], 1);
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}
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}
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/*
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* reset the bus in its initial state.
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* The data, csn, strobe and ale lines must be zero'ed to let the FPGA knows a
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* new transaction can be process.
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*/
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static void ts_nbus_reset_bus(struct ts_nbus *ts_nbus)
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{
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int i;
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int values[8];
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for (i = 0; i < 8; i++)
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values[i] = 0;
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gpiod_set_array_value_cansleep(8, ts_nbus->data->desc, values);
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gpiod_set_value_cansleep(ts_nbus->csn, 0);
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gpiod_set_value_cansleep(ts_nbus->strobe, 0);
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gpiod_set_value_cansleep(ts_nbus->ale, 0);
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}
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/*
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* let the FPGA knows it can process.
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*/
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static void ts_nbus_start_transaction(struct ts_nbus *ts_nbus)
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{
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gpiod_set_value_cansleep(ts_nbus->strobe, 1);
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}
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/*
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* read a byte value from the data gpios.
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* return 0 on success or negative errno on failure.
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*/
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static int ts_nbus_read_byte(struct ts_nbus *ts_nbus, u8 *val)
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{
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struct gpio_descs *gpios = ts_nbus->data;
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int ret, i;
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*val = 0;
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for (i = 0; i < 8; i++) {
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ret = gpiod_get_value_cansleep(gpios->desc[i]);
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if (ret < 0)
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return ret;
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if (ret)
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*val |= BIT(i);
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}
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return 0;
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}
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/*
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* set the data gpios accordingly to the byte value.
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*/
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static void ts_nbus_write_byte(struct ts_nbus *ts_nbus, u8 byte)
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{
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struct gpio_descs *gpios = ts_nbus->data;
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int i;
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int values[8];
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for (i = 0; i < 8; i++)
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if (byte & BIT(i))
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values[i] = 1;
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else
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values[i] = 0;
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gpiod_set_array_value_cansleep(8, gpios->desc, values);
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}
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/*
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* reading the bus consists of resetting the bus, then notifying the FPGA to
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* send the data in the data gpios and return the read value.
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* return 0 on success or negative errno on failure.
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*/
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static int ts_nbus_read_bus(struct ts_nbus *ts_nbus, u8 *val)
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{
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ts_nbus_reset_bus(ts_nbus);
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ts_nbus_start_transaction(ts_nbus);
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return ts_nbus_read_byte(ts_nbus, val);
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}
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/*
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* writing to the bus consists of resetting the bus, then define the type of
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* command (address/value), write the data and notify the FPGA to retrieve the
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* value in the data gpios.
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*/
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static void ts_nbus_write_bus(struct ts_nbus *ts_nbus, int cmd, u8 val)
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{
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ts_nbus_reset_bus(ts_nbus);
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if (cmd == TS_NBUS_WRITE_ADR)
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gpiod_set_value_cansleep(ts_nbus->ale, 1);
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ts_nbus_write_byte(ts_nbus, val);
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ts_nbus_start_transaction(ts_nbus);
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}
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/*
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* read the value in the FPGA register at the given address.
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* return 0 on success or negative errno on failure.
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*/
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int ts_nbus_read(struct ts_nbus *ts_nbus, u8 adr, u16 *val)
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{
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int ret, i;
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u8 byte;
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/* bus access must be atomic */
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mutex_lock(&ts_nbus->lock);
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/* set the bus in read mode */
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gpiod_set_value_cansleep(ts_nbus->txrx, 0);
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/* write address */
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ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_ADR, adr);
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/* set the data gpios direction as input before reading */
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ts_nbus_set_direction(ts_nbus, TS_NBUS_DIRECTION_IN);
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/* reading value MSB first */
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do {
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*val = 0;
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byte = 0;
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for (i = 1; i >= 0; i--) {
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/* read a byte from the bus, leave on error */
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ret = ts_nbus_read_bus(ts_nbus, &byte);
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if (ret < 0)
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goto err;
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/* append the byte read to the final value */
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*val |= byte << (i * 8);
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}
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gpiod_set_value_cansleep(ts_nbus->csn, 1);
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ret = gpiod_get_value_cansleep(ts_nbus->rdy);
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} while (ret);
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err:
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/* restore the data gpios direction as output after reading */
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ts_nbus_set_direction(ts_nbus, TS_NBUS_DIRECTION_OUT);
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mutex_unlock(&ts_nbus->lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(ts_nbus_read);
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/*
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* write the desired value in the FPGA register at the given address.
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*/
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int ts_nbus_write(struct ts_nbus *ts_nbus, u8 adr, u16 val)
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{
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int i;
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/* bus access must be atomic */
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mutex_lock(&ts_nbus->lock);
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/* set the bus in write mode */
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gpiod_set_value_cansleep(ts_nbus->txrx, 1);
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/* write address */
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ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_ADR, adr);
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/* writing value MSB first */
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for (i = 1; i >= 0; i--)
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ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_VAL, (u8)(val >> (i * 8)));
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/* wait for completion */
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gpiod_set_value_cansleep(ts_nbus->csn, 1);
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while (gpiod_get_value_cansleep(ts_nbus->rdy) != 0) {
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gpiod_set_value_cansleep(ts_nbus->csn, 0);
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gpiod_set_value_cansleep(ts_nbus->csn, 1);
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}
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mutex_unlock(&ts_nbus->lock);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ts_nbus_write);
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static int ts_nbus_probe(struct platform_device *pdev)
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{
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struct pwm_device *pwm;
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struct pwm_args pargs;
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struct device *dev = &pdev->dev;
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struct ts_nbus *ts_nbus;
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int ret;
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ts_nbus = devm_kzalloc(dev, sizeof(*ts_nbus), GFP_KERNEL);
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if (!ts_nbus)
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return -ENOMEM;
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mutex_init(&ts_nbus->lock);
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ret = ts_nbus_init_pdata(pdev, ts_nbus);
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if (ret < 0)
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return ret;
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pwm = devm_pwm_get(dev, NULL);
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if (IS_ERR(pwm)) {
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ret = PTR_ERR(pwm);
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if (ret != -EPROBE_DEFER)
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dev_err(dev, "unable to request PWM\n");
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return ret;
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}
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pwm_get_args(pwm, &pargs);
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if (!pargs.period) {
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dev_err(&pdev->dev, "invalid PWM period\n");
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return -EINVAL;
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}
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/*
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* FIXME: pwm_apply_args() should be removed when switching to
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* the atomic PWM API.
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*/
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pwm_apply_args(pwm);
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ret = pwm_config(pwm, pargs.period, pargs.period);
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if (ret < 0)
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return ret;
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/*
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* we can now start the FPGA and populate the peripherals.
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*/
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pwm_enable(pwm);
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ts_nbus->pwm = pwm;
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/*
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* let the child nodes retrieve this instance of the ts-nbus.
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*/
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dev_set_drvdata(dev, ts_nbus);
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ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
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if (ret < 0)
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return ret;
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dev_info(dev, "initialized\n");
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return 0;
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}
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static int ts_nbus_remove(struct platform_device *pdev)
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{
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struct ts_nbus *ts_nbus = dev_get_drvdata(&pdev->dev);
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/* shutdown the FPGA */
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mutex_lock(&ts_nbus->lock);
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pwm_disable(ts_nbus->pwm);
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mutex_unlock(&ts_nbus->lock);
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return 0;
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}
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static const struct of_device_id ts_nbus_of_match[] = {
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{ .compatible = "technologic,ts-nbus", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, ts_nbus_of_match);
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static struct platform_driver ts_nbus_driver = {
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.probe = ts_nbus_probe,
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.remove = ts_nbus_remove,
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.driver = {
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.name = "ts_nbus",
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.of_match_table = ts_nbus_of_match,
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},
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};
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module_platform_driver(ts_nbus_driver);
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MODULE_ALIAS("platform:ts_nbus");
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MODULE_AUTHOR("Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>");
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MODULE_DESCRIPTION("Technologic Systems NBUS");
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MODULE_LICENSE("GPL v2");
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@ -0,0 +1,18 @@
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/*
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* Copyright (c) 2016 - Savoir-faire Linux
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* Author: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
|
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*
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* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
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*/
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#ifndef _TS_NBUS_H
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#define _TS_NBUS_H
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struct ts_nbus;
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extern int ts_nbus_read(struct ts_nbus *ts_nbus, u8 adr, u16 *val);
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extern int ts_nbus_write(struct ts_nbus *ts_nbus, u8 adr, u16 val);
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#endif /* _TS_NBUS_H */
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