x86, ptrace: regset extensions to support xstate
Add the xstate regset support which helps extend the kernel ptrace and the core-dump interfaces to support AVX state etc. This regset interface is designed to support all the future state that gets supported using xsave/xrstor infrastructure. Looking at the memory layout saved by "xsave", one can't say which state is represented in the memory layout. This is because if a particular state is in init state, in the xsave hdr it can be represented by bit '0'. And hence we can't really say by the xsave header wether a state is in init state or the state is not saved in the memory layout. And hence the xsave memory layout available through this regset interface uses SW usable bytes [464..511] to convey what state is represented in the memory layout. First 8 bytes of the sw_usable_bytes[464..467] will be set to OS enabled xstate mask(which is same as the 64bit mask returned by the xgetbv's xCR0). The note NT_X86_XSTATE represents the extended state information in the core file, using the above mentioned memory layout. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> LKML-Reference: <20100211195614.802495327@sbs-t61.sc.intel.com> Signed-off-by: Hongjiu Lu <hjl.tools@gmail.com> Cc: Roland McGrath <roland@redhat.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
Suresh Siddha
H. Peter Anvin
Родитель
676ad58553
Коммит
5b3efd5008
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@ -33,8 +33,16 @@ extern void init_thread_xstate(void);
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extern int dump_fpu(struct pt_regs *, struct user_i387_struct *);
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extern user_regset_active_fn fpregs_active, xfpregs_active;
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extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
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extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
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extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get,
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xstateregs_get;
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extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set,
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xstateregs_set;
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/*
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* xstateregs_active == fpregs_active. Please refer to the comment
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* at the definition of fpregs_active.
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*/
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#define xstateregs_active fpregs_active
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extern struct _fpx_sw_bytes fx_sw_reserved;
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#ifdef CONFIG_IA32_EMULATION
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@ -1,5 +1,63 @@
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#ifndef _ASM_X86_USER_H
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#define _ASM_X86_USER_H
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#ifdef CONFIG_X86_32
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# include "user_32.h"
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#else
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# include "user_64.h"
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#endif
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#include <asm/types.h>
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struct user_ymmh_regs {
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/* 16 * 16 bytes for each YMMH-reg */
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__u32 ymmh_space[64];
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};
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struct user_xsave_hdr {
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__u64 xstate_bv;
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__u64 reserved1[2];
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__u64 reserved2[5];
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};
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/*
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* The structure layout of user_xstateregs, used for exporting the
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* extended register state through ptrace and core-dump (NT_X86_XSTATE note)
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* interfaces will be same as the memory layout of xsave used by the processor
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* (except for the bytes 464..511, which can be used by the software) and hence
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* the size of this structure varies depending on the features supported by the
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* processor and OS. The size of the structure that users need to use can be
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* obtained by doing:
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* cpuid_count(0xd, 0, &eax, &ptrace_xstateregs_struct_size, &ecx, &edx);
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* i.e., cpuid.(eax=0xd,ecx=0).ebx will be the size that user (debuggers, etc.)
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* need to use.
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*
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* For now, only the first 8 bytes of the software usable bytes[464..471] will
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* be used and will be set to OS enabled xstate mask (which is same as the
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* 64bit mask returned by the xgetbv's xCR0). Users (analyzing core dump
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* remotely, etc.) can use this mask as well as the mask saved in the
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* xstate_hdr bytes and interpret what states the processor/OS supports
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* and what states are in modified/initialized conditions for the
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* particular process/thread.
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*
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* Also when the user modifies certain state FP/SSE/etc through the
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* ptrace interface, they must ensure that the xsave_hdr.xstate_bv
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* bytes[512..519] of the memory layout are updated correspondingly.
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* i.e., for example when FP state is modified to a non-init state,
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* xsave_hdr.xstate_bv's bit 0 must be set to '1', when SSE is modified to
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* non-init state, xsave_hdr.xstate_bv's bit 1 must to be set to '1', etc.
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*/
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#define USER_XSTATE_FX_SW_WORDS 6
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#define USER_XSTATE_XCR0_WORD 0
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struct user_xstateregs {
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struct {
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__u64 fpx_space[58];
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__u64 xstate_fx_sw[USER_XSTATE_FX_SW_WORDS];
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} i387;
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struct user_xsave_hdr xsave_hdr;
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struct user_ymmh_regs ymmh;
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/* further processor state extensions go here */
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};
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#endif /* _ASM_X86_USER_H */
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@ -27,9 +27,11 @@
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extern unsigned int xstate_size;
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extern u64 pcntxt_mask;
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extern struct xsave_struct *init_xstate_buf;
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extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
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extern void xsave_cntxt_init(void);
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extern void xsave_init(void);
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extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
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extern int init_fpu(struct task_struct *child);
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extern int check_for_xstate(struct i387_fxsave_struct __user *buf,
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void __user *fpstate,
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@ -164,6 +164,11 @@ int init_fpu(struct task_struct *tsk)
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return 0;
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}
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/*
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* The xstateregs_active() routine is the same as the fpregs_active() routine,
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* as the "regset->n" for the xstate regset will be updated based on the feature
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* capabilites supported by the xsave.
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*/
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int fpregs_active(struct task_struct *target, const struct user_regset *regset)
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{
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return tsk_used_math(target) ? regset->n : 0;
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@ -224,6 +229,84 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
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return ret;
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}
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int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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int ret;
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if (!cpu_has_xsave)
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return -ENODEV;
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ret = init_fpu(target);
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if (ret)
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return ret;
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/*
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* First copy the fxsave bytes 0..463.
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*/
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.xstate->xsave, 0,
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offsetof(struct user_xstateregs,
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i387.xstate_fx_sw));
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if (ret)
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return ret;
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/*
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* Copy the 48bytes defined by software.
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*/
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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xstate_fx_sw_bytes,
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offsetof(struct user_xstateregs,
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i387.xstate_fx_sw),
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offsetof(struct user_xstateregs,
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xsave_hdr));
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if (ret)
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return ret;
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/*
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* Copy the rest of xstate memory layout.
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*/
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.xstate->xsave.xsave_hdr,
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offsetof(struct user_xstateregs,
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xsave_hdr), -1);
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return ret;
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}
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int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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struct xsave_hdr_struct *xsave_hdr;
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if (!cpu_has_xsave)
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return -ENODEV;
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ret = init_fpu(target);
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if (ret)
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return ret;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.xstate->xsave, 0, -1);
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/*
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* mxcsr reserved bits must be masked to zero for security reasons.
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*/
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target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
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xsave_hdr = &target->thread.xstate->xsave.xsave_hdr;
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xsave_hdr->xstate_bv &= pcntxt_mask;
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/*
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* These bits must be zero.
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*/
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xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
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return ret;
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}
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#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
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/*
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@ -48,6 +48,7 @@ enum x86_regset {
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REGSET_FP,
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REGSET_XFP,
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REGSET_IOPERM64 = REGSET_XFP,
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REGSET_XSTATE,
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REGSET_TLS,
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REGSET_IOPERM32,
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};
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@ -1584,7 +1585,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
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#ifdef CONFIG_X86_64
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static const struct user_regset x86_64_regsets[] = {
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static struct user_regset x86_64_regsets[] __read_mostly = {
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[REGSET_GENERAL] = {
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.core_note_type = NT_PRSTATUS,
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.n = sizeof(struct user_regs_struct) / sizeof(long),
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@ -1597,6 +1598,12 @@ static const struct user_regset x86_64_regsets[] = {
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.size = sizeof(long), .align = sizeof(long),
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.active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set
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},
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[REGSET_XSTATE] = {
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.core_note_type = NT_X86_XSTATE,
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.size = sizeof(u64), .align = sizeof(u64),
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.active = xstateregs_active, .get = xstateregs_get,
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.set = xstateregs_set
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},
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[REGSET_IOPERM64] = {
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.core_note_type = NT_386_IOPERM,
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.n = IO_BITMAP_LONGS,
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@ -1622,7 +1629,7 @@ static const struct user_regset_view user_x86_64_view = {
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#endif /* CONFIG_X86_64 */
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#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
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static const struct user_regset x86_32_regsets[] = {
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static struct user_regset x86_32_regsets[] __read_mostly = {
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[REGSET_GENERAL] = {
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.core_note_type = NT_PRSTATUS,
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.n = sizeof(struct user_regs_struct32) / sizeof(u32),
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@ -1641,6 +1648,12 @@ static const struct user_regset x86_32_regsets[] = {
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.size = sizeof(u32), .align = sizeof(u32),
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.active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set
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},
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[REGSET_XSTATE] = {
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.core_note_type = NT_X86_XSTATE,
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.size = sizeof(u64), .align = sizeof(u64),
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.active = xstateregs_active, .get = xstateregs_get,
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.set = xstateregs_set
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},
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[REGSET_TLS] = {
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.core_note_type = NT_386_TLS,
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.n = GDT_ENTRY_TLS_ENTRIES, .bias = GDT_ENTRY_TLS_MIN,
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@ -1663,6 +1676,23 @@ static const struct user_regset_view user_x86_32_view = {
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};
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#endif
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/*
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* This represents bytes 464..511 in the memory layout exported through
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* the REGSET_XSTATE interface.
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*/
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u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
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void update_regset_xstate_info(unsigned int size, u64 xstate_mask)
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{
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#ifdef CONFIG_X86_64
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x86_64_regsets[REGSET_XSTATE].n = size / sizeof(u64);
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#endif
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#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
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x86_32_regsets[REGSET_XSTATE].n = size / sizeof(u64);
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#endif
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xstate_fx_sw_bytes[USER_XSTATE_XCR0_WORD] = xstate_mask;
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}
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const struct user_regset_view *task_user_regset_view(struct task_struct *task)
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{
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#ifdef CONFIG_IA32_EMULATION
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@ -337,6 +337,7 @@ void __ref xsave_cntxt_init(void)
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cpuid_count(0xd, 0, &eax, &ebx, &ecx, &edx);
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xstate_size = ebx;
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update_regset_xstate_info(xstate_size, pcntxt_mask);
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prepare_fx_sw_frame();
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setup_xstate_init();
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@ -361,6 +361,7 @@ typedef struct elf64_shdr {
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#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
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#define NT_386_TLS 0x200 /* i386 TLS slots (struct user_desc) */
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#define NT_386_IOPERM 0x201 /* x86 io permission bitmap (1=deny) */
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#define NT_X86_XSTATE 0x202 /* x86 extended state using xsave */
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#define NT_S390_HIGH_GPRS 0x300 /* s390 upper register halves */
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