media: ti-vpe: cal: Embed base_fields array in struct cal_csi2_phy
The base_fields field of cal_csi2_phy points to a fixed-size array of struct reg_field. This level of indirection isn't needed, embed the array directly in struct cal_csi2_phy. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Коммит
5b4426e33b
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@ -234,7 +234,7 @@ enum cal_camerarx_field {
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struct cal_csi2_phy {
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struct cal_csi2_phy {
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struct regmap_field *fields[F_MAX_FIELDS];
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struct regmap_field *fields[F_MAX_FIELDS];
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struct reg_field *base_fields;
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struct reg_field base_fields[F_MAX_FIELDS];
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const int num_lanes;
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const int num_lanes;
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};
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};
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@ -245,27 +245,23 @@ struct cal_data {
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const unsigned int flags;
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const unsigned int flags;
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};
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};
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static struct reg_field dra72x_ctrl_core_csi0_reg_fields[F_MAX_FIELDS] = {
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static struct cal_csi2_phy dra72x_cal_csi_phy[] = {
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{
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.base_fields = {
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[F_CTRLCLKEN] = REG_FIELD(0, 10, 10),
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[F_CTRLCLKEN] = REG_FIELD(0, 10, 10),
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[F_CAMMODE] = REG_FIELD(0, 11, 12),
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[F_CAMMODE] = REG_FIELD(0, 11, 12),
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[F_LANEENABLE] = REG_FIELD(0, 13, 16),
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[F_LANEENABLE] = REG_FIELD(0, 13, 16),
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[F_CSI_MODE] = REG_FIELD(0, 17, 17),
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[F_CSI_MODE] = REG_FIELD(0, 17, 17),
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};
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},
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.num_lanes = 4,
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static struct reg_field dra72x_ctrl_core_csi1_reg_fields[F_MAX_FIELDS] = {
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},
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{
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.base_fields = {
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[F_CTRLCLKEN] = REG_FIELD(0, 0, 0),
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[F_CTRLCLKEN] = REG_FIELD(0, 0, 0),
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[F_CAMMODE] = REG_FIELD(0, 1, 2),
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[F_CAMMODE] = REG_FIELD(0, 1, 2),
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[F_LANEENABLE] = REG_FIELD(0, 3, 4),
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[F_LANEENABLE] = REG_FIELD(0, 3, 4),
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[F_CSI_MODE] = REG_FIELD(0, 5, 5),
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[F_CSI_MODE] = REG_FIELD(0, 5, 5),
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};
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static struct cal_csi2_phy dra72x_cal_csi_phy[] = {
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{
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.base_fields = dra72x_ctrl_core_csi0_reg_fields,
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.num_lanes = 4,
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},
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},
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{
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.base_fields = dra72x_ctrl_core_csi1_reg_fields,
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.num_lanes = 2,
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.num_lanes = 2,
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},
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},
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};
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};
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@ -281,27 +277,23 @@ static const struct cal_data dra72x_es1_cal_data = {
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.flags = DRA72_CAL_PRE_ES2_LDO_DISABLE,
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.flags = DRA72_CAL_PRE_ES2_LDO_DISABLE,
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};
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};
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static struct reg_field dra76x_ctrl_core_csi0_reg_fields[F_MAX_FIELDS] = {
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static struct cal_csi2_phy dra76x_cal_csi_phy[] = {
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{
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.base_fields = {
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[F_CTRLCLKEN] = REG_FIELD(0, 8, 8),
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[F_CTRLCLKEN] = REG_FIELD(0, 8, 8),
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[F_CAMMODE] = REG_FIELD(0, 9, 10),
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[F_CAMMODE] = REG_FIELD(0, 9, 10),
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[F_CSI_MODE] = REG_FIELD(0, 11, 11),
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[F_CSI_MODE] = REG_FIELD(0, 11, 11),
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[F_LANEENABLE] = REG_FIELD(0, 27, 31),
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[F_LANEENABLE] = REG_FIELD(0, 27, 31),
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};
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},
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.num_lanes = 5,
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static struct reg_field dra76x_ctrl_core_csi1_reg_fields[F_MAX_FIELDS] = {
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},
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{
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.base_fields = {
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[F_CTRLCLKEN] = REG_FIELD(0, 0, 0),
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[F_CTRLCLKEN] = REG_FIELD(0, 0, 0),
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[F_CAMMODE] = REG_FIELD(0, 1, 2),
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[F_CAMMODE] = REG_FIELD(0, 1, 2),
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[F_CSI_MODE] = REG_FIELD(0, 3, 3),
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[F_CSI_MODE] = REG_FIELD(0, 3, 3),
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[F_LANEENABLE] = REG_FIELD(0, 24, 26),
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[F_LANEENABLE] = REG_FIELD(0, 24, 26),
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};
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static struct cal_csi2_phy dra76x_cal_csi_phy[] = {
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{
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.base_fields = dra76x_ctrl_core_csi0_reg_fields,
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.num_lanes = 5,
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},
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},
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{
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.base_fields = dra76x_ctrl_core_csi1_reg_fields,
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.num_lanes = 3,
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.num_lanes = 3,
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},
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},
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};
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};
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@ -311,15 +303,13 @@ static const struct cal_data dra76x_cal_data = {
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.num_csi2_phy = ARRAY_SIZE(dra76x_cal_csi_phy),
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.num_csi2_phy = ARRAY_SIZE(dra76x_cal_csi_phy),
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};
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};
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static struct reg_field am654_ctrl_core_csi0_reg_fields[F_MAX_FIELDS] = {
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static struct cal_csi2_phy am654_cal_csi_phy[] = {
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{
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.base_fields = {
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[F_CTRLCLKEN] = REG_FIELD(0, 15, 15),
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[F_CTRLCLKEN] = REG_FIELD(0, 15, 15),
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[F_CAMMODE] = REG_FIELD(0, 24, 25),
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[F_CAMMODE] = REG_FIELD(0, 24, 25),
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[F_LANEENABLE] = REG_FIELD(0, 0, 4),
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[F_LANEENABLE] = REG_FIELD(0, 0, 4),
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};
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},
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static struct cal_csi2_phy am654_cal_csi_phy[] = {
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{
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.base_fields = am654_ctrl_core_csi0_reg_fields,
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.num_lanes = 5,
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.num_lanes = 5,
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},
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},
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};
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};
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